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CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
1da177e4
LT
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
e404e274 33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
bdee9d98
DT
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 61 unsigned long val;
bdee9d98 62
92425a40
TP
63 if (strict_strtoul(buf, 0, &val) < 0)
64 return -EINVAL;
65
66 pdev->broken_parity_status = !!val;
67
68 return count;
bdee9d98
DT
69}
70
4327edf6
AC
71static ssize_t local_cpus_show(struct device *dev,
72 struct device_attribute *attr, char *buf)
1da177e4 73{
3be83050 74 const struct cpumask *mask;
4327edf6
AC
75 int len;
76
e0cd5160
AH
77#ifdef CONFIG_NUMA
78 mask = cpumask_of_node(dev_to_node(dev));
79#else
3be83050 80 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 81#endif
3be83050 82 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
83 buf[len++] = '\n';
84 buf[len] = '\0';
85 return len;
86}
87
88
89static ssize_t local_cpulist_show(struct device *dev,
90 struct device_attribute *attr, char *buf)
91{
3be83050 92 const struct cpumask *mask;
39106dcf
MT
93 int len;
94
e0cd5160
AH
95#ifdef CONFIG_NUMA
96 mask = cpumask_of_node(dev_to_node(dev));
97#else
3be83050 98 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 99#endif
3be83050 100 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
101 buf[len++] = '\n';
102 buf[len] = '\0';
103 return len;
1da177e4
LT
104}
105
106/* show resources */
107static ssize_t
e404e274 108resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
109{
110 struct pci_dev * pci_dev = to_pci_dev(dev);
111 char * str = buf;
112 int i;
fde09c6d 113 int max;
e31dd6e4 114 resource_size_t start, end;
1da177e4
LT
115
116 if (pci_dev->subordinate)
117 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
118 else
119 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
120
121 for (i = 0; i < max; i++) {
2311b1f2
ME
122 struct resource *res = &pci_dev->resource[i];
123 pci_resource_to_user(pci_dev, i, res, &start, &end);
124 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
125 (unsigned long long)start,
126 (unsigned long long)end,
127 (unsigned long long)res->flags);
1da177e4
LT
128 }
129 return (str - buf);
130}
131
87c8a443 132static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
133{
134 struct pci_dev *pci_dev = to_pci_dev(dev);
135
136 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
137 pci_dev->vendor, pci_dev->device,
138 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
139 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
140 (u8)(pci_dev->class));
141}
bae94d02
IPG
142
143static ssize_t is_enabled_store(struct device *dev,
144 struct device_attribute *attr, const char *buf,
145 size_t count)
9f125d30
AV
146{
147 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
148 unsigned long val;
149 ssize_t result = strict_strtoul(buf, 0, &val);
150
151 if (result < 0)
152 return result;
9f125d30
AV
153
154 /* this can crash the machine when done on the "wrong" device */
155 if (!capable(CAP_SYS_ADMIN))
92425a40 156 return -EPERM;
9f125d30 157
92425a40 158 if (!val) {
296ccb08 159 if (pci_is_enabled(pdev))
bae94d02
IPG
160 pci_disable_device(pdev);
161 else
162 result = -EIO;
92425a40 163 } else
bae94d02 164 result = pci_enable_device(pdev);
9f125d30 165
bae94d02
IPG
166 return result < 0 ? result : count;
167}
168
169static ssize_t is_enabled_show(struct device *dev,
170 struct device_attribute *attr, char *buf)
171{
172 struct pci_dev *pdev;
9f125d30 173
bae94d02
IPG
174 pdev = to_pci_dev (dev);
175 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
176}
177
81bb0e19
BG
178#ifdef CONFIG_NUMA
179static ssize_t
180numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
181{
182 return sprintf (buf, "%d\n", dev->numa_node);
183}
184#endif
185
bb965401
YL
186static ssize_t
187dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
188{
189 struct pci_dev *pdev = to_pci_dev(dev);
190
191 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
192}
193
194static ssize_t
195consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
196 char *buf)
197{
198 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
199}
200
fe97064c
BG
201static ssize_t
202msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
203{
204 struct pci_dev *pdev = to_pci_dev(dev);
205
206 if (!pdev->subordinate)
207 return 0;
208
209 return sprintf (buf, "%u\n",
210 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
211}
212
213static ssize_t
214msi_bus_store(struct device *dev, struct device_attribute *attr,
215 const char *buf, size_t count)
216{
217 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
218 unsigned long val;
219
220 if (strict_strtoul(buf, 0, &val) < 0)
221 return -EINVAL;
fe97064c
BG
222
223 /* bad things may happen if the no_msi flag is changed
224 * while some drivers are loaded */
225 if (!capable(CAP_SYS_ADMIN))
92425a40 226 return -EPERM;
fe97064c 227
92425a40
TP
228 /* Maybe pci devices without subordinate busses shouldn't even have this
229 * attribute in the first place? */
fe97064c
BG
230 if (!pdev->subordinate)
231 return count;
232
92425a40
TP
233 /* Is the flag going to change, or keep the value it already had? */
234 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
235 !!val) {
236 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 237
92425a40
TP
238 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
239 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
240 }
241
242 return count;
243}
9888549e 244
705b1aaa
AC
245#ifdef CONFIG_HOTPLUG
246static DEFINE_MUTEX(pci_remove_rescan_mutex);
247static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
248 size_t count)
249{
250 unsigned long val;
251 struct pci_bus *b = NULL;
252
253 if (strict_strtoul(buf, 0, &val) < 0)
254 return -EINVAL;
255
256 if (val) {
257 mutex_lock(&pci_remove_rescan_mutex);
258 while ((b = pci_find_next_bus(b)) != NULL)
259 pci_rescan_bus(b);
260 mutex_unlock(&pci_remove_rescan_mutex);
261 }
262 return count;
263}
264
265struct bus_attribute pci_bus_attrs[] = {
266 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
267 __ATTR_NULL
268};
77c27c7b 269
738a6396
AC
270static ssize_t
271dev_rescan_store(struct device *dev, struct device_attribute *attr,
272 const char *buf, size_t count)
273{
274 unsigned long val;
275 struct pci_dev *pdev = to_pci_dev(dev);
276
277 if (strict_strtoul(buf, 0, &val) < 0)
278 return -EINVAL;
279
280 if (val) {
281 mutex_lock(&pci_remove_rescan_mutex);
282 pci_rescan_bus(pdev->bus);
283 mutex_unlock(&pci_remove_rescan_mutex);
284 }
285 return count;
286}
287
77c27c7b
AC
288static void remove_callback(struct device *dev)
289{
290 struct pci_dev *pdev = to_pci_dev(dev);
291
292 mutex_lock(&pci_remove_rescan_mutex);
293 pci_remove_bus_device(pdev);
294 mutex_unlock(&pci_remove_rescan_mutex);
295}
296
297static ssize_t
298remove_store(struct device *dev, struct device_attribute *dummy,
299 const char *buf, size_t count)
300{
301 int ret = 0;
302 unsigned long val;
77c27c7b
AC
303
304 if (strict_strtoul(buf, 0, &val) < 0)
305 return -EINVAL;
306
77c27c7b
AC
307 /* An attribute cannot be unregistered by one of its own methods,
308 * so we have to use this roundabout approach.
309 */
310 if (val)
311 ret = device_schedule_callback(dev, remove_callback);
312 if (ret)
313 count = ret;
314 return count;
315}
705b1aaa
AC
316#endif
317
1da177e4
LT
318struct device_attribute pci_dev_attrs[] = {
319 __ATTR_RO(resource),
320 __ATTR_RO(vendor),
321 __ATTR_RO(device),
322 __ATTR_RO(subsystem_vendor),
323 __ATTR_RO(subsystem_device),
324 __ATTR_RO(class),
325 __ATTR_RO(irq),
326 __ATTR_RO(local_cpus),
39106dcf 327 __ATTR_RO(local_cpulist),
9888549e 328 __ATTR_RO(modalias),
81bb0e19
BG
329#ifdef CONFIG_NUMA
330 __ATTR_RO(numa_node),
331#endif
bb965401
YL
332 __ATTR_RO(dma_mask_bits),
333 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 334 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
335 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
336 broken_parity_status_show,broken_parity_status_store),
fe97064c 337 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
338#ifdef CONFIG_HOTPLUG
339 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 340 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
77c27c7b 341#endif
1da177e4
LT
342 __ATTR_NULL,
343};
344
217f45de
DA
345static ssize_t
346boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
347{
348 struct pci_dev *pdev = to_pci_dev(dev);
349
350 return sprintf(buf, "%u\n",
351 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
352 IORESOURCE_ROM_SHADOW));
353}
354struct device_attribute vga_attr = __ATTR_RO(boot_vga);
355
1da177e4 356static ssize_t
91a69029
ZR
357pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
358 char *buf, loff_t off, size_t count)
1da177e4
LT
359{
360 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
361 unsigned int size = 64;
362 loff_t init_off = off;
4c0619ad 363 u8 *data = (u8*) buf;
1da177e4
LT
364
365 /* Several chips lock up trying to read undefined config space */
366 if (capable(CAP_SYS_ADMIN)) {
367 size = dev->cfg_size;
368 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
369 size = 128;
370 }
371
372 if (off > size)
373 return 0;
374 if (off + count > size) {
375 size -= off;
376 count = size;
377 } else {
378 size = count;
379 }
380
4c0619ad
SS
381 if ((off & 1) && size) {
382 u8 val;
e04b0ea2 383 pci_user_read_config_byte(dev, off, &val);
4c0619ad 384 data[off - init_off] = val;
1da177e4 385 off++;
4c0619ad
SS
386 size--;
387 }
388
389 if ((off & 3) && size > 2) {
390 u16 val;
e04b0ea2 391 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
392 data[off - init_off] = val & 0xff;
393 data[off - init_off + 1] = (val >> 8) & 0xff;
394 off += 2;
395 size -= 2;
1da177e4
LT
396 }
397
398 while (size > 3) {
4c0619ad 399 u32 val;
e04b0ea2 400 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
401 data[off - init_off] = val & 0xff;
402 data[off - init_off + 1] = (val >> 8) & 0xff;
403 data[off - init_off + 2] = (val >> 16) & 0xff;
404 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
405 off += 4;
406 size -= 4;
407 }
408
4c0619ad
SS
409 if (size >= 2) {
410 u16 val;
e04b0ea2 411 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
412 data[off - init_off] = val & 0xff;
413 data[off - init_off + 1] = (val >> 8) & 0xff;
414 off += 2;
415 size -= 2;
416 }
417
418 if (size > 0) {
419 u8 val;
e04b0ea2 420 pci_user_read_config_byte(dev, off, &val);
4c0619ad 421 data[off - init_off] = val;
1da177e4
LT
422 off++;
423 --size;
424 }
425
426 return count;
427}
428
429static ssize_t
91a69029
ZR
430pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
431 char *buf, loff_t off, size_t count)
1da177e4
LT
432{
433 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
434 unsigned int size = count;
435 loff_t init_off = off;
4c0619ad 436 u8 *data = (u8*) buf;
1da177e4
LT
437
438 if (off > dev->cfg_size)
439 return 0;
440 if (off + count > dev->cfg_size) {
441 size = dev->cfg_size - off;
442 count = size;
443 }
4c0619ad
SS
444
445 if ((off & 1) && size) {
e04b0ea2 446 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 447 off++;
4c0619ad 448 size--;
1da177e4 449 }
4c0619ad
SS
450
451 if ((off & 3) && size > 2) {
452 u16 val = data[off - init_off];
453 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 454 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
455 off += 2;
456 size -= 2;
457 }
1da177e4
LT
458
459 while (size > 3) {
4c0619ad
SS
460 u32 val = data[off - init_off];
461 val |= (u32) data[off - init_off + 1] << 8;
462 val |= (u32) data[off - init_off + 2] << 16;
463 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 464 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
465 off += 4;
466 size -= 4;
467 }
4c0619ad
SS
468
469 if (size >= 2) {
470 u16 val = data[off - init_off];
471 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 472 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
473 off += 2;
474 size -= 2;
475 }
1da177e4 476
4c0619ad 477 if (size) {
e04b0ea2 478 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
479 off++;
480 --size;
481 }
482
483 return count;
484}
485
94e61088 486static ssize_t
287d19ce
SH
487read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
488 char *buf, loff_t off, size_t count)
94e61088
BH
489{
490 struct pci_dev *dev =
491 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
492
493 if (off > bin_attr->size)
494 count = 0;
495 else if (count > bin_attr->size - off)
496 count = bin_attr->size - off;
94e61088 497
287d19ce 498 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
499}
500
501static ssize_t
287d19ce
SH
502write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
503 char *buf, loff_t off, size_t count)
94e61088
BH
504{
505 struct pci_dev *dev =
506 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
507
508 if (off > bin_attr->size)
509 count = 0;
510 else if (count > bin_attr->size - off)
511 count = bin_attr->size - off;
94e61088 512
287d19ce 513 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
514}
515
1da177e4
LT
516#ifdef HAVE_PCI_LEGACY
517/**
518 * pci_read_legacy_io - read byte(s) from legacy I/O port space
519 * @kobj: kobject corresponding to file to read from
cffb2faf 520 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
521 * @buf: buffer to store results
522 * @off: offset into legacy I/O port space
523 * @count: number of bytes to read
524 *
525 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
526 * callback routine (pci_legacy_read).
527 */
f19aeb1f 528static ssize_t
91a69029
ZR
529pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
530 char *buf, loff_t off, size_t count)
1da177e4
LT
531{
532 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 533 struct device,
1da177e4
LT
534 kobj));
535
536 /* Only support 1, 2 or 4 byte accesses */
537 if (count != 1 && count != 2 && count != 4)
538 return -EINVAL;
539
540 return pci_legacy_read(bus, off, (u32 *)buf, count);
541}
542
543/**
544 * pci_write_legacy_io - write byte(s) to legacy I/O port space
545 * @kobj: kobject corresponding to file to read from
cffb2faf 546 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
547 * @buf: buffer containing value to be written
548 * @off: offset into legacy I/O port space
549 * @count: number of bytes to write
550 *
551 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
552 * callback routine (pci_legacy_write).
553 */
f19aeb1f 554static ssize_t
91a69029
ZR
555pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
556 char *buf, loff_t off, size_t count)
1da177e4
LT
557{
558 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 559 struct device,
1da177e4
LT
560 kobj));
561 /* Only support 1, 2 or 4 byte accesses */
562 if (count != 1 && count != 2 && count != 4)
563 return -EINVAL;
564
565 return pci_legacy_write(bus, off, *(u32 *)buf, count);
566}
567
568/**
569 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
570 * @kobj: kobject corresponding to device to be mapped
571 * @attr: struct bin_attribute for this file
572 * @vma: struct vm_area_struct passed to mmap
573 *
f19aeb1f 574 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
575 * legacy memory space (first meg of bus space) into application virtual
576 * memory space.
577 */
f19aeb1f 578static int
1da177e4
LT
579pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
580 struct vm_area_struct *vma)
581{
582 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 583 struct device,
1da177e4
LT
584 kobj));
585
f19aeb1f
BH
586 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
587}
588
589/**
590 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
591 * @kobj: kobject corresponding to device to be mapped
592 * @attr: struct bin_attribute for this file
593 * @vma: struct vm_area_struct passed to mmap
594 *
595 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
596 * legacy IO space (first meg of bus space) into application virtual
597 * memory space. Returns -ENOSYS if the operation isn't supported
598 */
599static int
600pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
601 struct vm_area_struct *vma)
602{
603 struct pci_bus *bus = to_pci_bus(container_of(kobj,
604 struct device,
605 kobj));
606
607 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
608}
609
10a0ef39
IK
610/**
611 * pci_adjust_legacy_attr - adjustment of legacy file attributes
612 * @b: bus to create files under
613 * @mmap_type: I/O port or memory
614 *
615 * Stub implementation. Can be overridden by arch if necessary.
616 */
617void __weak
618pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
619{
620 return;
621}
622
f19aeb1f
BH
623/**
624 * pci_create_legacy_files - create legacy I/O port and memory files
625 * @b: bus to create files under
626 *
627 * Some platforms allow access to legacy I/O port and ISA memory space on
628 * a per-bus basis. This routine creates the files and ties them into
629 * their associated read, write and mmap files from pci-sysfs.c
630 *
631 * On error unwind, but don't propogate the error to the caller
632 * as it is ok to set up the PCI bus without these files.
633 */
634void pci_create_legacy_files(struct pci_bus *b)
635{
636 int error;
637
638 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
639 GFP_ATOMIC);
640 if (!b->legacy_io)
641 goto kzalloc_err;
642
643 b->legacy_io->attr.name = "legacy_io";
644 b->legacy_io->size = 0xffff;
645 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
646 b->legacy_io->read = pci_read_legacy_io;
647 b->legacy_io->write = pci_write_legacy_io;
648 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 649 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
650 error = device_create_bin_file(&b->dev, b->legacy_io);
651 if (error)
652 goto legacy_io_err;
653
654 /* Allocated above after the legacy_io struct */
655 b->legacy_mem = b->legacy_io + 1;
656 b->legacy_mem->attr.name = "legacy_mem";
657 b->legacy_mem->size = 1024*1024;
658 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
659 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 660 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
661 error = device_create_bin_file(&b->dev, b->legacy_mem);
662 if (error)
663 goto legacy_mem_err;
664
665 return;
666
667legacy_mem_err:
668 device_remove_bin_file(&b->dev, b->legacy_io);
669legacy_io_err:
670 kfree(b->legacy_io);
671 b->legacy_io = NULL;
672kzalloc_err:
673 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
674 "and ISA memory resources to sysfs\n");
675 return;
676}
677
678void pci_remove_legacy_files(struct pci_bus *b)
679{
680 if (b->legacy_io) {
681 device_remove_bin_file(&b->dev, b->legacy_io);
682 device_remove_bin_file(&b->dev, b->legacy_mem);
683 kfree(b->legacy_io); /* both are allocated here */
684 }
1da177e4
LT
685}
686#endif /* HAVE_PCI_LEGACY */
687
688#ifdef HAVE_PCI_MMAP
b5ff7df3 689
9eff02e2 690int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
b5ff7df3
LT
691{
692 unsigned long nr, start, size;
693
694 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
695 start = vma->vm_pgoff;
88e7df0b 696 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
697 if (start < size && size - start >= nr)
698 return 1;
699 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
700 current->comm, start, start+nr, pci_name(pdev), resno, size);
701 return 0;
702}
703
1da177e4
LT
704/**
705 * pci_mmap_resource - map a PCI resource into user memory space
706 * @kobj: kobject for mapping
707 * @attr: struct bin_attribute for the file being mapped
708 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 709 * @write_combine: 1 for write_combine mapping
1da177e4
LT
710 *
711 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
712 */
713static int
714pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 715 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
716{
717 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
718 struct device, kobj));
719 struct resource *res = (struct resource *)attr->private;
720 enum pci_mmap_state mmap_type;
e31dd6e4 721 resource_size_t start, end;
2311b1f2 722 int i;
1da177e4 723
2311b1f2
ME
724 for (i = 0; i < PCI_ROM_RESOURCE; i++)
725 if (res == &pdev->resource[i])
726 break;
727 if (i >= PCI_ROM_RESOURCE)
728 return -ENODEV;
729
b5ff7df3
LT
730 if (!pci_mmap_fits(pdev, i, vma))
731 return -EINVAL;
732
2311b1f2
ME
733 /* pci_mmap_page_range() expects the same kind of entry as coming
734 * from /proc/bus/pci/ which is a "user visible" value. If this is
735 * different from the resource itself, arch will do necessary fixup.
736 */
737 pci_resource_to_user(pdev, i, res, &start, &end);
738 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
739 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
740
e8de1481
AV
741 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
742 return -EINVAL;
743
45aec1ae 744 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
745}
746
747static int
748pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
749 struct vm_area_struct *vma)
750{
751 return pci_mmap_resource(kobj, attr, vma, 0);
752}
753
754static int
755pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
756 struct vm_area_struct *vma)
757{
758 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
759}
760
b19441af
GKH
761/**
762 * pci_remove_resource_files - cleanup resource files
cffb2faf 763 * @pdev: dev to cleanup
b19441af 764 *
cffb2faf 765 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
766 * free their resources.
767 */
768static void
769pci_remove_resource_files(struct pci_dev *pdev)
770{
771 int i;
772
773 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
774 struct bin_attribute *res_attr;
775
776 res_attr = pdev->res_attr[i];
777 if (res_attr) {
778 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
779 kfree(res_attr);
780 }
45aec1ae 781
782 res_attr = pdev->res_attr_wc[i];
783 if (res_attr) {
784 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
785 kfree(res_attr);
786 }
b19441af
GKH
787 }
788}
789
45aec1ae 790static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
791{
792 /* allocate attribute structure, piggyback attribute name */
793 int name_len = write_combine ? 13 : 10;
794 struct bin_attribute *res_attr;
795 int retval;
796
797 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
798 if (res_attr) {
799 char *res_attr_name = (char *)(res_attr + 1);
800
801 if (write_combine) {
802 pdev->res_attr_wc[num] = res_attr;
803 sprintf(res_attr_name, "resource%d_wc", num);
804 res_attr->mmap = pci_mmap_resource_wc;
805 } else {
806 pdev->res_attr[num] = res_attr;
807 sprintf(res_attr_name, "resource%d", num);
808 res_attr->mmap = pci_mmap_resource_uc;
809 }
810 res_attr->attr.name = res_attr_name;
811 res_attr->attr.mode = S_IRUSR | S_IWUSR;
812 res_attr->size = pci_resource_len(pdev, num);
813 res_attr->private = &pdev->resource[num];
814 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
815 } else
816 retval = -ENOMEM;
817
818 return retval;
819}
820
1da177e4
LT
821/**
822 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 823 * @pdev: dev in question
1da177e4 824 *
cffb2faf 825 * Walk the resources in @pdev creating files for each resource available.
1da177e4 826 */
b19441af 827static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
828{
829 int i;
b19441af 830 int retval;
1da177e4
LT
831
832 /* Expose the PCI resources from this device as files */
833 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
834
835 /* skip empty resources */
836 if (!pci_resource_len(pdev, i))
837 continue;
838
45aec1ae 839 retval = pci_create_attr(pdev, i, 0);
840 /* for prefetchable resources, create a WC mappable file */
841 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
842 retval = pci_create_attr(pdev, i, 1);
843
844 if (retval) {
845 pci_remove_resource_files(pdev);
846 return retval;
1da177e4
LT
847 }
848 }
b19441af 849 return 0;
1da177e4
LT
850}
851#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
852int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
853void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
854#endif /* HAVE_PCI_MMAP */
855
856/**
857 * pci_write_rom - used to enable access to the PCI ROM display
858 * @kobj: kernel object handle
cffb2faf 859 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
860 * @buf: user input
861 * @off: file offset
862 * @count: number of byte in input
863 *
864 * writing anything except 0 enables it
865 */
866static ssize_t
91a69029
ZR
867pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
868 char *buf, loff_t off, size_t count)
1da177e4
LT
869{
870 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
871
872 if ((off == 0) && (*buf == '0') && (count == 2))
873 pdev->rom_attr_enabled = 0;
874 else
875 pdev->rom_attr_enabled = 1;
876
877 return count;
878}
879
880/**
881 * pci_read_rom - read a PCI ROM
882 * @kobj: kernel object handle
cffb2faf 883 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
884 * @buf: where to put the data we read from the ROM
885 * @off: file offset
886 * @count: number of bytes to read
887 *
888 * Put @count bytes starting at @off into @buf from the ROM in the PCI
889 * device corresponding to @kobj.
890 */
891static ssize_t
91a69029
ZR
892pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
893 char *buf, loff_t off, size_t count)
1da177e4
LT
894{
895 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
896 void __iomem *rom;
897 size_t size;
898
899 if (!pdev->rom_attr_enabled)
900 return -EINVAL;
901
902 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
903 if (!rom || !size)
904 return -EIO;
1da177e4
LT
905
906 if (off >= size)
907 count = 0;
908 else {
909 if (off + count > size)
910 count = size - off;
911
912 memcpy_fromio(buf, rom + off, count);
913 }
914 pci_unmap_rom(pdev, rom);
915
916 return count;
917}
918
919static struct bin_attribute pci_config_attr = {
920 .attr = {
921 .name = "config",
922 .mode = S_IRUGO | S_IWUSR,
1da177e4 923 },
557848c3 924 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
925 .read = pci_read_config,
926 .write = pci_write_config,
927};
928
929static struct bin_attribute pcie_config_attr = {
930 .attr = {
931 .name = "config",
932 .mode = S_IRUGO | S_IWUSR,
1da177e4 933 },
557848c3 934 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
935 .read = pci_read_config,
936 .write = pci_write_config,
937};
938
a2cd52ca 939int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 940{
a2cd52ca 941 return 0;
575e3348
ME
942}
943
711d5779
MT
944static ssize_t reset_store(struct device *dev,
945 struct device_attribute *attr, const char *buf,
946 size_t count)
947{
948 struct pci_dev *pdev = to_pci_dev(dev);
949 unsigned long val;
950 ssize_t result = strict_strtoul(buf, 0, &val);
951
952 if (result < 0)
953 return result;
954
955 if (val != 1)
956 return -EINVAL;
957 return pci_reset_function(pdev);
958}
959
960static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
961
280c73d3
ZY
962static int pci_create_capabilities_sysfs(struct pci_dev *dev)
963{
964 int retval;
965 struct bin_attribute *attr;
966
967 /* If the device has VPD, try to expose it in sysfs. */
968 if (dev->vpd) {
969 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
970 if (!attr)
971 return -ENOMEM;
972
973 attr->size = dev->vpd->len;
974 attr->attr.name = "vpd";
975 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
976 attr->read = read_vpd_attr;
977 attr->write = write_vpd_attr;
280c73d3
ZY
978 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
979 if (retval) {
980 kfree(dev->vpd->attr);
981 return retval;
982 }
983 dev->vpd->attr = attr;
984 }
985
986 /* Active State Power Management */
987 pcie_aspm_create_sysfs_dev_files(dev);
988
711d5779
MT
989 if (!pci_probe_reset_function(dev)) {
990 retval = device_create_file(&dev->dev, &reset_attr);
991 if (retval)
992 goto error;
993 dev->reset_fn = 1;
994 }
280c73d3 995 return 0;
711d5779
MT
996
997error:
998 pcie_aspm_remove_sysfs_dev_files(dev);
999 if (dev->vpd && dev->vpd->attr) {
1000 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1001 kfree(dev->vpd->attr);
1002 }
1003
1004 return retval;
280c73d3
ZY
1005}
1006
b19441af 1007int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1008{
b19441af 1009 int retval;
280c73d3
ZY
1010 int rom_size = 0;
1011 struct bin_attribute *attr;
b19441af 1012
1da177e4
LT
1013 if (!sysfs_initialized)
1014 return -EACCES;
1015
557848c3 1016 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1017 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1018 else
b19441af
GKH
1019 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1020 if (retval)
1021 goto err;
1da177e4 1022
b19441af
GKH
1023 retval = pci_create_resource_files(pdev);
1024 if (retval)
280c73d3
ZY
1025 goto err_config_file;
1026
1027 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1028 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1029 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1030 rom_size = 0x20000;
1da177e4
LT
1031
1032 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1033 if (rom_size) {
94e61088 1034 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1035 if (!attr) {
b19441af 1036 retval = -ENOMEM;
9890b12a 1037 goto err_resource_files;
1da177e4 1038 }
280c73d3
ZY
1039 attr->size = rom_size;
1040 attr->attr.name = "rom";
1041 attr->attr.mode = S_IRUSR;
1042 attr->read = pci_read_rom;
1043 attr->write = pci_write_rom;
1044 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1045 if (retval) {
1046 kfree(attr);
1047 goto err_resource_files;
1048 }
1049 pdev->rom_attr = attr;
1da177e4 1050 }
280c73d3 1051
217f45de
DA
1052 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1053 retval = device_create_file(&pdev->dev, &vga_attr);
1054 if (retval)
1055 goto err_rom_file;
1056 }
1057
1da177e4 1058 /* add platform-specific attributes */
280c73d3
ZY
1059 retval = pcibios_add_platform_entries(pdev);
1060 if (retval)
217f45de 1061 goto err_vga_file;
b19441af 1062
280c73d3
ZY
1063 /* add sysfs entries for various capabilities */
1064 retval = pci_create_capabilities_sysfs(pdev);
1065 if (retval)
217f45de 1066 goto err_vga_file;
7d715a6c 1067
1da177e4 1068 return 0;
b19441af 1069
217f45de
DA
1070err_vga_file:
1071 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1072 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 1073err_rom_file:
280c73d3 1074 if (rom_size) {
94e61088 1075 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1076 kfree(pdev->rom_attr);
1077 pdev->rom_attr = NULL;
1078 }
9890b12a
ME
1079err_resource_files:
1080 pci_remove_resource_files(pdev);
94e61088 1081err_config_file:
557848c3 1082 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1083 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1084 else
1085 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1086err:
1087 return retval;
1da177e4
LT
1088}
1089
280c73d3
ZY
1090static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1091{
1092 if (dev->vpd && dev->vpd->attr) {
1093 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1094 kfree(dev->vpd->attr);
1095 }
1096
1097 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1098 if (dev->reset_fn) {
1099 device_remove_file(&dev->dev, &reset_attr);
1100 dev->reset_fn = 0;
1101 }
280c73d3
ZY
1102}
1103
1da177e4
LT
1104/**
1105 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1106 * @pdev: device whose entries we should free
1107 *
1108 * Cleanup when @pdev is removed from sysfs.
1109 */
1110void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1111{
280c73d3
ZY
1112 int rom_size = 0;
1113
d67afe5e
DM
1114 if (!sysfs_initialized)
1115 return;
1116
280c73d3 1117 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1118
557848c3 1119 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1120 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1121 else
1122 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1123
1124 pci_remove_resource_files(pdev);
1125
280c73d3
ZY
1126 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1127 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1128 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1129 rom_size = 0x20000;
1130
1131 if (rom_size && pdev->rom_attr) {
1132 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1133 kfree(pdev->rom_attr);
1da177e4
LT
1134 }
1135}
1136
1137static int __init pci_sysfs_init(void)
1138{
1139 struct pci_dev *pdev = NULL;
b19441af
GKH
1140 int retval;
1141
1da177e4 1142 sysfs_initialized = 1;
b19441af
GKH
1143 for_each_pci_dev(pdev) {
1144 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1145 if (retval) {
1146 pci_dev_put(pdev);
b19441af 1147 return retval;
151fc5df 1148 }
b19441af 1149 }
1da177e4
LT
1150
1151 return 0;
1152}
1153
40ee9e9f 1154late_initcall(pci_sysfs_init);