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PCI: Add decoding for 16 GT/s link speed
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CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * drivers/pci/pci-sysfs.c
4 *
5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
6 * (C) Copyright 2002-2004 IBM Corp.
7 * (C) Copyright 2003 Matthew Wilcox
8 * (C) Copyright 2003 Hewlett-Packard
9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
11 *
12 * File attributes for PCI devices
13 *
f7625980 14 * Modeled after usb's driverfs.c
1da177e4
LT
15 *
16 */
17
18
1da177e4 19#include <linux/kernel.h>
b5ff7df3 20#include <linux/sched.h>
1da177e4
LT
21#include <linux/pci.h>
22#include <linux/stat.h>
363c75db 23#include <linux/export.h>
1da177e4
LT
24#include <linux/topology.h>
25#include <linux/mm.h>
de139a33 26#include <linux/fs.h>
aa0ac365 27#include <linux/capability.h>
a628e7b8 28#include <linux/security.h>
7d715a6c 29#include <linux/pci-aspm.h>
5a0e3ad6 30#include <linux/slab.h>
1a39b310 31#include <linux/vgaarb.h>
448bd857 32#include <linux/pm_runtime.h>
dfc73e7a 33#include <linux/of.h>
1da177e4
LT
34#include "pci.h"
35
36static int sysfs_initialized; /* = 0 */
37
38/* show configuration fields */
39#define pci_config_attr(field, format_string) \
40static ssize_t \
e404e274 41field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
42{ \
43 struct pci_dev *pdev; \
44 \
3c78bc61
RD
45 pdev = to_pci_dev(dev); \
46 return sprintf(buf, format_string, pdev->field); \
5136b2da
GKH
47} \
48static DEVICE_ATTR_RO(field)
1da177e4
LT
49
50pci_config_attr(vendor, "0x%04x\n");
51pci_config_attr(device, "0x%04x\n");
52pci_config_attr(subsystem_vendor, "0x%04x\n");
53pci_config_attr(subsystem_device, "0x%04x\n");
702ed3be 54pci_config_attr(revision, "0x%02x\n");
1da177e4
LT
55pci_config_attr(class, "0x%06x\n");
56pci_config_attr(irq, "%u\n");
57
bdee9d98
DT
58static ssize_t broken_parity_status_show(struct device *dev,
59 struct device_attribute *attr,
60 char *buf)
61{
62 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 63 return sprintf(buf, "%u\n", pdev->broken_parity_status);
bdee9d98
DT
64}
65
66static ssize_t broken_parity_status_store(struct device *dev,
67 struct device_attribute *attr,
68 const char *buf, size_t count)
69{
70 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 71 unsigned long val;
bdee9d98 72
9a994e8e 73 if (kstrtoul(buf, 0, &val) < 0)
92425a40
TP
74 return -EINVAL;
75
76 pdev->broken_parity_status = !!val;
77
78 return count;
bdee9d98 79}
5136b2da 80static DEVICE_ATTR_RW(broken_parity_status);
bdee9d98 81
5aaba363 82static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
3c78bc61 83 struct device_attribute *attr, char *buf)
c489f5fb 84{
3be83050 85 const struct cpumask *mask;
4327edf6 86
e0cd5160 87#ifdef CONFIG_NUMA
6be954d1
DJ
88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
89 cpumask_of_node(dev_to_node(dev));
e0cd5160 90#else
3be83050 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 92#endif
5aaba363 93 return cpumap_print_to_pagebuf(list, buf, mask);
39106dcf
MT
94}
95
c489f5fb 96static ssize_t local_cpus_show(struct device *dev,
3c78bc61 97 struct device_attribute *attr, char *buf)
c489f5fb 98{
5aaba363 99 return pci_dev_show_local_cpu(dev, false, attr, buf);
c489f5fb 100}
5136b2da 101static DEVICE_ATTR_RO(local_cpus);
39106dcf
MT
102
103static ssize_t local_cpulist_show(struct device *dev,
3c78bc61 104 struct device_attribute *attr, char *buf)
39106dcf 105{
5aaba363 106 return pci_dev_show_local_cpu(dev, true, attr, buf);
1da177e4 107}
5136b2da 108static DEVICE_ATTR_RO(local_cpulist);
1da177e4 109
dc2c2c9d
YL
110/*
111 * PCI Bus Class Devices
112 */
56039e65
GKH
113static ssize_t cpuaffinity_show(struct device *dev,
114 struct device_attribute *attr, char *buf)
dc2c2c9d 115{
5aaba363
SH
116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
117
118 return cpumap_print_to_pagebuf(false, buf, cpumask);
dc2c2c9d 119}
56039e65 120static DEVICE_ATTR_RO(cpuaffinity);
dc2c2c9d 121
56039e65
GKH
122static ssize_t cpulistaffinity_show(struct device *dev,
123 struct device_attribute *attr, char *buf)
dc2c2c9d 124{
5aaba363
SH
125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126
127 return cpumap_print_to_pagebuf(true, buf, cpumask);
dc2c2c9d 128}
56039e65 129static DEVICE_ATTR_RO(cpulistaffinity);
dc2c2c9d 130
1da177e4 131/* show resources */
3c78bc61
RD
132static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
133 char *buf)
1da177e4 134{
3c78bc61
RD
135 struct pci_dev *pci_dev = to_pci_dev(dev);
136 char *str = buf;
1da177e4 137 int i;
fde09c6d 138 int max;
e31dd6e4 139 resource_size_t start, end;
1da177e4
LT
140
141 if (pci_dev->subordinate)
142 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
143 else
144 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
145
146 for (i = 0; i < max; i++) {
2311b1f2
ME
147 struct resource *res = &pci_dev->resource[i];
148 pci_resource_to_user(pci_dev, i, res, &start, &end);
3c78bc61 149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
2311b1f2
ME
150 (unsigned long long)start,
151 (unsigned long long)end,
152 (unsigned long long)res->flags);
1da177e4
LT
153 }
154 return (str - buf);
155}
5136b2da 156static DEVICE_ATTR_RO(resource);
1da177e4 157
56c1af46
WVK
158static ssize_t max_link_speed_show(struct device *dev,
159 struct device_attribute *attr, char *buf)
160{
161 struct pci_dev *pci_dev = to_pci_dev(dev);
162 u32 linkcap;
163 int err;
164 const char *speed;
165
166 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
167 if (err)
168 return -EINVAL;
169
170 switch (linkcap & PCI_EXP_LNKCAP_SLS) {
ac924662 171 case PCI_EXP_LNKCAP_SLS_16_0GB:
172 speed = "16 GT/s";
173 break;
56c1af46
WVK
174 case PCI_EXP_LNKCAP_SLS_8_0GB:
175 speed = "8 GT/s";
176 break;
177 case PCI_EXP_LNKCAP_SLS_5_0GB:
178 speed = "5 GT/s";
179 break;
180 case PCI_EXP_LNKCAP_SLS_2_5GB:
181 speed = "2.5 GT/s";
182 break;
183 default:
184 speed = "Unknown speed";
185 }
186
187 return sprintf(buf, "%s\n", speed);
188}
189static DEVICE_ATTR_RO(max_link_speed);
190
191static ssize_t max_link_width_show(struct device *dev,
192 struct device_attribute *attr, char *buf)
193{
194 struct pci_dev *pci_dev = to_pci_dev(dev);
195 u32 linkcap;
196 int err;
197
198 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap);
199 if (err)
200 return -EINVAL;
201
202 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4);
203}
204static DEVICE_ATTR_RO(max_link_width);
205
206static ssize_t current_link_speed_show(struct device *dev,
207 struct device_attribute *attr, char *buf)
208{
209 struct pci_dev *pci_dev = to_pci_dev(dev);
210 u16 linkstat;
211 int err;
212 const char *speed;
213
214 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
215 if (err)
216 return -EINVAL;
217
218 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
ac924662 219 case PCI_EXP_LNKSTA_CLS_16_0GB:
220 speed = "16 GT/s";
221 break;
56c1af46
WVK
222 case PCI_EXP_LNKSTA_CLS_8_0GB:
223 speed = "8 GT/s";
224 break;
225 case PCI_EXP_LNKSTA_CLS_5_0GB:
226 speed = "5 GT/s";
227 break;
228 case PCI_EXP_LNKSTA_CLS_2_5GB:
229 speed = "2.5 GT/s";
230 break;
231 default:
232 speed = "Unknown speed";
233 }
234
235 return sprintf(buf, "%s\n", speed);
236}
237static DEVICE_ATTR_RO(current_link_speed);
238
239static ssize_t current_link_width_show(struct device *dev,
240 struct device_attribute *attr, char *buf)
241{
242 struct pci_dev *pci_dev = to_pci_dev(dev);
243 u16 linkstat;
244 int err;
245
246 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
247 if (err)
248 return -EINVAL;
249
250 return sprintf(buf, "%u\n",
251 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
252}
253static DEVICE_ATTR_RO(current_link_width);
254
255static ssize_t secondary_bus_number_show(struct device *dev,
256 struct device_attribute *attr,
257 char *buf)
258{
259 struct pci_dev *pci_dev = to_pci_dev(dev);
260 u8 sec_bus;
261 int err;
262
263 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
264 if (err)
265 return -EINVAL;
266
267 return sprintf(buf, "%u\n", sec_bus);
268}
269static DEVICE_ATTR_RO(secondary_bus_number);
270
271static ssize_t subordinate_bus_number_show(struct device *dev,
272 struct device_attribute *attr,
273 char *buf)
274{
275 struct pci_dev *pci_dev = to_pci_dev(dev);
276 u8 sub_bus;
277 int err;
278
279 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
280 if (err)
281 return -EINVAL;
282
283 return sprintf(buf, "%u\n", sub_bus);
284}
285static DEVICE_ATTR_RO(subordinate_bus_number);
286
3c78bc61
RD
287static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
288 char *buf)
9888549e
GKH
289{
290 struct pci_dev *pci_dev = to_pci_dev(dev);
291
89ec3dcf 292 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
9888549e
GKH
293 pci_dev->vendor, pci_dev->device,
294 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
295 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
296 (u8)(pci_dev->class));
297}
5136b2da 298static DEVICE_ATTR_RO(modalias);
bae94d02 299
d8e7d53a 300static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
3c78bc61 301 const char *buf, size_t count)
9f125d30
AV
302{
303 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 304 unsigned long val;
9a994e8e 305 ssize_t result = kstrtoul(buf, 0, &val);
92425a40
TP
306
307 if (result < 0)
308 return result;
9f125d30
AV
309
310 /* this can crash the machine when done on the "wrong" device */
311 if (!capable(CAP_SYS_ADMIN))
92425a40 312 return -EPERM;
9f125d30 313
92425a40 314 if (!val) {
296ccb08 315 if (pci_is_enabled(pdev))
bae94d02
IPG
316 pci_disable_device(pdev);
317 else
318 result = -EIO;
92425a40 319 } else
bae94d02 320 result = pci_enable_device(pdev);
9f125d30 321
bae94d02
IPG
322 return result < 0 ? result : count;
323}
324
d8e7d53a 325static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
3c78bc61 326 char *buf)
bae94d02
IPG
327{
328 struct pci_dev *pdev;
9f125d30 329
3c78bc61
RD
330 pdev = to_pci_dev(dev);
331 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30 332}
d8e7d53a 333static DEVICE_ATTR_RW(enable);
9f125d30 334
81bb0e19 335#ifdef CONFIG_NUMA
63692df1
PB
336static ssize_t numa_node_store(struct device *dev,
337 struct device_attribute *attr, const char *buf,
338 size_t count)
339{
340 struct pci_dev *pdev = to_pci_dev(dev);
341 int node, ret;
342
343 if (!capable(CAP_SYS_ADMIN))
344 return -EPERM;
345
346 ret = kstrtoint(buf, 0, &node);
347 if (ret)
348 return ret;
349
3dcc8d39
MK
350 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
351 return -EINVAL;
352
353 if (node != NUMA_NO_NODE && !node_online(node))
63692df1
PB
354 return -EINVAL;
355
356 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
357 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
358 node);
359
360 dev->numa_node = node;
361 return count;
362}
363
3c78bc61
RD
364static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
365 char *buf)
81bb0e19 366{
3c78bc61 367 return sprintf(buf, "%d\n", dev->numa_node);
81bb0e19 368}
63692df1 369static DEVICE_ATTR_RW(numa_node);
81bb0e19
BG
370#endif
371
3c78bc61
RD
372static ssize_t dma_mask_bits_show(struct device *dev,
373 struct device_attribute *attr, char *buf)
bb965401
YL
374{
375 struct pci_dev *pdev = to_pci_dev(dev);
376
3c78bc61 377 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
bb965401 378}
5136b2da 379static DEVICE_ATTR_RO(dma_mask_bits);
bb965401 380
3c78bc61
RD
381static ssize_t consistent_dma_mask_bits_show(struct device *dev,
382 struct device_attribute *attr,
383 char *buf)
bb965401 384{
3c78bc61 385 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
bb965401 386}
5136b2da 387static DEVICE_ATTR_RO(consistent_dma_mask_bits);
bb965401 388
3c78bc61
RD
389static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
390 char *buf)
fe97064c
BG
391{
392 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 393 struct pci_bus *subordinate = pdev->subordinate;
fe97064c 394
468ff15a
YW
395 return sprintf(buf, "%u\n", subordinate ?
396 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
397 : !pdev->no_msi);
fe97064c
BG
398}
399
3c78bc61
RD
400static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
401 const char *buf, size_t count)
fe97064c
BG
402{
403 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 404 struct pci_bus *subordinate = pdev->subordinate;
92425a40
TP
405 unsigned long val;
406
9a994e8e 407 if (kstrtoul(buf, 0, &val) < 0)
92425a40 408 return -EINVAL;
fe97064c 409
fe97064c 410 if (!capable(CAP_SYS_ADMIN))
92425a40 411 return -EPERM;
fe97064c 412
f7625980 413 /*
468ff15a
YW
414 * "no_msi" and "bus_flags" only affect what happens when a driver
415 * requests MSI or MSI-X. They don't affect any drivers that have
416 * already requested MSI or MSI-X.
f7625980 417 */
468ff15a
YW
418 if (!subordinate) {
419 pdev->no_msi = !val;
420 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
421 val ? "allowed" : "disallowed");
fe97064c 422 return count;
fe97064c
BG
423 }
424
468ff15a
YW
425 if (val)
426 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
427 else
428 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
429
430 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
431 val ? "allowed" : "disallowed");
fe97064c
BG
432 return count;
433}
5136b2da 434static DEVICE_ATTR_RW(msi_bus);
9888549e 435
705b1aaa
AC
436static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
437 size_t count)
438{
439 unsigned long val;
440 struct pci_bus *b = NULL;
441
9a994e8e 442 if (kstrtoul(buf, 0, &val) < 0)
705b1aaa
AC
443 return -EINVAL;
444
445 if (val) {
9d16947b 446 pci_lock_rescan_remove();
705b1aaa
AC
447 while ((b = pci_find_next_bus(b)) != NULL)
448 pci_rescan_bus(b);
9d16947b 449 pci_unlock_rescan_remove();
705b1aaa
AC
450 }
451 return count;
452}
0f49ba55 453static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
705b1aaa 454
bf22c90f 455static struct attribute *pci_bus_attrs[] = {
0f49ba55
GKH
456 &bus_attr_rescan.attr,
457 NULL,
458};
459
460static const struct attribute_group pci_bus_group = {
461 .attrs = pci_bus_attrs,
462};
463
464const struct attribute_group *pci_bus_groups[] = {
465 &pci_bus_group,
466 NULL,
705b1aaa 467};
77c27c7b 468
3c78bc61
RD
469static ssize_t dev_rescan_store(struct device *dev,
470 struct device_attribute *attr, const char *buf,
471 size_t count)
738a6396
AC
472{
473 unsigned long val;
474 struct pci_dev *pdev = to_pci_dev(dev);
475
9a994e8e 476 if (kstrtoul(buf, 0, &val) < 0)
738a6396
AC
477 return -EINVAL;
478
479 if (val) {
9d16947b 480 pci_lock_rescan_remove();
738a6396 481 pci_rescan_bus(pdev->bus);
9d16947b 482 pci_unlock_rescan_remove();
738a6396
AC
483 }
484 return count;
485}
bf22c90f
SK
486static struct device_attribute dev_rescan_attr = __ATTR(rescan,
487 (S_IWUSR|S_IWGRP),
488 NULL, dev_rescan_store);
738a6396 489
3c78bc61
RD
490static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
491 const char *buf, size_t count)
77c27c7b 492{
77c27c7b 493 unsigned long val;
77c27c7b 494
9a994e8e 495 if (kstrtoul(buf, 0, &val) < 0)
77c27c7b
AC
496 return -EINVAL;
497
bc6caf02
TH
498 if (val && device_remove_file_self(dev, attr))
499 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
77c27c7b
AC
500 return count;
501}
bf22c90f
SK
502static struct device_attribute dev_remove_attr = __ATTR(remove,
503 (S_IWUSR|S_IWGRP),
504 NULL, remove_store);
b9d320fc 505
3c78bc61
RD
506static ssize_t dev_bus_rescan_store(struct device *dev,
507 struct device_attribute *attr,
508 const char *buf, size_t count)
b9d320fc
YL
509{
510 unsigned long val;
511 struct pci_bus *bus = to_pci_bus(dev);
512
9a994e8e 513 if (kstrtoul(buf, 0, &val) < 0)
b9d320fc
YL
514 return -EINVAL;
515
516 if (val) {
9d16947b 517 pci_lock_rescan_remove();
2f320521
YL
518 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
519 pci_rescan_bus_bridge_resize(bus->self);
520 else
521 pci_rescan_bus(bus);
9d16947b 522 pci_unlock_rescan_remove();
b9d320fc
YL
523 }
524 return count;
525}
56039e65 526static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
b9d320fc 527
fbb988be 528#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
448bd857
HY
529static ssize_t d3cold_allowed_store(struct device *dev,
530 struct device_attribute *attr,
531 const char *buf, size_t count)
532{
533 struct pci_dev *pdev = to_pci_dev(dev);
534 unsigned long val;
535
9a994e8e 536 if (kstrtoul(buf, 0, &val) < 0)
448bd857
HY
537 return -EINVAL;
538
539 pdev->d3cold_allowed = !!val;
9d26d3a8
MW
540 if (pdev->d3cold_allowed)
541 pci_d3cold_enable(pdev);
542 else
543 pci_d3cold_disable(pdev);
544
448bd857
HY
545 pm_runtime_resume(dev);
546
547 return count;
548}
549
550static ssize_t d3cold_allowed_show(struct device *dev,
551 struct device_attribute *attr, char *buf)
552{
553 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 554 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
448bd857 555}
5136b2da 556static DEVICE_ATTR_RW(d3cold_allowed);
448bd857
HY
557#endif
558
dfc73e7a
SO
559#ifdef CONFIG_OF
560static ssize_t devspec_show(struct device *dev,
561 struct device_attribute *attr, char *buf)
562{
563 struct pci_dev *pdev = to_pci_dev(dev);
564 struct device_node *np = pci_device_to_OF_node(pdev);
565
b63773a8 566 if (np == NULL)
dfc73e7a 567 return 0;
b63773a8 568 return sprintf(buf, "%pOF", np);
dfc73e7a
SO
569}
570static DEVICE_ATTR_RO(devspec);
571#endif
572
1789382a
DD
573#ifdef CONFIG_PCI_IOV
574static ssize_t sriov_totalvfs_show(struct device *dev,
575 struct device_attribute *attr,
576 char *buf)
577{
578 struct pci_dev *pdev = to_pci_dev(dev);
579
bff73156 580 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
581}
582
583
584static ssize_t sriov_numvfs_show(struct device *dev,
585 struct device_attribute *attr,
586 char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589
6b136724 590 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
1789382a
DD
591}
592
593/*
faa48a50
BH
594 * num_vfs > 0; number of VFs to enable
595 * num_vfs = 0; disable all VFs
1789382a
DD
596 *
597 * Note: SRIOV spec doesn't allow partial VF
faa48a50 598 * disable, so it's all or none.
1789382a
DD
599 */
600static ssize_t sriov_numvfs_store(struct device *dev,
601 struct device_attribute *attr,
602 const char *buf, size_t count)
603{
604 struct pci_dev *pdev = to_pci_dev(dev);
faa48a50
BH
605 int ret;
606 u16 num_vfs;
1789382a 607
faa48a50
BH
608 ret = kstrtou16(buf, 0, &num_vfs);
609 if (ret < 0)
610 return ret;
611
612 if (num_vfs > pci_sriov_get_totalvfs(pdev))
613 return -ERANGE;
614
17530e71 615 device_lock(&pdev->dev);
5b0948df 616
faa48a50 617 if (num_vfs == pdev->sriov->num_VFs)
5b0948df 618 goto exit;
1789382a
DD
619
620 /* is PF driver loaded w/callback */
621 if (!pdev->driver || !pdev->driver->sriov_configure) {
faa48a50 622 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
5b0948df
ET
623 ret = -ENOENT;
624 goto exit;
1789382a
DD
625 }
626
faa48a50
BH
627 if (num_vfs == 0) {
628 /* disable VFs */
629 ret = pdev->driver->sriov_configure(pdev, 0);
5b0948df 630 goto exit;
1789382a
DD
631 }
632
faa48a50
BH
633 /* enable VFs */
634 if (pdev->sriov->num_VFs) {
635 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
636 pdev->sriov->num_VFs, num_vfs);
5b0948df
ET
637 ret = -EBUSY;
638 goto exit;
1789382a
DD
639 }
640
faa48a50
BH
641 ret = pdev->driver->sriov_configure(pdev, num_vfs);
642 if (ret < 0)
5b0948df 643 goto exit;
1789382a 644
faa48a50
BH
645 if (ret != num_vfs)
646 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
647 num_vfs, ret);
648
5b0948df 649exit:
17530e71 650 device_unlock(&pdev->dev);
5b0948df
ET
651
652 if (ret < 0)
653 return ret;
654
faa48a50 655 return count;
1789382a
DD
656}
657
7dfca152
FS
658static ssize_t sriov_offset_show(struct device *dev,
659 struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663
664 return sprintf(buf, "%u\n", pdev->sriov->offset);
665}
666
667static ssize_t sriov_stride_show(struct device *dev,
668 struct device_attribute *attr,
669 char *buf)
670{
671 struct pci_dev *pdev = to_pci_dev(dev);
672
673 return sprintf(buf, "%u\n", pdev->sriov->stride);
674}
675
676static ssize_t sriov_vf_device_show(struct device *dev,
677 struct device_attribute *attr,
678 char *buf)
679{
680 struct pci_dev *pdev = to_pci_dev(dev);
681
682 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
683}
684
0e7df224
BW
685static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
686 struct device_attribute *attr,
687 char *buf)
688{
689 struct pci_dev *pdev = to_pci_dev(dev);
690
691 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
692}
693
694static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
695 struct device_attribute *attr,
696 const char *buf, size_t count)
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 bool drivers_autoprobe;
700
701 if (kstrtobool(buf, &drivers_autoprobe) < 0)
702 return -EINVAL;
703
704 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
705
706 return count;
707}
708
1789382a
DD
709static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
710static struct device_attribute sriov_numvfs_attr =
711 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
712 sriov_numvfs_show, sriov_numvfs_store);
7dfca152
FS
713static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
714static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
715static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
0e7df224
BW
716static struct device_attribute sriov_drivers_autoprobe_attr =
717 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
718 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
1789382a
DD
719#endif /* CONFIG_PCI_IOV */
720
782a985d
AW
721static ssize_t driver_override_store(struct device *dev,
722 struct device_attribute *attr,
723 const char *buf, size_t count)
724{
725 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 726 char *driver_override, *old, *cp;
782a985d 727
4efe874a
SL
728 /* We need to keep extra room for a newline */
729 if (count >= (PAGE_SIZE - 1))
782a985d
AW
730 return -EINVAL;
731
732 driver_override = kstrndup(buf, count, GFP_KERNEL);
733 if (!driver_override)
734 return -ENOMEM;
735
736 cp = strchr(driver_override, '\n');
737 if (cp)
738 *cp = '\0';
739
9561475d
NS
740 device_lock(dev);
741 old = pdev->driver_override;
782a985d
AW
742 if (strlen(driver_override)) {
743 pdev->driver_override = driver_override;
744 } else {
745 kfree(driver_override);
746 pdev->driver_override = NULL;
747 }
9561475d 748 device_unlock(dev);
782a985d
AW
749
750 kfree(old);
751
752 return count;
753}
754
755static ssize_t driver_override_show(struct device *dev,
756 struct device_attribute *attr, char *buf)
757{
758 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 759 ssize_t len;
782a985d 760
9561475d
NS
761 device_lock(dev);
762 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
763 device_unlock(dev);
764 return len;
782a985d
AW
765}
766static DEVICE_ATTR_RW(driver_override);
767
bf22c90f 768static struct attribute *pci_dev_attrs[] = {
5136b2da
GKH
769 &dev_attr_resource.attr,
770 &dev_attr_vendor.attr,
771 &dev_attr_device.attr,
772 &dev_attr_subsystem_vendor.attr,
773 &dev_attr_subsystem_device.attr,
702ed3be 774 &dev_attr_revision.attr,
5136b2da
GKH
775 &dev_attr_class.attr,
776 &dev_attr_irq.attr,
777 &dev_attr_local_cpus.attr,
778 &dev_attr_local_cpulist.attr,
779 &dev_attr_modalias.attr,
81bb0e19 780#ifdef CONFIG_NUMA
5136b2da 781 &dev_attr_numa_node.attr,
81bb0e19 782#endif
5136b2da
GKH
783 &dev_attr_dma_mask_bits.attr,
784 &dev_attr_consistent_dma_mask_bits.attr,
d8e7d53a 785 &dev_attr_enable.attr,
5136b2da
GKH
786 &dev_attr_broken_parity_status.attr,
787 &dev_attr_msi_bus.attr,
fbb988be 788#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
5136b2da 789 &dev_attr_d3cold_allowed.attr,
dfc73e7a
SO
790#endif
791#ifdef CONFIG_OF
792 &dev_attr_devspec.attr,
77c27c7b 793#endif
782a985d 794 &dev_attr_driver_override.attr,
5136b2da
GKH
795 NULL,
796};
797
56c1af46
WVK
798static struct attribute *pci_bridge_attrs[] = {
799 &dev_attr_subordinate_bus_number.attr,
800 &dev_attr_secondary_bus_number.attr,
801 NULL,
5136b2da
GKH
802};
803
56c1af46
WVK
804static struct attribute *pcie_dev_attrs[] = {
805 &dev_attr_current_link_speed.attr,
806 &dev_attr_current_link_width.attr,
807 &dev_attr_max_link_width.attr,
808 &dev_attr_max_link_speed.attr,
5136b2da 809 NULL,
1da177e4
LT
810};
811
56039e65
GKH
812static struct attribute *pcibus_attrs[] = {
813 &dev_attr_rescan.attr,
814 &dev_attr_cpuaffinity.attr,
815 &dev_attr_cpulistaffinity.attr,
816 NULL,
817};
818
819static const struct attribute_group pcibus_group = {
820 .attrs = pcibus_attrs,
821};
822
823const struct attribute_group *pcibus_groups[] = {
824 &pcibus_group,
825 NULL,
b9d320fc
YL
826};
827
3c78bc61
RD
828static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
829 char *buf)
217f45de
DA
830{
831 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
832 struct pci_dev *vga_dev = vga_default_device();
833
834 if (vga_dev)
835 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
836
837 return sprintf(buf, "%u\n",
838 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
839 IORESOURCE_ROM_SHADOW));
840}
bf22c90f 841static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
217f45de 842
3c78bc61
RD
843static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
844 struct bin_attribute *bin_attr, char *buf,
845 loff_t off, size_t count)
1da177e4 846{
554a6037 847 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
848 unsigned int size = 64;
849 loff_t init_off = off;
3c78bc61 850 u8 *data = (u8 *) buf;
1da177e4
LT
851
852 /* Several chips lock up trying to read undefined config space */
ab0fa82b 853 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
1da177e4 854 size = dev->cfg_size;
3c78bc61 855 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1da177e4 856 size = 128;
1da177e4
LT
857
858 if (off > size)
859 return 0;
860 if (off + count > size) {
861 size -= off;
862 count = size;
863 } else {
864 size = count;
865 }
866
3d8387ef
HY
867 pci_config_pm_runtime_get(dev);
868
4c0619ad
SS
869 if ((off & 1) && size) {
870 u8 val;
e04b0ea2 871 pci_user_read_config_byte(dev, off, &val);
4c0619ad 872 data[off - init_off] = val;
1da177e4 873 off++;
4c0619ad
SS
874 size--;
875 }
876
877 if ((off & 3) && size > 2) {
878 u16 val;
e04b0ea2 879 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
880 data[off - init_off] = val & 0xff;
881 data[off - init_off + 1] = (val >> 8) & 0xff;
882 off += 2;
883 size -= 2;
1da177e4
LT
884 }
885
886 while (size > 3) {
4c0619ad 887 u32 val;
e04b0ea2 888 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
889 data[off - init_off] = val & 0xff;
890 data[off - init_off + 1] = (val >> 8) & 0xff;
891 data[off - init_off + 2] = (val >> 16) & 0xff;
892 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
893 off += 4;
894 size -= 4;
895 }
896
4c0619ad
SS
897 if (size >= 2) {
898 u16 val;
e04b0ea2 899 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
900 data[off - init_off] = val & 0xff;
901 data[off - init_off + 1] = (val >> 8) & 0xff;
902 off += 2;
903 size -= 2;
904 }
905
906 if (size > 0) {
907 u8 val;
e04b0ea2 908 pci_user_read_config_byte(dev, off, &val);
4c0619ad 909 data[off - init_off] = val;
1da177e4
LT
910 off++;
911 --size;
912 }
913
3d8387ef
HY
914 pci_config_pm_runtime_put(dev);
915
1da177e4
LT
916 return count;
917}
918
3c78bc61
RD
919static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
920 struct bin_attribute *bin_attr, char *buf,
921 loff_t off, size_t count)
1da177e4 922{
554a6037 923 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
924 unsigned int size = count;
925 loff_t init_off = off;
3c78bc61 926 u8 *data = (u8 *) buf;
1da177e4 927
cf53ecd8
MG
928 if (kernel_is_locked_down("Direct PCI access"))
929 return -EPERM;
930
1da177e4
LT
931 if (off > dev->cfg_size)
932 return 0;
933 if (off + count > dev->cfg_size) {
934 size = dev->cfg_size - off;
935 count = size;
936 }
f7625980 937
3d8387ef
HY
938 pci_config_pm_runtime_get(dev);
939
4c0619ad 940 if ((off & 1) && size) {
e04b0ea2 941 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 942 off++;
4c0619ad 943 size--;
1da177e4 944 }
f7625980 945
4c0619ad
SS
946 if ((off & 3) && size > 2) {
947 u16 val = data[off - init_off];
948 val |= (u16) data[off - init_off + 1] << 8;
3c78bc61
RD
949 pci_user_write_config_word(dev, off, val);
950 off += 2;
951 size -= 2;
952 }
1da177e4
LT
953
954 while (size > 3) {
4c0619ad
SS
955 u32 val = data[off - init_off];
956 val |= (u32) data[off - init_off + 1] << 8;
957 val |= (u32) data[off - init_off + 2] << 16;
958 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 959 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
960 off += 4;
961 size -= 4;
962 }
f7625980 963
4c0619ad
SS
964 if (size >= 2) {
965 u16 val = data[off - init_off];
966 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 967 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
968 off += 2;
969 size -= 2;
970 }
1da177e4 971
4c0619ad 972 if (size) {
e04b0ea2 973 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
974 off++;
975 --size;
976 }
977
3d8387ef
HY
978 pci_config_pm_runtime_put(dev);
979
1da177e4
LT
980 return count;
981}
982
3c78bc61
RD
983static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
984 struct bin_attribute *bin_attr, char *buf,
985 loff_t off, size_t count)
94e61088 986{
554a6037 987 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
94e61088 988
f52e5629
HR
989 if (bin_attr->size > 0) {
990 if (off > bin_attr->size)
991 count = 0;
992 else if (count > bin_attr->size - off)
993 count = bin_attr->size - off;
994 }
94e61088 995
287d19ce 996 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
997}
998
3c78bc61
RD
999static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
1000 struct bin_attribute *bin_attr, char *buf,
1001 loff_t off, size_t count)
94e61088 1002{
554a6037 1003 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
94e61088 1004
f52e5629
HR
1005 if (bin_attr->size > 0) {
1006 if (off > bin_attr->size)
1007 count = 0;
1008 else if (count > bin_attr->size - off)
1009 count = bin_attr->size - off;
1010 }
94e61088 1011
287d19ce 1012 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
1013}
1014
1da177e4
LT
1015#ifdef HAVE_PCI_LEGACY
1016/**
1017 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 1018 * @filp: open sysfs file
1da177e4 1019 * @kobj: kobject corresponding to file to read from
cffb2faf 1020 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1021 * @buf: buffer to store results
1022 * @off: offset into legacy I/O port space
1023 * @count: number of bytes to read
1024 *
1025 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1026 * callback routine (pci_legacy_read).
1027 */
3c78bc61
RD
1028static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
1029 struct bin_attribute *bin_attr, char *buf,
1030 loff_t off, size_t count)
1da177e4 1031{
554a6037 1032 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1033
3c78bc61
RD
1034 /* Only support 1, 2 or 4 byte accesses */
1035 if (count != 1 && count != 2 && count != 4)
1036 return -EINVAL;
1da177e4 1037
3c78bc61 1038 return pci_legacy_read(bus, off, (u32 *)buf, count);
1da177e4
LT
1039}
1040
1041/**
1042 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 1043 * @filp: open sysfs file
1da177e4 1044 * @kobj: kobject corresponding to file to read from
cffb2faf 1045 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1046 * @buf: buffer containing value to be written
1047 * @off: offset into legacy I/O port space
1048 * @count: number of bytes to write
1049 *
1050 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1051 * callback routine (pci_legacy_write).
1052 */
3c78bc61
RD
1053static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
1054 struct bin_attribute *bin_attr, char *buf,
1055 loff_t off, size_t count)
1da177e4 1056{
554a6037 1057 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1058
3c78bc61
RD
1059 /* Only support 1, 2 or 4 byte accesses */
1060 if (count != 1 && count != 2 && count != 4)
1061 return -EINVAL;
1062
1063 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1da177e4
LT
1064}
1065
1066/**
1067 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 1068 * @filp: open sysfs file
1da177e4
LT
1069 * @kobj: kobject corresponding to device to be mapped
1070 * @attr: struct bin_attribute for this file
1071 * @vma: struct vm_area_struct passed to mmap
1072 *
f19aeb1f 1073 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
1074 * legacy memory space (first meg of bus space) into application virtual
1075 * memory space.
1076 */
3c78bc61
RD
1077static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1078 struct bin_attribute *attr,
1079 struct vm_area_struct *vma)
1da177e4 1080{
554a6037 1081 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1082
3c78bc61 1083 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
f19aeb1f
BH
1084}
1085
1086/**
1087 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 1088 * @filp: open sysfs file
f19aeb1f
BH
1089 * @kobj: kobject corresponding to device to be mapped
1090 * @attr: struct bin_attribute for this file
1091 * @vma: struct vm_area_struct passed to mmap
1092 *
1093 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1094 * legacy IO space (first meg of bus space) into application virtual
1095 * memory space. Returns -ENOSYS if the operation isn't supported
1096 */
3c78bc61
RD
1097static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1098 struct bin_attribute *attr,
1099 struct vm_area_struct *vma)
f19aeb1f 1100{
554a6037 1101 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
f19aeb1f 1102
3c78bc61 1103 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
f19aeb1f
BH
1104}
1105
10a0ef39
IK
1106/**
1107 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1108 * @b: bus to create files under
1109 * @mmap_type: I/O port or memory
1110 *
1111 * Stub implementation. Can be overridden by arch if necessary.
1112 */
3c78bc61
RD
1113void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1114 enum pci_mmap_state mmap_type)
10a0ef39 1115{
10a0ef39
IK
1116}
1117
f19aeb1f
BH
1118/**
1119 * pci_create_legacy_files - create legacy I/O port and memory files
1120 * @b: bus to create files under
1121 *
1122 * Some platforms allow access to legacy I/O port and ISA memory space on
1123 * a per-bus basis. This routine creates the files and ties them into
1124 * their associated read, write and mmap files from pci-sysfs.c
1125 *
25985edc 1126 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
1127 * as it is ok to set up the PCI bus without these files.
1128 */
1129void pci_create_legacy_files(struct pci_bus *b)
1130{
1131 int error;
1132
1133 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
1134 GFP_ATOMIC);
1135 if (!b->legacy_io)
1136 goto kzalloc_err;
1137
62e877b8 1138 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
1139 b->legacy_io->attr.name = "legacy_io";
1140 b->legacy_io->size = 0xffff;
1141 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1142 b->legacy_io->read = pci_read_legacy_io;
1143 b->legacy_io->write = pci_write_legacy_io;
1144 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 1145 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
1146 error = device_create_bin_file(&b->dev, b->legacy_io);
1147 if (error)
1148 goto legacy_io_err;
1149
1150 /* Allocated above after the legacy_io struct */
1151 b->legacy_mem = b->legacy_io + 1;
6757eca3 1152 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
1153 b->legacy_mem->attr.name = "legacy_mem";
1154 b->legacy_mem->size = 1024*1024;
1155 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1156 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 1157 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
1158 error = device_create_bin_file(&b->dev, b->legacy_mem);
1159 if (error)
1160 goto legacy_mem_err;
1161
1162 return;
1163
1164legacy_mem_err:
1165 device_remove_bin_file(&b->dev, b->legacy_io);
1166legacy_io_err:
1167 kfree(b->legacy_io);
1168 b->legacy_io = NULL;
1169kzalloc_err:
227f0647 1170 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
f19aeb1f
BH
1171 return;
1172}
1173
1174void pci_remove_legacy_files(struct pci_bus *b)
1175{
1176 if (b->legacy_io) {
1177 device_remove_bin_file(&b->dev, b->legacy_io);
1178 device_remove_bin_file(&b->dev, b->legacy_mem);
1179 kfree(b->legacy_io); /* both are allocated here */
1180 }
1da177e4
LT
1181}
1182#endif /* HAVE_PCI_LEGACY */
1183
f7195824 1184#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
b5ff7df3 1185
3b519e4e
MW
1186int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1187 enum pci_mmap_api mmap_api)
b5ff7df3 1188{
6bccc7f4
DW
1189 unsigned long nr, start, size;
1190 resource_size_t pci_start = 0, pci_end;
b5ff7df3 1191
3b519e4e
MW
1192 if (pci_resource_len(pdev, resno) == 0)
1193 return 0;
64b00175 1194 nr = vma_pages(vma);
b5ff7df3 1195 start = vma->vm_pgoff;
88e7df0b 1196 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
6bccc7f4
DW
1197 if (mmap_api == PCI_MMAP_PROCFS) {
1198 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1199 &pci_start, &pci_end);
1200 pci_start >>= PAGE_SHIFT;
1201 }
3b519e4e
MW
1202 if (start >= pci_start && start < pci_start + size &&
1203 start + nr <= pci_start + size)
b5ff7df3 1204 return 1;
b5ff7df3
LT
1205 return 0;
1206}
1207
1da177e4
LT
1208/**
1209 * pci_mmap_resource - map a PCI resource into user memory space
1210 * @kobj: kobject for mapping
1211 * @attr: struct bin_attribute for the file being mapped
1212 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 1213 * @write_combine: 1 for write_combine mapping
1da177e4
LT
1214 *
1215 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4 1216 */
3c78bc61
RD
1217static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1218 struct vm_area_struct *vma, int write_combine)
1da177e4 1219{
554a6037 1220 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1221 int bar = (unsigned long)attr->private;
1da177e4 1222 enum pci_mmap_state mmap_type;
dca40b18 1223 struct resource *res = &pdev->resource[bar];
2311b1f2 1224
cf53ecd8
MG
1225 if (kernel_is_locked_down("Direct PCI access"))
1226 return -EPERM;
1227
ca620723
BH
1228 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1229 return -EINVAL;
1230
dca40b18 1231 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) {
227f0647 1232 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
3b519e4e 1233 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
dca40b18
DW
1234 pci_name(pdev), bar,
1235 (u64)pci_resource_start(pdev, bar),
1236 (u64)pci_resource_len(pdev, bar));
b5ff7df3 1237 return -EINVAL;
3b519e4e 1238 }
1da177e4 1239 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
f7195824
DW
1240
1241 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
45aec1ae 1242}
1243
3c78bc61
RD
1244static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1245 struct bin_attribute *attr,
1246 struct vm_area_struct *vma)
45aec1ae 1247{
1248 return pci_mmap_resource(kobj, attr, vma, 0);
1249}
1250
3c78bc61
RD
1251static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1252 struct bin_attribute *attr,
1253 struct vm_area_struct *vma)
45aec1ae 1254{
1255 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
1256}
1257
3c78bc61
RD
1258static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1259 struct bin_attribute *attr, char *buf,
1260 loff_t off, size_t count, bool write)
8633328b 1261{
554a6037 1262 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1263 int bar = (unsigned long)attr->private;
8633328b 1264 unsigned long port = off;
8633328b 1265
dca40b18 1266 port += pci_resource_start(pdev, bar);
8633328b 1267
dca40b18 1268 if (port > pci_resource_end(pdev, bar))
8633328b
AW
1269 return 0;
1270
dca40b18 1271 if (port + count - 1 > pci_resource_end(pdev, bar))
8633328b
AW
1272 return -EINVAL;
1273
1274 switch (count) {
1275 case 1:
1276 if (write)
1277 outb(*(u8 *)buf, port);
1278 else
1279 *(u8 *)buf = inb(port);
1280 return 1;
1281 case 2:
1282 if (write)
1283 outw(*(u16 *)buf, port);
1284 else
1285 *(u16 *)buf = inw(port);
1286 return 2;
1287 case 4:
1288 if (write)
1289 outl(*(u32 *)buf, port);
1290 else
1291 *(u32 *)buf = inl(port);
1292 return 4;
1293 }
1294 return -EINVAL;
1295}
1296
3c78bc61
RD
1297static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1298 struct bin_attribute *attr, char *buf,
1299 loff_t off, size_t count)
8633328b
AW
1300{
1301 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1302}
1303
3c78bc61
RD
1304static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1305 struct bin_attribute *attr, char *buf,
1306 loff_t off, size_t count)
8633328b 1307{
cf53ecd8
MG
1308 if (kernel_is_locked_down("Direct PCI access"))
1309 return -EPERM;
1310
8633328b
AW
1311 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1312}
1313
b19441af
GKH
1314/**
1315 * pci_remove_resource_files - cleanup resource files
cffb2faf 1316 * @pdev: dev to cleanup
b19441af 1317 *
cffb2faf 1318 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1319 * free their resources.
1320 */
3c78bc61 1321static void pci_remove_resource_files(struct pci_dev *pdev)
b19441af
GKH
1322{
1323 int i;
1324
1325 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1326 struct bin_attribute *res_attr;
1327
1328 res_attr = pdev->res_attr[i];
1329 if (res_attr) {
1330 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1331 kfree(res_attr);
1332 }
45aec1ae 1333
1334 res_attr = pdev->res_attr_wc[i];
1335 if (res_attr) {
1336 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1337 kfree(res_attr);
1338 }
b19441af
GKH
1339 }
1340}
1341
45aec1ae 1342static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1343{
1344 /* allocate attribute structure, piggyback attribute name */
1345 int name_len = write_combine ? 13 : 10;
1346 struct bin_attribute *res_attr;
bd5174df 1347 char *res_attr_name;
45aec1ae 1348 int retval;
1349
1350 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
bd5174df
BH
1351 if (!res_attr)
1352 return -ENOMEM;
1353
1354 res_attr_name = (char *)(res_attr + 1);
1355
1356 sysfs_bin_attr_init(res_attr);
1357 if (write_combine) {
1358 pdev->res_attr_wc[num] = res_attr;
1359 sprintf(res_attr_name, "resource%d_wc", num);
1360 res_attr->mmap = pci_mmap_resource_wc;
1361 } else {
1362 pdev->res_attr[num] = res_attr;
1363 sprintf(res_attr_name, "resource%d", num);
e854d8b2
DW
1364 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1365 res_attr->read = pci_read_resource_io;
1366 res_attr->write = pci_write_resource_io;
1367 if (arch_can_pci_mmap_io())
1368 res_attr->mmap = pci_mmap_resource_uc;
1369 } else {
1370 res_attr->mmap = pci_mmap_resource_uc;
1371 }
bd5174df
BH
1372 }
1373 res_attr->attr.name = res_attr_name;
1374 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1375 res_attr->size = pci_resource_len(pdev, num);
dca40b18 1376 res_attr->private = (void *)(unsigned long)num;
bd5174df
BH
1377 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1378 if (retval)
1379 kfree(res_attr);
45aec1ae 1380
1381 return retval;
1382}
1383
1da177e4
LT
1384/**
1385 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1386 * @pdev: dev in question
1da177e4 1387 *
cffb2faf 1388 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1389 */
b19441af 1390static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1391{
1392 int i;
b19441af 1393 int retval;
1da177e4
LT
1394
1395 /* Expose the PCI resources from this device as files */
1396 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1397
1398 /* skip empty resources */
1399 if (!pci_resource_len(pdev, i))
1400 continue;
1401
45aec1ae 1402 retval = pci_create_attr(pdev, i, 0);
1403 /* for prefetchable resources, create a WC mappable file */
ae749c7a
DW
1404 if (!retval && arch_can_pci_mmap_wc() &&
1405 pdev->resource[i].flags & IORESOURCE_PREFETCH)
45aec1ae 1406 retval = pci_create_attr(pdev, i, 1);
45aec1ae 1407 if (retval) {
1408 pci_remove_resource_files(pdev);
1409 return retval;
1da177e4
LT
1410 }
1411 }
b19441af 1412 return 0;
1da177e4
LT
1413}
1414#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1415int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1416void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1417#endif /* HAVE_PCI_MMAP */
1418
1419/**
1420 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1421 * @filp: sysfs file
1da177e4 1422 * @kobj: kernel object handle
cffb2faf 1423 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1424 * @buf: user input
1425 * @off: file offset
1426 * @count: number of byte in input
1427 *
1428 * writing anything except 0 enables it
1429 */
3c78bc61
RD
1430static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1431 struct bin_attribute *bin_attr, char *buf,
1432 loff_t off, size_t count)
1da177e4 1433{
554a6037 1434 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1435
1436 if ((off == 0) && (*buf == '0') && (count == 2))
1437 pdev->rom_attr_enabled = 0;
1438 else
1439 pdev->rom_attr_enabled = 1;
1440
1441 return count;
1442}
1443
1444/**
1445 * pci_read_rom - read a PCI ROM
2c3c8bea 1446 * @filp: sysfs file
1da177e4 1447 * @kobj: kernel object handle
cffb2faf 1448 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1449 * @buf: where to put the data we read from the ROM
1450 * @off: file offset
1451 * @count: number of bytes to read
1452 *
1453 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1454 * device corresponding to @kobj.
1455 */
3c78bc61
RD
1456static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1457 struct bin_attribute *bin_attr, char *buf,
1458 loff_t off, size_t count)
1da177e4 1459{
554a6037 1460 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1461 void __iomem *rom;
1462 size_t size;
1463
1464 if (!pdev->rom_attr_enabled)
1465 return -EINVAL;
f7625980 1466
1da177e4 1467 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1468 if (!rom || !size)
1469 return -EIO;
f7625980 1470
1da177e4
LT
1471 if (off >= size)
1472 count = 0;
1473 else {
1474 if (off + count > size)
1475 count = size - off;
f7625980 1476
1da177e4
LT
1477 memcpy_fromio(buf, rom + off, count);
1478 }
1479 pci_unmap_rom(pdev, rom);
f7625980 1480
1da177e4
LT
1481 return count;
1482}
1483
8bdc50ac 1484static const struct bin_attribute pci_config_attr = {
1da177e4
LT
1485 .attr = {
1486 .name = "config",
1487 .mode = S_IRUGO | S_IWUSR,
1da177e4 1488 },
557848c3 1489 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1490 .read = pci_read_config,
1491 .write = pci_write_config,
1492};
1493
8bdc50ac 1494static const struct bin_attribute pcie_config_attr = {
1da177e4
LT
1495 .attr = {
1496 .name = "config",
1497 .mode = S_IRUGO | S_IWUSR,
1da177e4 1498 },
557848c3 1499 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1500 .read = pci_read_config,
1501 .write = pci_write_config,
1502};
1503
3c78bc61
RD
1504static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1505 const char *buf, size_t count)
711d5779
MT
1506{
1507 struct pci_dev *pdev = to_pci_dev(dev);
1508 unsigned long val;
9a994e8e 1509 ssize_t result = kstrtoul(buf, 0, &val);
711d5779
MT
1510
1511 if (result < 0)
1512 return result;
1513
1514 if (val != 1)
1515 return -EINVAL;
447c5dd7
MS
1516
1517 result = pci_reset_function(pdev);
1518 if (result < 0)
1519 return result;
1520
1521 return count;
711d5779
MT
1522}
1523
1524static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1525
280c73d3
ZY
1526static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1527{
1528 int retval;
1529 struct bin_attribute *attr;
1530
1531 /* If the device has VPD, try to expose it in sysfs. */
1532 if (dev->vpd) {
1533 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1534 if (!attr)
1535 return -ENOMEM;
1536
a07e4156 1537 sysfs_bin_attr_init(attr);
104daa71 1538 attr->size = 0;
280c73d3
ZY
1539 attr->attr.name = "vpd";
1540 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1541 attr->read = read_vpd_attr;
1542 attr->write = write_vpd_attr;
280c73d3
ZY
1543 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1544 if (retval) {
0f12a4e2 1545 kfree(attr);
280c73d3
ZY
1546 return retval;
1547 }
1548 dev->vpd->attr = attr;
1549 }
1550
1551 /* Active State Power Management */
1552 pcie_aspm_create_sysfs_dev_files(dev);
1553
711d5779
MT
1554 if (!pci_probe_reset_function(dev)) {
1555 retval = device_create_file(&dev->dev, &reset_attr);
1556 if (retval)
1557 goto error;
1558 dev->reset_fn = 1;
1559 }
280c73d3 1560 return 0;
711d5779
MT
1561
1562error:
1563 pcie_aspm_remove_sysfs_dev_files(dev);
1564 if (dev->vpd && dev->vpd->attr) {
1565 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1566 kfree(dev->vpd->attr);
1567 }
1568
1569 return retval;
280c73d3
ZY
1570}
1571
3c78bc61 1572int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1da177e4 1573{
b19441af 1574 int retval;
ac0c302a 1575 int rom_size;
280c73d3 1576 struct bin_attribute *attr;
b19441af 1577
1da177e4
LT
1578 if (!sysfs_initialized)
1579 return -EACCES;
1580
c20aecf6 1581 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1582 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1583 else
1584 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1585 if (retval)
1586 goto err;
1da177e4 1587
b19441af
GKH
1588 retval = pci_create_resource_files(pdev);
1589 if (retval)
280c73d3
ZY
1590 goto err_config_file;
1591
1da177e4 1592 /* If the device has a ROM, try to expose it in sysfs. */
ac0c302a 1593 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
280c73d3 1594 if (rom_size) {
94e61088 1595 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1596 if (!attr) {
b19441af 1597 retval = -ENOMEM;
9890b12a 1598 goto err_resource_files;
1da177e4 1599 }
a07e4156 1600 sysfs_bin_attr_init(attr);
280c73d3
ZY
1601 attr->size = rom_size;
1602 attr->attr.name = "rom";
ff29530e 1603 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1604 attr->read = pci_read_rom;
1605 attr->write = pci_write_rom;
1606 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1607 if (retval) {
1608 kfree(attr);
1609 goto err_resource_files;
1610 }
1611 pdev->rom_attr = attr;
1da177e4 1612 }
280c73d3 1613
280c73d3
ZY
1614 /* add sysfs entries for various capabilities */
1615 retval = pci_create_capabilities_sysfs(pdev);
1616 if (retval)
625e1d59 1617 goto err_rom_file;
7d715a6c 1618
911e1c9b
N
1619 pci_create_firmware_label_files(pdev);
1620
1da177e4 1621 return 0;
b19441af 1622
a2cd52ca 1623err_rom_file:
9d88b93b 1624 if (pdev->rom_attr) {
94e61088 1625 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1626 kfree(pdev->rom_attr);
1627 pdev->rom_attr = NULL;
1628 }
9890b12a
ME
1629err_resource_files:
1630 pci_remove_resource_files(pdev);
94e61088 1631err_config_file:
c20aecf6 1632 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1633 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1634 else
1635 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1636err:
1637 return retval;
1da177e4
LT
1638}
1639
280c73d3
ZY
1640static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1641{
1642 if (dev->vpd && dev->vpd->attr) {
1643 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1644 kfree(dev->vpd->attr);
1645 }
1646
1647 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1648 if (dev->reset_fn) {
1649 device_remove_file(&dev->dev, &reset_attr);
1650 dev->reset_fn = 0;
1651 }
280c73d3
ZY
1652}
1653
1da177e4
LT
1654/**
1655 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1656 * @pdev: device whose entries we should free
1657 *
1658 * Cleanup when @pdev is removed from sysfs.
1659 */
1660void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1661{
d67afe5e
DM
1662 if (!sysfs_initialized)
1663 return;
1664
280c73d3 1665 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1666
c20aecf6 1667 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1da177e4 1668 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1669 else
1670 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4
LT
1671
1672 pci_remove_resource_files(pdev);
1673
9d88b93b 1674 if (pdev->rom_attr) {
280c73d3
ZY
1675 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1676 kfree(pdev->rom_attr);
9d88b93b 1677 pdev->rom_attr = NULL;
1da177e4 1678 }
911e1c9b
N
1679
1680 pci_remove_firmware_label_files(pdev);
1da177e4
LT
1681}
1682
1683static int __init pci_sysfs_init(void)
1684{
1685 struct pci_dev *pdev = NULL;
b19441af
GKH
1686 int retval;
1687
1da177e4 1688 sysfs_initialized = 1;
b19441af
GKH
1689 for_each_pci_dev(pdev) {
1690 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1691 if (retval) {
1692 pci_dev_put(pdev);
b19441af 1693 return retval;
151fc5df 1694 }
b19441af 1695 }
1da177e4
LT
1696
1697 return 0;
1698}
40ee9e9f 1699late_initcall(pci_sysfs_init);
4e15c46b
YL
1700
1701static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1702 &vga_attr.attr,
4e15c46b
YL
1703 NULL,
1704};
1705
1706static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
3c78bc61 1707 struct attribute *a, int n)
4e15c46b 1708{
554a6037 1709 struct device *dev = kobj_to_dev(kobj);
625e1d59
YL
1710 struct pci_dev *pdev = to_pci_dev(dev);
1711
1712 if (a == &vga_attr.attr)
1713 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1714 return 0;
1715
4e15c46b
YL
1716 return a->mode;
1717}
1718
dfab88be
JL
1719static struct attribute *pci_dev_hp_attrs[] = {
1720 &dev_remove_attr.attr,
1721 &dev_rescan_attr.attr,
1722 NULL,
1723};
1724
1725static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
3c78bc61 1726 struct attribute *a, int n)
dfab88be 1727{
554a6037 1728 struct device *dev = kobj_to_dev(kobj);
dfab88be
JL
1729 struct pci_dev *pdev = to_pci_dev(dev);
1730
1731 if (pdev->is_virtfn)
1732 return 0;
1733
1734 return a->mode;
1735}
1736
56c1af46
WVK
1737static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1738 struct attribute *a, int n)
1739{
1740 struct device *dev = kobj_to_dev(kobj);
1741 struct pci_dev *pdev = to_pci_dev(dev);
1742
1743 if (pci_is_bridge(pdev))
1744 return a->mode;
1745
1746 return 0;
1747}
1748
1749static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1750 struct attribute *a, int n)
1751{
1752 struct device *dev = kobj_to_dev(kobj);
1753 struct pci_dev *pdev = to_pci_dev(dev);
1754
1755 if (pci_is_pcie(pdev))
1756 return a->mode;
1757
1758 return 0;
1759}
1760
1761static const struct attribute_group pci_dev_group = {
1762 .attrs = pci_dev_attrs,
1763};
1764
1765const struct attribute_group *pci_dev_groups[] = {
1766 &pci_dev_group,
1767 NULL,
1768};
1769
1770static const struct attribute_group pci_bridge_group = {
1771 .attrs = pci_bridge_attrs,
1772};
1773
1774const struct attribute_group *pci_bridge_groups[] = {
1775 &pci_bridge_group,
1776 NULL,
1777};
1778
1779static const struct attribute_group pcie_dev_group = {
1780 .attrs = pcie_dev_attrs,
1781};
1782
1783const struct attribute_group *pcie_dev_groups[] = {
1784 &pcie_dev_group,
1785 NULL,
1786};
1787
e7ea9825 1788static const struct attribute_group pci_dev_hp_attr_group = {
dfab88be
JL
1789 .attrs = pci_dev_hp_attrs,
1790 .is_visible = pci_dev_hp_attrs_are_visible,
1791};
1792
1789382a
DD
1793#ifdef CONFIG_PCI_IOV
1794static struct attribute *sriov_dev_attrs[] = {
1795 &sriov_totalvfs_attr.attr,
1796 &sriov_numvfs_attr.attr,
7dfca152
FS
1797 &sriov_offset_attr.attr,
1798 &sriov_stride_attr.attr,
1799 &sriov_vf_device_attr.attr,
0e7df224 1800 &sriov_drivers_autoprobe_attr.attr,
1789382a
DD
1801 NULL,
1802};
1803
1804static umode_t sriov_attrs_are_visible(struct kobject *kobj,
3c78bc61 1805 struct attribute *a, int n)
1789382a 1806{
554a6037 1807 struct device *dev = kobj_to_dev(kobj);
1789382a
DD
1808
1809 if (!dev_is_pf(dev))
1810 return 0;
1811
1812 return a->mode;
1813}
1814
e7ea9825 1815static const struct attribute_group sriov_dev_attr_group = {
1789382a
DD
1816 .attrs = sriov_dev_attrs,
1817 .is_visible = sriov_attrs_are_visible,
1818};
1819#endif /* CONFIG_PCI_IOV */
1820
e7ea9825 1821static const struct attribute_group pci_dev_attr_group = {
4e15c46b
YL
1822 .attrs = pci_dev_dev_attrs,
1823 .is_visible = pci_dev_attrs_are_visible,
1824};
1825
e7ea9825 1826static const struct attribute_group pci_bridge_attr_group = {
56c1af46
WVK
1827 .attrs = pci_bridge_attrs,
1828 .is_visible = pci_bridge_attrs_are_visible,
1829};
1830
e7ea9825 1831static const struct attribute_group pcie_dev_attr_group = {
56c1af46
WVK
1832 .attrs = pcie_dev_attrs,
1833 .is_visible = pcie_dev_attrs_are_visible,
1834};
1835
4e15c46b
YL
1836static const struct attribute_group *pci_dev_attr_groups[] = {
1837 &pci_dev_attr_group,
dfab88be 1838 &pci_dev_hp_attr_group,
1789382a
DD
1839#ifdef CONFIG_PCI_IOV
1840 &sriov_dev_attr_group,
1841#endif
56c1af46
WVK
1842 &pci_bridge_attr_group,
1843 &pcie_dev_attr_group,
4e15c46b
YL
1844 NULL,
1845};
1846
69f2dc24 1847const struct device_type pci_dev_type = {
4e15c46b
YL
1848 .groups = pci_dev_attr_groups,
1849};