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pci-quirks: disable MSI on RS400-200 and RS480
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/stat.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23
24#include "pci.h"
25
26static int sysfs_initialized; /* = 0 */
27
28/* show configuration fields */
29#define pci_config_attr(field, format_string) \
30static ssize_t \
e404e274 31field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
32{ \
33 struct pci_dev *pdev; \
34 \
35 pdev = to_pci_dev (dev); \
36 return sprintf (buf, format_string, pdev->field); \
37}
38
39pci_config_attr(vendor, "0x%04x\n");
40pci_config_attr(device, "0x%04x\n");
41pci_config_attr(subsystem_vendor, "0x%04x\n");
42pci_config_attr(subsystem_device, "0x%04x\n");
43pci_config_attr(class, "0x%06x\n");
44pci_config_attr(irq, "%u\n");
45
bdee9d98
DT
46static ssize_t broken_parity_status_show(struct device *dev,
47 struct device_attribute *attr,
48 char *buf)
49{
50 struct pci_dev *pdev = to_pci_dev(dev);
51 return sprintf (buf, "%u\n", pdev->broken_parity_status);
52}
53
54static ssize_t broken_parity_status_store(struct device *dev,
55 struct device_attribute *attr,
56 const char *buf, size_t count)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 ssize_t consumed = -EINVAL;
60
61 if ((count > 0) && (*buf == '0' || *buf == '1')) {
62 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
63 consumed = count;
64 }
65 return consumed;
66}
67
4327edf6
AC
68static ssize_t local_cpus_show(struct device *dev,
69 struct device_attribute *attr, char *buf)
1da177e4 70{
4327edf6
AC
71 cpumask_t mask;
72 int len;
73
74 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
75 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
1da177e4
LT
76 strcat(buf,"\n");
77 return 1+len;
78}
79
80/* show resources */
81static ssize_t
e404e274 82resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
83{
84 struct pci_dev * pci_dev = to_pci_dev(dev);
85 char * str = buf;
86 int i;
87 int max = 7;
e31dd6e4 88 resource_size_t start, end;
1da177e4
LT
89
90 if (pci_dev->subordinate)
91 max = DEVICE_COUNT_RESOURCE;
92
93 for (i = 0; i < max; i++) {
2311b1f2
ME
94 struct resource *res = &pci_dev->resource[i];
95 pci_resource_to_user(pci_dev, i, res, &start, &end);
96 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
97 (unsigned long long)start,
98 (unsigned long long)end,
99 (unsigned long long)res->flags);
1da177e4
LT
100 }
101 return (str - buf);
102}
103
87c8a443 104static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GKH
105{
106 struct pci_dev *pci_dev = to_pci_dev(dev);
107
108 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
109 pci_dev->vendor, pci_dev->device,
110 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
111 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
112 (u8)(pci_dev->class));
113}
bae94d02
IPG
114
115static ssize_t is_enabled_store(struct device *dev,
116 struct device_attribute *attr, const char *buf,
117 size_t count)
9f125d30 118{
bae94d02 119 ssize_t result = -EINVAL;
9f125d30
AV
120 struct pci_dev *pdev = to_pci_dev(dev);
121
122 /* this can crash the machine when done on the "wrong" device */
123 if (!capable(CAP_SYS_ADMIN))
124 return count;
125
bae94d02
IPG
126 if (*buf == '0') {
127 if (atomic_read(&pdev->enable_cnt) != 0)
128 pci_disable_device(pdev);
129 else
130 result = -EIO;
131 } else if (*buf == '1')
132 result = pci_enable_device(pdev);
9f125d30 133
bae94d02
IPG
134 return result < 0 ? result : count;
135}
136
137static ssize_t is_enabled_show(struct device *dev,
138 struct device_attribute *attr, char *buf)
139{
140 struct pci_dev *pdev;
9f125d30 141
bae94d02
IPG
142 pdev = to_pci_dev (dev);
143 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
144}
145
81bb0e19
BG
146#ifdef CONFIG_NUMA
147static ssize_t
148numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
149{
150 return sprintf (buf, "%d\n", dev->numa_node);
151}
152#endif
153
fe97064c
BG
154static ssize_t
155msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 if (!pdev->subordinate)
160 return 0;
161
162 return sprintf (buf, "%u\n",
163 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
164}
165
166static ssize_t
167msi_bus_store(struct device *dev, struct device_attribute *attr,
168 const char *buf, size_t count)
169{
170 struct pci_dev *pdev = to_pci_dev(dev);
171
172 /* bad things may happen if the no_msi flag is changed
173 * while some drivers are loaded */
174 if (!capable(CAP_SYS_ADMIN))
175 return count;
176
177 if (!pdev->subordinate)
178 return count;
179
180 if (*buf == '0') {
181 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
182 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
183 " bad things could happen.\n");
184 }
185
186 if (*buf == '1') {
187 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
188 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
189 " bad things could happen.\n");
190 }
191
192 return count;
193}
9888549e 194
1da177e4
LT
195struct device_attribute pci_dev_attrs[] = {
196 __ATTR_RO(resource),
197 __ATTR_RO(vendor),
198 __ATTR_RO(device),
199 __ATTR_RO(subsystem_vendor),
200 __ATTR_RO(subsystem_device),
201 __ATTR_RO(class),
202 __ATTR_RO(irq),
203 __ATTR_RO(local_cpus),
9888549e 204 __ATTR_RO(modalias),
81bb0e19
BG
205#ifdef CONFIG_NUMA
206 __ATTR_RO(numa_node),
207#endif
9f125d30 208 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
209 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
210 broken_parity_status_show,broken_parity_status_store),
fe97064c 211 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
212 __ATTR_NULL,
213};
214
215static ssize_t
216pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
217{
218 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
219 unsigned int size = 64;
220 loff_t init_off = off;
4c0619ad 221 u8 *data = (u8*) buf;
1da177e4
LT
222
223 /* Several chips lock up trying to read undefined config space */
224 if (capable(CAP_SYS_ADMIN)) {
225 size = dev->cfg_size;
226 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
227 size = 128;
228 }
229
230 if (off > size)
231 return 0;
232 if (off + count > size) {
233 size -= off;
234 count = size;
235 } else {
236 size = count;
237 }
238
4c0619ad
SS
239 if ((off & 1) && size) {
240 u8 val;
e04b0ea2 241 pci_user_read_config_byte(dev, off, &val);
4c0619ad 242 data[off - init_off] = val;
1da177e4 243 off++;
4c0619ad
SS
244 size--;
245 }
246
247 if ((off & 3) && size > 2) {
248 u16 val;
e04b0ea2 249 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
250 data[off - init_off] = val & 0xff;
251 data[off - init_off + 1] = (val >> 8) & 0xff;
252 off += 2;
253 size -= 2;
1da177e4
LT
254 }
255
256 while (size > 3) {
4c0619ad 257 u32 val;
e04b0ea2 258 pci_user_read_config_dword(dev, off, &val);
4c0619ad
SS
259 data[off - init_off] = val & 0xff;
260 data[off - init_off + 1] = (val >> 8) & 0xff;
261 data[off - init_off + 2] = (val >> 16) & 0xff;
262 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
263 off += 4;
264 size -= 4;
265 }
266
4c0619ad
SS
267 if (size >= 2) {
268 u16 val;
e04b0ea2 269 pci_user_read_config_word(dev, off, &val);
4c0619ad
SS
270 data[off - init_off] = val & 0xff;
271 data[off - init_off + 1] = (val >> 8) & 0xff;
272 off += 2;
273 size -= 2;
274 }
275
276 if (size > 0) {
277 u8 val;
e04b0ea2 278 pci_user_read_config_byte(dev, off, &val);
4c0619ad 279 data[off - init_off] = val;
1da177e4
LT
280 off++;
281 --size;
282 }
283
284 return count;
285}
286
287static ssize_t
288pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
289{
290 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
291 unsigned int size = count;
292 loff_t init_off = off;
4c0619ad 293 u8 *data = (u8*) buf;
1da177e4
LT
294
295 if (off > dev->cfg_size)
296 return 0;
297 if (off + count > dev->cfg_size) {
298 size = dev->cfg_size - off;
299 count = size;
300 }
4c0619ad
SS
301
302 if ((off & 1) && size) {
e04b0ea2 303 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 304 off++;
4c0619ad 305 size--;
1da177e4 306 }
4c0619ad
SS
307
308 if ((off & 3) && size > 2) {
309 u16 val = data[off - init_off];
310 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 311 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
312 off += 2;
313 size -= 2;
314 }
1da177e4
LT
315
316 while (size > 3) {
4c0619ad
SS
317 u32 val = data[off - init_off];
318 val |= (u32) data[off - init_off + 1] << 8;
319 val |= (u32) data[off - init_off + 2] << 16;
320 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 321 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
322 off += 4;
323 size -= 4;
324 }
4c0619ad
SS
325
326 if (size >= 2) {
327 u16 val = data[off - init_off];
328 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 329 pci_user_write_config_word(dev, off, val);
4c0619ad
SS
330 off += 2;
331 size -= 2;
332 }
1da177e4 333
4c0619ad 334 if (size) {
e04b0ea2 335 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
336 off++;
337 --size;
338 }
339
340 return count;
341}
342
343#ifdef HAVE_PCI_LEGACY
344/**
345 * pci_read_legacy_io - read byte(s) from legacy I/O port space
346 * @kobj: kobject corresponding to file to read from
347 * @buf: buffer to store results
348 * @off: offset into legacy I/O port space
349 * @count: number of bytes to read
350 *
351 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
352 * callback routine (pci_legacy_read).
353 */
354ssize_t
355pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
356{
357 struct pci_bus *bus = to_pci_bus(container_of(kobj,
358 struct class_device,
359 kobj));
360
361 /* Only support 1, 2 or 4 byte accesses */
362 if (count != 1 && count != 2 && count != 4)
363 return -EINVAL;
364
365 return pci_legacy_read(bus, off, (u32 *)buf, count);
366}
367
368/**
369 * pci_write_legacy_io - write byte(s) to legacy I/O port space
370 * @kobj: kobject corresponding to file to read from
371 * @buf: buffer containing value to be written
372 * @off: offset into legacy I/O port space
373 * @count: number of bytes to write
374 *
375 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
376 * callback routine (pci_legacy_write).
377 */
378ssize_t
379pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
380{
381 struct pci_bus *bus = to_pci_bus(container_of(kobj,
382 struct class_device,
383 kobj));
384 /* Only support 1, 2 or 4 byte accesses */
385 if (count != 1 && count != 2 && count != 4)
386 return -EINVAL;
387
388 return pci_legacy_write(bus, off, *(u32 *)buf, count);
389}
390
391/**
392 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
393 * @kobj: kobject corresponding to device to be mapped
394 * @attr: struct bin_attribute for this file
395 * @vma: struct vm_area_struct passed to mmap
396 *
397 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
398 * legacy memory space (first meg of bus space) into application virtual
399 * memory space.
400 */
401int
402pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
403 struct vm_area_struct *vma)
404{
405 struct pci_bus *bus = to_pci_bus(container_of(kobj,
406 struct class_device,
407 kobj));
408
409 return pci_mmap_legacy_page_range(bus, vma);
410}
411#endif /* HAVE_PCI_LEGACY */
412
413#ifdef HAVE_PCI_MMAP
414/**
415 * pci_mmap_resource - map a PCI resource into user memory space
416 * @kobj: kobject for mapping
417 * @attr: struct bin_attribute for the file being mapped
418 * @vma: struct vm_area_struct passed into the mmap
419 *
420 * Use the regular PCI mapping routines to map a PCI resource into userspace.
421 * FIXME: write combining? maybe automatic for prefetchable regions?
422 */
423static int
424pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
425 struct vm_area_struct *vma)
426{
427 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
428 struct device, kobj));
429 struct resource *res = (struct resource *)attr->private;
430 enum pci_mmap_state mmap_type;
e31dd6e4 431 resource_size_t start, end;
2311b1f2 432 int i;
1da177e4 433
2311b1f2
ME
434 for (i = 0; i < PCI_ROM_RESOURCE; i++)
435 if (res == &pdev->resource[i])
436 break;
437 if (i >= PCI_ROM_RESOURCE)
438 return -ENODEV;
439
440 /* pci_mmap_page_range() expects the same kind of entry as coming
441 * from /proc/bus/pci/ which is a "user visible" value. If this is
442 * different from the resource itself, arch will do necessary fixup.
443 */
444 pci_resource_to_user(pdev, i, res, &start, &end);
445 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
446 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
447
448 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
449}
450
b19441af
GKH
451/**
452 * pci_remove_resource_files - cleanup resource files
453 * @dev: dev to cleanup
454 *
455 * If we created resource files for @dev, remove them from sysfs and
456 * free their resources.
457 */
458static void
459pci_remove_resource_files(struct pci_dev *pdev)
460{
461 int i;
462
463 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
464 struct bin_attribute *res_attr;
465
466 res_attr = pdev->res_attr[i];
467 if (res_attr) {
468 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
469 kfree(res_attr);
470 }
471 }
472}
473
1da177e4
LT
474/**
475 * pci_create_resource_files - create resource files in sysfs for @dev
476 * @dev: dev in question
477 *
478 * Walk the resources in @dev creating files for each resource available.
479 */
b19441af 480static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
481{
482 int i;
b19441af 483 int retval;
1da177e4
LT
484
485 /* Expose the PCI resources from this device as files */
486 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
487 struct bin_attribute *res_attr;
488
489 /* skip empty resources */
490 if (!pci_resource_len(pdev, i))
491 continue;
492
d48593bf 493 /* allocate attribute structure, piggyback attribute name */
656da9da 494 res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4 495 if (res_attr) {
d48593bf
DT
496 char *res_attr_name = (char *)(res_attr + 1);
497
1da177e4 498 pdev->res_attr[i] = res_attr;
d48593bf
DT
499 sprintf(res_attr_name, "resource%d", i);
500 res_attr->attr.name = res_attr_name;
1da177e4
LT
501 res_attr->attr.mode = S_IRUSR | S_IWUSR;
502 res_attr->attr.owner = THIS_MODULE;
d48593bf 503 res_attr->size = pci_resource_len(pdev, i);
1da177e4
LT
504 res_attr->mmap = pci_mmap_resource;
505 res_attr->private = &pdev->resource[i];
b19441af
GKH
506 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
507 if (retval) {
508 pci_remove_resource_files(pdev);
509 return retval;
510 }
511 } else {
512 return -ENOMEM;
1da177e4
LT
513 }
514 }
b19441af 515 return 0;
1da177e4
LT
516}
517#else /* !HAVE_PCI_MMAP */
b19441af 518static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
519static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
520#endif /* HAVE_PCI_MMAP */
521
522/**
523 * pci_write_rom - used to enable access to the PCI ROM display
524 * @kobj: kernel object handle
525 * @buf: user input
526 * @off: file offset
527 * @count: number of byte in input
528 *
529 * writing anything except 0 enables it
530 */
531static ssize_t
532pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
533{
534 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
535
536 if ((off == 0) && (*buf == '0') && (count == 2))
537 pdev->rom_attr_enabled = 0;
538 else
539 pdev->rom_attr_enabled = 1;
540
541 return count;
542}
543
544/**
545 * pci_read_rom - read a PCI ROM
546 * @kobj: kernel object handle
547 * @buf: where to put the data we read from the ROM
548 * @off: file offset
549 * @count: number of bytes to read
550 *
551 * Put @count bytes starting at @off into @buf from the ROM in the PCI
552 * device corresponding to @kobj.
553 */
554static ssize_t
555pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
556{
557 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
558 void __iomem *rom;
559 size_t size;
560
561 if (!pdev->rom_attr_enabled)
562 return -EINVAL;
563
564 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
565 if (!rom)
566 return 0;
567
568 if (off >= size)
569 count = 0;
570 else {
571 if (off + count > size)
572 count = size - off;
573
574 memcpy_fromio(buf, rom + off, count);
575 }
576 pci_unmap_rom(pdev, rom);
577
578 return count;
579}
580
581static struct bin_attribute pci_config_attr = {
582 .attr = {
583 .name = "config",
584 .mode = S_IRUGO | S_IWUSR,
585 .owner = THIS_MODULE,
586 },
587 .size = 256,
588 .read = pci_read_config,
589 .write = pci_write_config,
590};
591
592static struct bin_attribute pcie_config_attr = {
593 .attr = {
594 .name = "config",
595 .mode = S_IRUGO | S_IWUSR,
596 .owner = THIS_MODULE,
597 },
598 .size = 4096,
599 .read = pci_read_config,
600 .write = pci_write_config,
601};
602
b19441af 603int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 604{
b19441af
GKH
605 struct bin_attribute *rom_attr = NULL;
606 int retval;
607
1da177e4
LT
608 if (!sysfs_initialized)
609 return -EACCES;
610
611 if (pdev->cfg_size < 4096)
b19441af 612 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 613 else
b19441af
GKH
614 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
615 if (retval)
616 goto err;
1da177e4 617
b19441af
GKH
618 retval = pci_create_resource_files(pdev);
619 if (retval)
620 goto err_bin_file;
1da177e4
LT
621
622 /* If the device has a ROM, try to expose it in sysfs. */
40ee9e9f
JB
623 if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
624 (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
f5afe806 625 rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
1da177e4 626 if (rom_attr) {
1da177e4
LT
627 pdev->rom_attr = rom_attr;
628 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
629 rom_attr->attr.name = "rom";
630 rom_attr->attr.mode = S_IRUSR;
631 rom_attr->attr.owner = THIS_MODULE;
632 rom_attr->read = pci_read_rom;
633 rom_attr->write = pci_write_rom;
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634 retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
635 if (retval)
636 goto err_rom;
637 } else {
638 retval = -ENOMEM;
639 goto err_bin_file;
1da177e4
LT
640 }
641 }
642 /* add platform-specific attributes */
643 pcibios_add_platform_entries(pdev);
b19441af 644
1da177e4 645 return 0;
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GKH
646
647err_rom:
648 kfree(rom_attr);
649err_bin_file:
650 if (pdev->cfg_size < 4096)
651 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
652 else
653 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
654err:
655 return retval;
1da177e4
LT
656}
657
658/**
659 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
660 * @pdev: device whose entries we should free
661 *
662 * Cleanup when @pdev is removed from sysfs.
663 */
664void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
665{
d67afe5e
DM
666 if (!sysfs_initialized)
667 return;
668
1da177e4
LT
669 if (pdev->cfg_size < 4096)
670 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
671 else
672 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
673
674 pci_remove_resource_files(pdev);
675
676 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
677 if (pdev->rom_attr) {
678 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
679 kfree(pdev->rom_attr);
680 }
681 }
682}
683
684static int __init pci_sysfs_init(void)
685{
686 struct pci_dev *pdev = NULL;
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687 int retval;
688
1da177e4 689 sysfs_initialized = 1;
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GKH
690 for_each_pci_dev(pdev) {
691 retval = pci_create_sysfs_dev_files(pdev);
692 if (retval)
693 return retval;
694 }
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LT
695
696 return 0;
697}
698
40ee9e9f 699late_initcall(pci_sysfs_init);