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557848c3 ZY |
1 | #ifndef DRIVERS_PCI_H |
2 | #define DRIVERS_PCI_H | |
3 | ||
74bb1bcc YZ |
4 | #include <linux/workqueue.h> |
5 | ||
557848c3 ZY |
6 | #define PCI_CFG_SPACE_SIZE 256 |
7 | #define PCI_CFG_SPACE_EXP_SIZE 4096 | |
8 | ||
1da177e4 LT |
9 | /* Functions internal to the PCI core code */ |
10 | ||
1da177e4 LT |
11 | extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); |
12 | extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); | |
6058989b | 13 | #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) |
911e1c9b | 14 | static inline void pci_create_firmware_label_files(struct pci_dev *pdev) |
b879743f | 15 | { return; } |
911e1c9b | 16 | static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) |
b879743f | 17 | { return; } |
911e1c9b N |
18 | #else |
19 | extern void pci_create_firmware_label_files(struct pci_dev *pdev); | |
20 | extern void pci_remove_firmware_label_files(struct pci_dev *pdev); | |
21 | #endif | |
1da177e4 | 22 | extern void pci_cleanup_rom(struct pci_dev *dev); |
9eff02e2 | 23 | #ifdef HAVE_PCI_MMAP |
3b519e4e MW |
24 | enum pci_mmap_api { |
25 | PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ | |
26 | PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ | |
27 | }; | |
9eff02e2 | 28 | extern int pci_mmap_fits(struct pci_dev *pdev, int resno, |
3b519e4e MW |
29 | struct vm_area_struct *vmai, |
30 | enum pci_mmap_api mmap_api); | |
9eff02e2 | 31 | #endif |
711d5779 | 32 | int pci_probe_reset_function(struct pci_dev *dev); |
ce5ccdef | 33 | |
961d9120 | 34 | /** |
b33bfdef | 35 | * struct pci_platform_pm_ops - Firmware PM callbacks |
961d9120 | 36 | * |
b33bfdef RD |
37 | * @is_manageable: returns 'true' if given device is power manageable by the |
38 | * platform firmware | |
961d9120 | 39 | * |
b33bfdef | 40 | * @set_state: invokes the platform firmware to set the device's power state |
961d9120 | 41 | * |
b33bfdef RD |
42 | * @choose_state: returns PCI power state of given device preferred by the |
43 | * platform; to be used during system-wide transitions from a | |
44 | * sleeping state to the working state and vice versa | |
961d9120 | 45 | * |
b33bfdef RD |
46 | * @can_wakeup: returns 'true' if given device is capable of waking up the |
47 | * system from a sleeping state | |
eb9d0fe4 | 48 | * |
b33bfdef | 49 | * @sleep_wake: enables/disables the system wake up capability of given device |
eb9d0fe4 | 50 | * |
b67ea761 RW |
51 | * @run_wake: enables/disables the platform to generate run-time wake-up events |
52 | * for given device (the device's wake-up capability has to be | |
53 | * enabled by @sleep_wake for this feature to work) | |
54 | * | |
961d9120 RW |
55 | * If given platform is generally capable of power managing PCI devices, all of |
56 | * these callbacks are mandatory. | |
57 | */ | |
58 | struct pci_platform_pm_ops { | |
59 | bool (*is_manageable)(struct pci_dev *dev); | |
60 | int (*set_state)(struct pci_dev *dev, pci_power_t state); | |
61 | pci_power_t (*choose_state)(struct pci_dev *dev); | |
eb9d0fe4 RW |
62 | bool (*can_wakeup)(struct pci_dev *dev); |
63 | int (*sleep_wake)(struct pci_dev *dev, bool enable); | |
b67ea761 | 64 | int (*run_wake)(struct pci_dev *dev, bool enable); |
961d9120 RW |
65 | }; |
66 | ||
67 | extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); | |
73410429 | 68 | extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); |
db288c9c | 69 | extern void pci_power_up(struct pci_dev *dev); |
fa58d305 | 70 | extern void pci_disable_enabled_device(struct pci_dev *dev); |
6cbf8214 | 71 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); |
b67ea761 | 72 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); |
448bd857 | 73 | extern void pci_wakeup_bus(struct pci_bus *bus); |
b3c32c4f HY |
74 | extern void pci_config_pm_runtime_get(struct pci_dev *dev); |
75 | extern void pci_config_pm_runtime_put(struct pci_dev *dev); | |
eb9d0fe4 | 76 | extern void pci_pm_init(struct pci_dev *dev); |
eb9c39d0 | 77 | extern void platform_pci_wakeup_init(struct pci_dev *dev); |
63f4898a | 78 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); |
f796841e | 79 | void pci_free_cap_save_buffers(struct pci_dev *dev); |
aa8c6c93 | 80 | |
b6e335ae RW |
81 | static inline void pci_wakeup_event(struct pci_dev *dev) |
82 | { | |
83 | /* Wait 100 ms before the system can be put into a sleep state. */ | |
84 | pm_wakeup_event(&dev->dev, 100); | |
85 | } | |
86 | ||
aa8c6c93 RW |
87 | static inline bool pci_is_bridge(struct pci_dev *pci_dev) |
88 | { | |
89 | return !!(pci_dev->subordinate); | |
90 | } | |
0f64474b | 91 | |
94e61088 | 92 | struct pci_vpd_ops { |
287d19ce SH |
93 | ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); |
94 | ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); | |
94e61088 BH |
95 | void (*release)(struct pci_dev *dev); |
96 | }; | |
97 | ||
98 | struct pci_vpd { | |
99cb233d | 99 | unsigned int len; |
287d19ce | 100 | const struct pci_vpd_ops *ops; |
94e61088 BH |
101 | struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ |
102 | }; | |
103 | ||
104 | extern int pci_vpd_pci22_init(struct pci_dev *dev); | |
105 | static inline void pci_vpd_release(struct pci_dev *dev) | |
106 | { | |
107 | if (dev->vpd) | |
108 | dev->vpd->ops->release(dev); | |
109 | } | |
110 | ||
1da177e4 LT |
111 | /* PCI /proc functions */ |
112 | #ifdef CONFIG_PROC_FS | |
113 | extern int pci_proc_attach_device(struct pci_dev *dev); | |
114 | extern int pci_proc_detach_device(struct pci_dev *dev); | |
1da177e4 LT |
115 | extern int pci_proc_detach_bus(struct pci_bus *bus); |
116 | #else | |
117 | static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } | |
118 | static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } | |
1da177e4 LT |
119 | static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } |
120 | #endif | |
121 | ||
122 | /* Functions for PCI Hotplug drivers to use */ | |
a8e4b9c1 | 123 | int pci_hp_add_bridge(struct pci_dev *dev); |
1da177e4 | 124 | |
f19aeb1f BH |
125 | #ifdef HAVE_PCI_LEGACY |
126 | extern void pci_create_legacy_files(struct pci_bus *bus); | |
1da177e4 | 127 | extern void pci_remove_legacy_files(struct pci_bus *bus); |
f19aeb1f BH |
128 | #else |
129 | static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } | |
130 | static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } | |
131 | #endif | |
1da177e4 LT |
132 | |
133 | /* Lock for read/write access to pci device and bus lists */ | |
d71374da | 134 | extern struct rw_semaphore pci_bus_sem; |
1da177e4 | 135 | |
a2e27787 JK |
136 | extern raw_spinlock_t pci_lock; |
137 | ||
ffadcc2f | 138 | extern unsigned int pci_pm_d3_delay; |
88187dfa | 139 | |
4b47b0ee | 140 | #ifdef CONFIG_PCI_MSI |
309e57df | 141 | void pci_no_msi(void); |
4aa9bc95 | 142 | extern void pci_msi_init_pci_dev(struct pci_dev *dev); |
4b47b0ee | 143 | #else |
309e57df | 144 | static inline void pci_no_msi(void) { } |
4aa9bc95 | 145 | static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } |
4b47b0ee | 146 | #endif |
8fed4b65 | 147 | |
b55438fd | 148 | void pci_realloc_get_opt(char *); |
f483d392 | 149 | |
ffadcc2f KCA |
150 | static inline int pci_no_d1d2(struct pci_dev *dev) |
151 | { | |
152 | unsigned int parent_dstates = 0; | |
4b47b0ee | 153 | |
ffadcc2f KCA |
154 | if (dev->bus->self) |
155 | parent_dstates = dev->bus->self->no_d1d2; | |
156 | return (dev->no_d1d2 || parent_dstates); | |
157 | ||
158 | } | |
1da177e4 | 159 | extern struct device_attribute pci_dev_attrs[]; |
b9d320fc | 160 | extern struct device_attribute pcibus_dev_attrs[]; |
4e15c46b | 161 | extern struct device_type pci_dev_type; |
705b1aaa | 162 | extern struct bus_attribute pci_bus_attrs[]; |
705b1aaa | 163 | |
1da177e4 LT |
164 | |
165 | /** | |
166 | * pci_match_one_device - Tell if a PCI device structure has a matching | |
167 | * PCI device id structure | |
168 | * @id: single PCI device id structure to match | |
169 | * @dev: the PCI device structure to match against | |
367b09fe | 170 | * |
1da177e4 LT |
171 | * Returns the matching pci_device_id structure or %NULL if there is no match. |
172 | */ | |
173 | static inline const struct pci_device_id * | |
174 | pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) | |
175 | { | |
176 | if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && | |
177 | (id->device == PCI_ANY_ID || id->device == dev->device) && | |
178 | (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && | |
179 | (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && | |
180 | !((id->class ^ dev->class) & id->class_mask)) | |
181 | return id; | |
182 | return NULL; | |
183 | } | |
184 | ||
f46753c5 AC |
185 | /* PCI slot sysfs helper code */ |
186 | #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) | |
187 | ||
188 | extern struct kset *pci_slots_kset; | |
189 | ||
190 | struct pci_slot_attribute { | |
191 | struct attribute attr; | |
192 | ssize_t (*show)(struct pci_slot *, char *); | |
193 | ssize_t (*store)(struct pci_slot *, const char *, size_t); | |
194 | }; | |
195 | #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) | |
196 | ||
0b400c7e YZ |
197 | enum pci_bar_type { |
198 | pci_bar_unknown, /* Standard PCI BAR probe */ | |
199 | pci_bar_io, /* An io port BAR */ | |
200 | pci_bar_mem32, /* A 32-bit memory BAR */ | |
201 | pci_bar_mem64, /* A 64-bit memory BAR */ | |
202 | }; | |
203 | ||
efdc87da YL |
204 | bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, |
205 | int crs_timeout); | |
480b93b7 | 206 | extern int pci_setup_device(struct pci_dev *dev); |
0b400c7e YZ |
207 | extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, |
208 | struct resource *res, unsigned int reg); | |
613e7ed6 YZ |
209 | extern int pci_resource_bar(struct pci_dev *dev, int resno, |
210 | enum pci_bar_type *type); | |
876e501a | 211 | extern int pci_bus_add_child(struct pci_bus *bus); |
58c3a727 YZ |
212 | extern void pci_enable_ari(struct pci_dev *dev); |
213 | /** | |
214 | * pci_ari_enabled - query ARI forwarding status | |
6a49d812 | 215 | * @bus: the PCI bus |
58c3a727 YZ |
216 | * |
217 | * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; | |
218 | */ | |
6a49d812 | 219 | static inline int pci_ari_enabled(struct pci_bus *bus) |
58c3a727 | 220 | { |
6a49d812 | 221 | return bus->self && bus->self->ari_enabled; |
58c3a727 YZ |
222 | } |
223 | ||
2069ecfb | 224 | void pci_reassigndev_resource_alignment(struct pci_dev *dev); |
32a9a682 | 225 | extern void pci_disable_bridge_window(struct pci_dev *dev); |
32a9a682 | 226 | |
d1b054da YZ |
227 | /* Single Root I/O Virtualization */ |
228 | struct pci_sriov { | |
229 | int pos; /* capability position */ | |
230 | int nres; /* number of resources */ | |
231 | u32 cap; /* SR-IOV Capabilities */ | |
232 | u16 ctrl; /* SR-IOV Control */ | |
6b136724 BH |
233 | u16 total_VFs; /* total VFs associated with the PF */ |
234 | u16 initial_VFs; /* initial VFs associated with the PF */ | |
235 | u16 num_VFs; /* number of VFs available */ | |
d1b054da YZ |
236 | u16 offset; /* first VF Routing ID offset */ |
237 | u16 stride; /* following VF stride */ | |
238 | u32 pgsz; /* page size for BAR alignment */ | |
239 | u8 link; /* Function Dependency Link */ | |
6b136724 | 240 | u16 driver_max_VFs; /* max num VFs driver supports */ |
d1b054da YZ |
241 | struct pci_dev *dev; /* lowest numbered PF */ |
242 | struct pci_dev *self; /* this PF */ | |
243 | struct mutex lock; /* lock for VF bus */ | |
74bb1bcc YZ |
244 | struct work_struct mtask; /* VF Migration task */ |
245 | u8 __iomem *mstate; /* VF Migration State Array */ | |
d1b054da YZ |
246 | }; |
247 | ||
1900ca13 HX |
248 | #ifdef CONFIG_PCI_ATS |
249 | extern void pci_restore_ats_state(struct pci_dev *dev); | |
250 | #else | |
251 | static inline void pci_restore_ats_state(struct pci_dev *dev) | |
252 | { | |
253 | } | |
254 | #endif /* CONFIG_PCI_ATS */ | |
255 | ||
d1b054da YZ |
256 | #ifdef CONFIG_PCI_IOV |
257 | extern int pci_iov_init(struct pci_dev *dev); | |
258 | extern void pci_iov_release(struct pci_dev *dev); | |
259 | extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, | |
260 | enum pci_bar_type *type); | |
0e52247a CM |
261 | extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, |
262 | int resno); | |
8c5cdb6a | 263 | extern void pci_restore_iov_state(struct pci_dev *dev); |
a28724b0 | 264 | extern int pci_iov_bus_range(struct pci_bus *bus); |
302b4215 | 265 | |
d1b054da YZ |
266 | #else |
267 | static inline int pci_iov_init(struct pci_dev *dev) | |
268 | { | |
269 | return -ENODEV; | |
270 | } | |
271 | static inline void pci_iov_release(struct pci_dev *dev) | |
272 | ||
273 | { | |
274 | } | |
275 | static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, | |
276 | enum pci_bar_type *type) | |
277 | { | |
278 | return 0; | |
279 | } | |
8c5cdb6a YZ |
280 | static inline void pci_restore_iov_state(struct pci_dev *dev) |
281 | { | |
282 | } | |
a28724b0 YZ |
283 | static inline int pci_iov_bus_range(struct pci_bus *bus) |
284 | { | |
285 | return 0; | |
286 | } | |
302b4215 | 287 | |
d1b054da YZ |
288 | #endif /* CONFIG_PCI_IOV */ |
289 | ||
0a2daa1c RP |
290 | extern unsigned long pci_cardbus_resource_alignment(struct resource *); |
291 | ||
0e52247a | 292 | static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, |
6faf17f6 CW |
293 | struct resource *res) |
294 | { | |
295 | #ifdef CONFIG_PCI_IOV | |
296 | int resno = res - dev->resource; | |
297 | ||
298 | if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) | |
299 | return pci_sriov_resource_alignment(dev, resno); | |
300 | #endif | |
0a2daa1c RP |
301 | if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) |
302 | return pci_cardbus_resource_alignment(res); | |
6faf17f6 CW |
303 | return resource_alignment(res); |
304 | } | |
305 | ||
ae21ee65 AK |
306 | extern void pci_enable_acs(struct pci_dev *dev); |
307 | ||
b9c3b266 DC |
308 | struct pci_dev_reset_methods { |
309 | u16 vendor; | |
310 | u16 device; | |
311 | int (*reset)(struct pci_dev *dev, int probe); | |
312 | }; | |
313 | ||
93177a74 | 314 | #ifdef CONFIG_PCI_QUIRKS |
5b889bf2 | 315 | extern int pci_dev_specific_reset(struct pci_dev *dev, int probe); |
93177a74 RW |
316 | #else |
317 | static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) | |
318 | { | |
319 | return -ENOTTY; | |
320 | } | |
321 | #endif | |
b9c3b266 | 322 | |
557848c3 | 323 | #endif /* DRIVERS_PCI_H */ |