[mirror_ubuntu-jammy-kernel.git] / drivers / pci / pci.h

#ifndef DRIVERS_PCI_H
#define DRIVERS_PCI_H

#include <linux/workqueue.h>

#define PCI_CFG_SPACE_SIZE	256
#define PCI_CFG_SPACE_EXP_SIZE	4096

/* Functions internal to the PCI core code */

extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
{ return; }
static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
{ return; }
#else
extern void pci_create_firmware_label_files(struct pci_dev *pdev);
extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
#endif
extern void pci_cleanup_rom(struct pci_dev *dev);
#ifdef HAVE_PCI_MMAP
enum pci_mmap_api {
	PCI_MMAP_SYSFS,	/* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
	PCI_MMAP_PROCFS	/* mmap on /proc/bus/pci/<BDF> */
};
extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
			 struct vm_area_struct *vmai,
			 enum pci_mmap_api mmap_api);
#endif
int pci_probe_reset_function(struct pci_dev *dev);

/**
 * struct pci_platform_pm_ops - Firmware PM callbacks
 *
 * @is_manageable: returns 'true' if given device is power manageable by the
 *                 platform firmware
 *
 * @set_state: invokes the platform firmware to set the device's power state
 *
 * @choose_state: returns PCI power state of given device preferred by the
 *                platform; to be used during system-wide transitions from a
 *                sleeping state to the working state and vice versa
 *
 * @sleep_wake: enables/disables the system wake up capability of given device
 *
 * @run_wake: enables/disables the platform to generate run-time wake-up events
 *		for given device (the device's wake-up capability has to be
 *		enabled by @sleep_wake for this feature to work)
 *
 * If given platform is generally capable of power managing PCI devices, all of
 * these callbacks are mandatory.
 */
struct pci_platform_pm_ops {
	bool (*is_manageable)(struct pci_dev *dev);
	int (*set_state)(struct pci_dev *dev, pci_power_t state);
	pci_power_t (*choose_state)(struct pci_dev *dev);
	int (*sleep_wake)(struct pci_dev *dev, bool enable);
	int (*run_wake)(struct pci_dev *dev, bool enable);
};

extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
extern void pci_power_up(struct pci_dev *dev);
extern void pci_disable_enabled_device(struct pci_dev *dev);
extern int pci_finish_runtime_suspend(struct pci_dev *dev);
extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
extern void pci_wakeup_bus(struct pci_bus *bus);
extern void pci_config_pm_runtime_get(struct pci_dev *dev);
extern void pci_config_pm_runtime_put(struct pci_dev *dev);
extern void pci_pm_init(struct pci_dev *dev);
extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
void pci_free_cap_save_buffers(struct pci_dev *dev);

static inline void pci_wakeup_event(struct pci_dev *dev)
{
	/* Wait 100 ms before the system can be put into a sleep state. */
	pm_wakeup_event(&dev->dev, 100);
}

static inline bool pci_is_bridge(struct pci_dev *pci_dev)
{
	return !!(pci_dev->subordinate);
}

struct pci_vpd_ops {
	ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
	ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
	void (*release)(struct pci_dev *dev);
};

struct pci_vpd {
	unsigned int len;
	const struct pci_vpd_ops *ops;
	struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
};

extern int pci_vpd_pci22_init(struct pci_dev *dev);
static inline void pci_vpd_release(struct pci_dev *dev)
{
	if (dev->vpd)
		dev->vpd->ops->release(dev);
}

/* PCI /proc functions */
#ifdef CONFIG_PROC_FS
extern int pci_proc_attach_device(struct pci_dev *dev);
extern int pci_proc_detach_device(struct pci_dev *dev);
extern int pci_proc_detach_bus(struct pci_bus *bus);
#else
static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
#endif

/* Functions for PCI Hotplug drivers to use */
int pci_hp_add_bridge(struct pci_dev *dev);

#ifdef HAVE_PCI_LEGACY
extern void pci_create_legacy_files(struct pci_bus *bus);
extern void pci_remove_legacy_files(struct pci_bus *bus);
#else
static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
#endif

/* Lock for read/write access to pci device and bus lists */
extern struct rw_semaphore pci_bus_sem;

extern raw_spinlock_t pci_lock;

extern unsigned int pci_pm_d3_delay;

#ifdef CONFIG_PCI_MSI
void pci_no_msi(void);
extern void pci_msi_init_pci_dev(struct pci_dev *dev);
#else
static inline void pci_no_msi(void) { }
static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
#endif

void pci_realloc_get_opt(char *);

static inline int pci_no_d1d2(struct pci_dev *dev)
{
	unsigned int parent_dstates = 0;

	if (dev->bus->self)
		parent_dstates = dev->bus->self->no_d1d2;
	return (dev->no_d1d2 || parent_dstates);

}
extern struct device_attribute pci_dev_attrs[];
extern struct device_attribute pcibus_dev_attrs[];
extern struct device_type pci_dev_type;
extern struct bus_attribute pci_bus_attrs[];


/**
 * pci_match_one_device - Tell if a PCI device structure has a matching
 *                        PCI device id structure
 * @id: single PCI device id structure to match
 * @dev: the PCI device structure to match against
 *
 * Returns the matching pci_device_id structure or %NULL if there is no match.
 */
static inline const struct pci_device_id *
pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
{
	if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
	    (id->device == PCI_ANY_ID || id->device == dev->device) &&
	    (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
	    (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
	    !((id->class ^ dev->class) & id->class_mask))
		return id;
	return NULL;
}

/* PCI slot sysfs helper code */
#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)

extern struct kset *pci_slots_kset;

struct pci_slot_attribute {
	struct attribute attr;
	ssize_t (*show)(struct pci_slot *, char *);
	ssize_t (*store)(struct pci_slot *, const char *, size_t);
};
#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)

enum pci_bar_type {
	pci_bar_unknown,	/* Standard PCI BAR probe */
	pci_bar_io,		/* An io port BAR */
	pci_bar_mem32,		/* A 32-bit memory BAR */
	pci_bar_mem64,		/* A 64-bit memory BAR */
};

bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
				int crs_timeout);
extern int pci_setup_device(struct pci_dev *dev);
extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
				struct resource *res, unsigned int reg);
extern int pci_resource_bar(struct pci_dev *dev, int resno,
			    enum pci_bar_type *type);
extern int pci_bus_add_child(struct pci_bus *bus);
extern void pci_configure_ari(struct pci_dev *dev);
/**
 * pci_ari_enabled - query ARI forwarding status
 * @bus: the PCI bus
 *
 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
 */
static inline int pci_ari_enabled(struct pci_bus *bus)
{
	return bus->self && bus->self->ari_enabled;
}

void pci_reassigndev_resource_alignment(struct pci_dev *dev);
extern void pci_disable_bridge_window(struct pci_dev *dev);

/* Single Root I/O Virtualization */
struct pci_sriov {
	int pos;		/* capability position */
	int nres;		/* number of resources */
	u32 cap;		/* SR-IOV Capabilities */
	u16 ctrl;		/* SR-IOV Control */
	u16 total_VFs;		/* total VFs associated with the PF */
	u16 initial_VFs;	/* initial VFs associated with the PF */
	u16 num_VFs;		/* number of VFs available */
	u16 offset;		/* first VF Routing ID offset */
	u16 stride;		/* following VF stride */
	u32 pgsz;		/* page size for BAR alignment */
	u8 link;		/* Function Dependency Link */
	u16 driver_max_VFs;	/* max num VFs driver supports */
	struct pci_dev *dev;	/* lowest numbered PF */
	struct pci_dev *self;	/* this PF */
	struct mutex lock;	/* lock for VF bus */
	struct work_struct mtask; /* VF Migration task */
	u8 __iomem *mstate;	/* VF Migration State Array */
};

#ifdef CONFIG_PCI_ATS
extern void pci_restore_ats_state(struct pci_dev *dev);
#else
static inline void pci_restore_ats_state(struct pci_dev *dev)
{
}
#endif /* CONFIG_PCI_ATS */

#ifdef CONFIG_PCI_IOV
extern int pci_iov_init(struct pci_dev *dev);
extern void pci_iov_release(struct pci_dev *dev);
extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
				enum pci_bar_type *type);
extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
						    int resno);
extern void pci_restore_iov_state(struct pci_dev *dev);
extern int pci_iov_bus_range(struct pci_bus *bus);

#else
static inline int pci_iov_init(struct pci_dev *dev)
{
	return -ENODEV;
}
static inline void pci_iov_release(struct pci_dev *dev)

{
}
static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
				       enum pci_bar_type *type)
{
	return 0;
}
static inline void pci_restore_iov_state(struct pci_dev *dev)
{
}
static inline int pci_iov_bus_range(struct pci_bus *bus)
{
	return 0;
}

#endif /* CONFIG_PCI_IOV */

extern unsigned long pci_cardbus_resource_alignment(struct resource *);

static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
					 struct resource *res)
{
#ifdef CONFIG_PCI_IOV
	int resno = res - dev->resource;

	if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
		return pci_sriov_resource_alignment(dev, resno);
#endif
	if (dev->class >> 8  == PCI_CLASS_BRIDGE_CARDBUS)
		return pci_cardbus_resource_alignment(res);
	return resource_alignment(res);
}

extern void pci_enable_acs(struct pci_dev *dev);

struct pci_dev_reset_methods {
	u16 vendor;
	u16 device;
	int (*reset)(struct pci_dev *dev, int probe);
};

#ifdef CONFIG_PCI_QUIRKS
extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
#else
static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
{
	return -ENOTTY;
}
#endif

#endif /* DRIVERS_PCI_H */
Commit	Line	Data
557848c3 ZY	1	#ifndef DRIVERS_PCI_H
	2	#define DRIVERS_PCI_H
	3
74bb1bcc YZ	4	#include <linux/workqueue.h>
74bb1bcc YZ	5
557848c3 ZY	6	#define PCI_CFG_SPACE_SIZE 256
	7	#define PCI_CFG_SPACE_EXP_SIZE 4096
	8
1da177e4 LT	9	/* Functions internal to the PCI core code */
1da177e4 LT	10
1da177e4 LT	11	extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
1da177e4 LT	12	extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
6058989b	13	#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
911e1c9b	14	static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
b879743f	15	{ return; }
911e1c9b	16	static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
b879743f	17	{ return; }
911e1c9b N	18	#else
	19	extern void pci_create_firmware_label_files(struct pci_dev *pdev);
	20	extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
	21	#endif
1da177e4	22	extern void pci_cleanup_rom(struct pci_dev *dev);
9eff02e2	23	#ifdef HAVE_PCI_MMAP
3b519e4e MW	24	enum pci_mmap_api {
	25	PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
	26	PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
	27	};
9eff02e2	28	extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
3b519e4e MW	29	struct vm_area_struct *vmai,
3b519e4e MW	30	enum pci_mmap_api mmap_api);
9eff02e2	31	#endif
711d5779	32	int pci_probe_reset_function(struct pci_dev *dev);
ce5ccdef	33
961d9120	34	/**
b33bfdef	35	* struct pci_platform_pm_ops - Firmware PM callbacks
961d9120	36	*
b33bfdef RD	37	* @is_manageable: returns 'true' if given device is power manageable by the
b33bfdef RD	38	* platform firmware
961d9120	39	*
b33bfdef	40	* @set_state: invokes the platform firmware to set the device's power state
961d9120	41	*
b33bfdef RD	42	* @choose_state: returns PCI power state of given device preferred by the
	43	* platform; to be used during system-wide transitions from a
	44	* sleeping state to the working state and vice versa
961d9120	45	*
b33bfdef	46	* @sleep_wake: enables/disables the system wake up capability of given device
eb9d0fe4	47	*
b67ea761 RW	48	* @run_wake: enables/disables the platform to generate run-time wake-up events
	49	* for given device (the device's wake-up capability has to be
	50	* enabled by @sleep_wake for this feature to work)
	51	*
961d9120 RW	52	* If given platform is generally capable of power managing PCI devices, all of
	53	* these callbacks are mandatory.
	54	*/
	55	struct pci_platform_pm_ops {
	56	bool (is_manageable)(struct pci_dev dev);
	57	int (set_state)(struct pci_dev dev, pci_power_t state);
	58	pci_power_t (choose_state)(struct pci_dev dev);
eb9d0fe4	59	int (sleep_wake)(struct pci_dev dev, bool enable);
b67ea761	60	int (run_wake)(struct pci_dev dev, bool enable);
961d9120 RW	61	};
	62
	63	extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
73410429	64	extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
db288c9c	65	extern void pci_power_up(struct pci_dev *dev);
fa58d305	66	extern void pci_disable_enabled_device(struct pci_dev *dev);
6cbf8214	67	extern int pci_finish_runtime_suspend(struct pci_dev *dev);
b67ea761	68	extern int __pci_pme_wakeup(struct pci_dev dev, void ign);
448bd857	69	extern void pci_wakeup_bus(struct pci_bus *bus);
b3c32c4f HY	70	extern void pci_config_pm_runtime_get(struct pci_dev *dev);
b3c32c4f HY	71	extern void pci_config_pm_runtime_put(struct pci_dev *dev);
eb9d0fe4	72	extern void pci_pm_init(struct pci_dev *dev);
63f4898a	73	extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
f796841e	74	void pci_free_cap_save_buffers(struct pci_dev *dev);
aa8c6c93	75
b6e335ae RW	76	static inline void pci_wakeup_event(struct pci_dev *dev)
	77	{
	78	/* Wait 100 ms before the system can be put into a sleep state. */
	79	pm_wakeup_event(&dev->dev, 100);
	80	}
	81
aa8c6c93 RW	82	static inline bool pci_is_bridge(struct pci_dev *pci_dev)
	83	{
	84	return !!(pci_dev->subordinate);
	85	}
0f64474b	86
94e61088	87	struct pci_vpd_ops {
287d19ce SH	88	ssize_t (read)(struct pci_dev dev, loff_t pos, size_t count, void *buf);
287d19ce SH	89	ssize_t (write)(struct pci_dev dev, loff_t pos, size_t count, const void *buf);
94e61088 BH	90	void (release)(struct pci_dev dev);
	91	};
	92
	93	struct pci_vpd {
99cb233d	94	unsigned int len;
287d19ce	95	const struct pci_vpd_ops *ops;
94e61088 BH	96	struct bin_attribute attr; / descriptor for sysfs VPD entry */
	97	};
	98
	99	extern int pci_vpd_pci22_init(struct pci_dev *dev);
	100	static inline void pci_vpd_release(struct pci_dev *dev)
	101	{
	102	if (dev->vpd)
	103	dev->vpd->ops->release(dev);
	104	}
	105
1da177e4 LT	106	/* PCI /proc functions */
	107	#ifdef CONFIG_PROC_FS
	108	extern int pci_proc_attach_device(struct pci_dev *dev);
	109	extern int pci_proc_detach_device(struct pci_dev *dev);
1da177e4 LT	110	extern int pci_proc_detach_bus(struct pci_bus *bus);
	111	#else
	112	static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
	113	static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
1da177e4 LT	114	static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
	115	#endif
	116
	117	/* Functions for PCI Hotplug drivers to use */
a8e4b9c1	118	int pci_hp_add_bridge(struct pci_dev *dev);
1da177e4	119
f19aeb1f BH	120	#ifdef HAVE_PCI_LEGACY
f19aeb1f BH	121	extern void pci_create_legacy_files(struct pci_bus *bus);
1da177e4	122	extern void pci_remove_legacy_files(struct pci_bus *bus);
f19aeb1f BH	123	#else
	124	static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
	125	static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
	126	#endif
1da177e4 LT	127
1da177e4 LT	128	/* Lock for read/write access to pci device and bus lists */
d71374da	129	extern struct rw_semaphore pci_bus_sem;
1da177e4	130
a2e27787 JK	131	extern raw_spinlock_t pci_lock;
a2e27787 JK	132
ffadcc2f	133	extern unsigned int pci_pm_d3_delay;
88187dfa	134
4b47b0ee	135	#ifdef CONFIG_PCI_MSI
309e57df	136	void pci_no_msi(void);
4aa9bc95	137	extern void pci_msi_init_pci_dev(struct pci_dev *dev);
4b47b0ee	138	#else
309e57df	139	static inline void pci_no_msi(void) { }
4aa9bc95	140	static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
4b47b0ee	141	#endif
8fed4b65	142
b55438fd	143	void pci_realloc_get_opt(char *);
f483d392	144
ffadcc2f KCA	145	static inline int pci_no_d1d2(struct pci_dev *dev)
	146	{
	147	unsigned int parent_dstates = 0;
4b47b0ee	148
ffadcc2f KCA	149	if (dev->bus->self)
	150	parent_dstates = dev->bus->self->no_d1d2;
	151	return (dev->no_d1d2 \|\| parent_dstates);
	152
	153	}
1da177e4	154	extern struct device_attribute pci_dev_attrs[];
b9d320fc	155	extern struct device_attribute pcibus_dev_attrs[];
4e15c46b	156	extern struct device_type pci_dev_type;
705b1aaa	157	extern struct bus_attribute pci_bus_attrs[];
705b1aaa	158
1da177e4 LT	159
	160	/**
	161	* pci_match_one_device - Tell if a PCI device structure has a matching
	162	* PCI device id structure
	163	* @id: single PCI device id structure to match
	164	* @dev: the PCI device structure to match against
367b09fe	165	*
1da177e4 LT	166	* Returns the matching pci_device_id structure or %NULL if there is no match.
	167	*/
	168	static inline const struct pci_device_id *
	169	pci_match_one_device(const struct pci_device_id id, const struct pci_dev dev)
	170	{
	171	if ((id->vendor == PCI_ANY_ID \|\| id->vendor == dev->vendor) &&
	172	(id->device == PCI_ANY_ID \|\| id->device == dev->device) &&
	173	(id->subvendor == PCI_ANY_ID \|\| id->subvendor == dev->subsystem_vendor) &&
	174	(id->subdevice == PCI_ANY_ID \|\| id->subdevice == dev->subsystem_device) &&
	175	!((id->class ^ dev->class) & id->class_mask))
	176	return id;
	177	return NULL;
	178	}
	179
f46753c5 AC	180	/* PCI slot sysfs helper code */
	181	#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
	182
	183	extern struct kset *pci_slots_kset;
	184
	185	struct pci_slot_attribute {
	186	struct attribute attr;
	187	ssize_t (show)(struct pci_slot , char *);
	188	ssize_t (store)(struct pci_slot , const char *, size_t);
	189	};
	190	#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
	191
0b400c7e YZ	192	enum pci_bar_type {
	193	pci_bar_unknown, /* Standard PCI BAR probe */
	194	pci_bar_io, /* An io port BAR */
	195	pci_bar_mem32, /* A 32-bit memory BAR */
	196	pci_bar_mem64, /* A 64-bit memory BAR */
	197	};
	198
efdc87da YL	199	bool pci_bus_read_dev_vendor_id(struct pci_bus bus, int devfn, u32 pl,
efdc87da YL	200	int crs_timeout);
480b93b7	201	extern int pci_setup_device(struct pci_dev *dev);
0b400c7e YZ	202	extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
0b400c7e YZ	203	struct resource *res, unsigned int reg);
613e7ed6 YZ	204	extern int pci_resource_bar(struct pci_dev *dev, int resno,
613e7ed6 YZ	205	enum pci_bar_type *type);
876e501a	206	extern int pci_bus_add_child(struct pci_bus *bus);
31ab2476	207	extern void pci_configure_ari(struct pci_dev *dev);
58c3a727 YZ	208	/**
58c3a727 YZ	209	* pci_ari_enabled - query ARI forwarding status
6a49d812	210	* @bus: the PCI bus
58c3a727 YZ	211	*
	212	* Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
	213	*/
6a49d812	214	static inline int pci_ari_enabled(struct pci_bus *bus)
58c3a727	215	{
6a49d812	216	return bus->self && bus->self->ari_enabled;
58c3a727 YZ	217	}
58c3a727 YZ	218
2069ecfb	219	void pci_reassigndev_resource_alignment(struct pci_dev *dev);
32a9a682	220	extern void pci_disable_bridge_window(struct pci_dev *dev);
32a9a682	221
d1b054da YZ	222	/* Single Root I/O Virtualization */
	223	struct pci_sriov {
	224	int pos; /* capability position */
	225	int nres; /* number of resources */
	226	u32 cap; /* SR-IOV Capabilities */
	227	u16 ctrl; /* SR-IOV Control */
6b136724 BH	228	u16 total_VFs; /* total VFs associated with the PF */
	229	u16 initial_VFs; /* initial VFs associated with the PF */
	230	u16 num_VFs; /* number of VFs available */
d1b054da YZ	231	u16 offset; /* first VF Routing ID offset */
	232	u16 stride; /* following VF stride */
	233	u32 pgsz; /* page size for BAR alignment */
	234	u8 link; /* Function Dependency Link */
6b136724	235	u16 driver_max_VFs; /* max num VFs driver supports */
d1b054da YZ	236	struct pci_dev dev; / lowest numbered PF */
	237	struct pci_dev self; / this PF */
	238	struct mutex lock; /* lock for VF bus */
74bb1bcc YZ	239	struct work_struct mtask; /* VF Migration task */
74bb1bcc YZ	240	u8 __iomem mstate; / VF Migration State Array */
d1b054da YZ	241	};
d1b054da YZ	242
1900ca13 HX	243	#ifdef CONFIG_PCI_ATS
	244	extern void pci_restore_ats_state(struct pci_dev *dev);
	245	#else
	246	static inline void pci_restore_ats_state(struct pci_dev *dev)
	247	{
	248	}
	249	#endif /* CONFIG_PCI_ATS */
	250
d1b054da YZ	251	#ifdef CONFIG_PCI_IOV
	252	extern int pci_iov_init(struct pci_dev *dev);
	253	extern void pci_iov_release(struct pci_dev *dev);
	254	extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
	255	enum pci_bar_type *type);
0e52247a CM	256	extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
0e52247a CM	257	int resno);
8c5cdb6a	258	extern void pci_restore_iov_state(struct pci_dev *dev);
a28724b0	259	extern int pci_iov_bus_range(struct pci_bus *bus);
302b4215	260
d1b054da YZ	261	#else
	262	static inline int pci_iov_init(struct pci_dev *dev)
	263	{
	264	return -ENODEV;
	265	}
	266	static inline void pci_iov_release(struct pci_dev *dev)
	267
	268	{
	269	}
	270	static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
	271	enum pci_bar_type *type)
	272	{
	273	return 0;
	274	}
8c5cdb6a YZ	275	static inline void pci_restore_iov_state(struct pci_dev *dev)
	276	{
	277	}
a28724b0 YZ	278	static inline int pci_iov_bus_range(struct pci_bus *bus)
	279	{
	280	return 0;
	281	}
302b4215	282
d1b054da YZ	283	#endif /* CONFIG_PCI_IOV */
d1b054da YZ	284
0a2daa1c RP	285	extern unsigned long pci_cardbus_resource_alignment(struct resource *);
0a2daa1c RP	286
0e52247a	287	static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
6faf17f6 CW	288	struct resource *res)
	289	{
	290	#ifdef CONFIG_PCI_IOV
	291	int resno = res - dev->resource;
	292
	293	if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
	294	return pci_sriov_resource_alignment(dev, resno);
	295	#endif
0a2daa1c RP	296	if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
0a2daa1c RP	297	return pci_cardbus_resource_alignment(res);
6faf17f6 CW	298	return resource_alignment(res);
	299	}
	300
ae21ee65 AK	301	extern void pci_enable_acs(struct pci_dev *dev);
ae21ee65 AK	302
b9c3b266 DC	303	struct pci_dev_reset_methods {
	304	u16 vendor;
	305	u16 device;
	306	int (reset)(struct pci_dev dev, int probe);
	307	};
	308
93177a74	309	#ifdef CONFIG_PCI_QUIRKS
5b889bf2	310	extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
93177a74 RW	311	#else
	312	static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
	313	{
	314	return -ENOTTY;
	315	}
	316	#endif
b9c3b266	317
557848c3	318	#endif /* DRIVERS_PCI_H */