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1 | /* |
2 | * PCI Express Downstream Port Containment services driver | |
3 | * Copyright (C) 2016 Intel Corp. | |
4 | * | |
5 | * This file is subject to the terms and conditions of the GNU General Public | |
6 | * License. See the file "COPYING" in the main directory of this archive | |
7 | * for more details. | |
8 | */ | |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/interrupt.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/pci.h> | |
14 | #include <linux/pcieport_if.h> | |
15 | ||
16 | struct dpc_dev { | |
17 | struct pcie_device *dev; | |
18 | struct work_struct work; | |
19 | int cap_pos; | |
20 | }; | |
21 | ||
22 | static void dpc_wait_link_inactive(struct pci_dev *pdev) | |
23 | { | |
24 | unsigned long timeout = jiffies + HZ; | |
25 | u16 lnk_status; | |
26 | ||
27 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); | |
28 | while (lnk_status & PCI_EXP_LNKSTA_DLLLA && | |
29 | !time_after(jiffies, timeout)) { | |
30 | msleep(10); | |
31 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); | |
32 | } | |
33 | if (lnk_status & PCI_EXP_LNKSTA_DLLLA) | |
34 | dev_warn(&pdev->dev, "Link state not disabled for DPC event"); | |
35 | } | |
36 | ||
37 | static void interrupt_event_handler(struct work_struct *work) | |
38 | { | |
39 | struct dpc_dev *dpc = container_of(work, struct dpc_dev, work); | |
40 | struct pci_dev *dev, *temp, *pdev = dpc->dev->port; | |
41 | struct pci_bus *parent = pdev->subordinate; | |
42 | ||
43 | pci_lock_rescan_remove(); | |
44 | list_for_each_entry_safe_reverse(dev, temp, &parent->devices, | |
45 | bus_list) { | |
46 | pci_dev_get(dev); | |
47 | pci_stop_and_remove_bus_device(dev); | |
48 | pci_dev_put(dev); | |
49 | } | |
50 | pci_unlock_rescan_remove(); | |
51 | ||
52 | dpc_wait_link_inactive(pdev); | |
53 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, | |
54 | PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT); | |
55 | } | |
56 | ||
57 | static irqreturn_t dpc_irq(int irq, void *context) | |
58 | { | |
59 | struct dpc_dev *dpc = (struct dpc_dev *)context; | |
60 | struct pci_dev *pdev = dpc->dev->port; | |
61 | u16 status, source; | |
62 | ||
63 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status); | |
64 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID, | |
65 | &source); | |
66 | if (!status) | |
67 | return IRQ_NONE; | |
68 | ||
69 | dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n", | |
70 | status, source); | |
71 | ||
72 | if (status & PCI_EXP_DPC_STATUS_TRIGGER) { | |
73 | u16 reason = (status >> 1) & 0x3; | |
74 | ||
75 | dev_warn(&dpc->dev->device, "DPC %s triggered, remove downstream devices\n", | |
76 | (reason == 0) ? "unmasked uncorrectable error" : | |
77 | (reason == 1) ? "ERR_NONFATAL" : | |
78 | (reason == 2) ? "ERR_FATAL" : "extended error"); | |
79 | schedule_work(&dpc->work); | |
80 | } | |
81 | return IRQ_HANDLED; | |
82 | } | |
83 | ||
84 | #define FLAG(x, y) (((x) & (y)) ? '+' : '-') | |
85 | static int dpc_probe(struct pcie_device *dev) | |
86 | { | |
87 | struct dpc_dev *dpc; | |
88 | struct pci_dev *pdev = dev->port; | |
89 | int status; | |
90 | u16 ctl, cap; | |
91 | ||
92 | dpc = kzalloc(sizeof(*dpc), GFP_KERNEL); | |
93 | if (!dpc) | |
94 | return -ENOMEM; | |
95 | ||
96 | dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC); | |
97 | dpc->dev = dev; | |
98 | INIT_WORK(&dpc->work, interrupt_event_handler); | |
99 | set_service_data(dev, dpc); | |
100 | ||
101 | status = request_irq(dev->irq, dpc_irq, IRQF_SHARED, "pcie-dpc", dpc); | |
102 | if (status) { | |
103 | dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq, | |
104 | status); | |
105 | goto out; | |
106 | } | |
107 | ||
108 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap); | |
109 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); | |
110 | ||
111 | ctl |= PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN; | |
112 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); | |
113 | ||
114 | dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n", | |
115 | cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), | |
116 | FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP), | |
117 | FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf, | |
118 | FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE)); | |
119 | return status; | |
120 | out: | |
121 | kfree(dpc); | |
122 | return status; | |
123 | } | |
124 | ||
125 | static void dpc_remove(struct pcie_device *dev) | |
126 | { | |
127 | struct dpc_dev *dpc = get_service_data(dev); | |
128 | struct pci_dev *pdev = dev->port; | |
129 | u16 ctl; | |
130 | ||
131 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); | |
132 | ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN); | |
133 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); | |
134 | ||
135 | free_irq(dev->irq, dpc); | |
136 | kfree(dpc); | |
137 | } | |
138 | ||
139 | static struct pcie_port_service_driver dpcdriver = { | |
140 | .name = "dpc", | |
141 | .port_type = PCI_EXP_TYPE_ROOT_PORT | PCI_EXP_TYPE_DOWNSTREAM, | |
142 | .service = PCIE_PORT_SERVICE_DPC, | |
143 | .probe = dpc_probe, | |
144 | .remove = dpc_remove, | |
145 | }; | |
146 | ||
147 | static int __init dpc_service_init(void) | |
148 | { | |
149 | return pcie_port_service_register(&dpcdriver); | |
150 | } | |
151 | ||
152 | static void __exit dpc_service_exit(void) | |
153 | { | |
154 | pcie_port_service_unregister(&dpcdriver); | |
155 | } | |
156 | ||
157 | MODULE_DESCRIPTION("PCI Express Downstream Port Containment driver"); | |
158 | MODULE_AUTHOR("Keith Busch <keith.busch@intel.com>"); | |
159 | MODULE_LICENSE("GPL"); | |
160 | MODULE_VERSION("0.1"); | |
161 | ||
162 | module_init(dpc_service_init); | |
163 | module_exit(dpc_service_exit); |