[mirror_ubuntu-bionic-kernel.git] / drivers / pci / pcie / pme.c

/*
 * PCIe Native PME support
 *
 * Copyright (C) 2007 - 2009 Intel Corp
 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License V2.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/pcieport_if.h>
#include <linux/pm_runtime.h>

#include "../pci.h"
#include "portdrv.h"

/*
 * If this switch is set, MSI will not be used for PCIe PME signaling.  This
 * causes the PCIe port driver to use INTx interrupts only, but it turns out
 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
 * wake-up from system sleep states.
 */
bool pcie_pme_msi_disabled;

static int __init pcie_pme_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pcie_pme_msi_disabled = true;

	return 1;
}
__setup("pcie_pme=", pcie_pme_setup);

struct pcie_pme_service_data {
	spinlock_t lock;
	struct pcie_device *srv;
	struct work_struct work;
	bool noirq; /* If set, keep the PME interrupt disabled. */
};

/**
 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
 * @dev: PCIe root port or event collector.
 * @enable: Enable or disable the interrupt.
 */
void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
{
	if (enable)
		pcie_capability_set_word(dev, PCI_EXP_RTCTL,
					 PCI_EXP_RTCTL_PMEIE);
	else
		pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
					   PCI_EXP_RTCTL_PMEIE);
}

/**
 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
 * @bus: PCI bus to scan.
 *
 * Scan given PCI bus and all buses under it for devices asserting PME#.
 */
static bool pcie_pme_walk_bus(struct pci_bus *bus)
{
	struct pci_dev *dev;
	bool ret = false;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		/* Skip PCIe devices in case we started from a root port. */
		if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
			ret = true;
		}

		if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
			ret = true;
	}

	return ret;
}

/**
 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
 * @bus: Secondary bus of the bridge.
 * @devfn: Device/function number to check.
 *
 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
 * PCIe PME message.  In such that case the bridge should use the Requester ID
 * of device/function number 0 on its secondary bus.
 */
static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
{
	struct pci_dev *dev;
	bool found = false;

	if (devfn)
		return false;

	dev = pci_dev_get(bus->self);
	if (!dev)
		return false;

	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
		down_read(&pci_bus_sem);
		if (pcie_pme_walk_bus(bus))
			found = true;
		up_read(&pci_bus_sem);
	}

	pci_dev_put(dev);
	return found;
}

/**
 * pcie_pme_handle_request - Find device that generated PME and handle it.
 * @port: Root port or event collector that generated the PME interrupt.
 * @req_id: PCIe Requester ID of the device that generated the PME.
 */
static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
{
	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	struct pci_bus *bus;
	struct pci_dev *dev;
	bool found = false;

	/* First, check if the PME is from the root port itself. */
	if (port->devfn == devfn && port->bus->number == busnr) {
		if (port->pme_poll)
			port->pme_poll = false;

		if (pci_check_pme_status(port)) {
			pm_request_resume(&port->dev);
			found = true;
		} else {
			/*
			 * Apparently, the root port generated the PME on behalf
			 * of a non-PCIe device downstream.  If this is done by
			 * a root port, the Requester ID field in its status
			 * register may contain either the root port's, or the
			 * source device's information (PCI Express Base
			 * Specification, Rev. 2.0, Section 6.1.9).
			 */
			down_read(&pci_bus_sem);
			found = pcie_pme_walk_bus(port->subordinate);
			up_read(&pci_bus_sem);
		}
		goto out;
	}

	/* Second, find the bus the source device is on. */
	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	if (!bus)
		goto out;

	/* Next, check if the PME is from a PCIe-PCI bridge. */
	found = pcie_pme_from_pci_bridge(bus, devfn);
	if (found)
		goto out;

	/* Finally, try to find the PME source on the bus. */
	down_read(&pci_bus_sem);
	list_for_each_entry(dev, &bus->devices, bus_list) {
		pci_dev_get(dev);
		if (dev->devfn == devfn) {
			found = true;
			break;
		}
		pci_dev_put(dev);
	}
	up_read(&pci_bus_sem);

	if (found) {
		/* The device is there, but we have to check its PME status. */
		found = pci_check_pme_status(dev);
		if (found) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
		}
		pci_dev_put(dev);
	} else if (devfn) {
		/*
		 * The device is not there, but we can still try to recover by
		 * assuming that the PME was reported by a PCIe-PCI bridge that
		 * used devfn different from zero.
		 */
		dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
			busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
		found = pcie_pme_from_pci_bridge(bus, 0);
	}

 out:
	if (!found)
		dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
}

/**
 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
 * @work: Work structure giving access to service data.
 */
static void pcie_pme_work_fn(struct work_struct *work)
{
	struct pcie_pme_service_data *data =
			container_of(work, struct pcie_pme_service_data, work);
	struct pci_dev *port = data->srv->port;
	u32 rtsta;

	spin_lock_irq(&data->lock);

	for (;;) {
		if (data->noirq)
			break;

		pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
		if (rtsta == (u32) ~0)
			break;

		if (rtsta & PCI_EXP_RTSTA_PME) {
			/*
			 * Clear PME status of the port.  If there are other
			 * pending PMEs, the status will be set again.
			 */
			pcie_clear_root_pme_status(port);

			spin_unlock_irq(&data->lock);
			pcie_pme_handle_request(port, rtsta & 0xffff);
			spin_lock_irq(&data->lock);

			continue;
		}

		/* No need to loop if there are no more PMEs pending. */
		if (!(rtsta & PCI_EXP_RTSTA_PENDING))
			break;

		spin_unlock_irq(&data->lock);
		cpu_relax();
		spin_lock_irq(&data->lock);
	}

	if (!data->noirq)
		pcie_pme_interrupt_enable(port, true);

	spin_unlock_irq(&data->lock);
}

/**
 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
 * @irq: Interrupt vector.
 * @context: Interrupt context pointer.
 */
static irqreturn_t pcie_pme_irq(int irq, void *context)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	u32 rtsta;
	unsigned long flags;

	port = ((struct pcie_device *)context)->port;
	data = get_service_data((struct pcie_device *)context);

	spin_lock_irqsave(&data->lock, flags);
	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);

	if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
		spin_unlock_irqrestore(&data->lock, flags);
		return IRQ_NONE;
	}

	pcie_pme_interrupt_enable(port, false);
	spin_unlock_irqrestore(&data->lock, flags);

	/* We don't use pm_wq, because it's freezable. */
	schedule_work(&data->work);

	return IRQ_HANDLED;
}

/**
 * pcie_pme_can_wakeup - Set the wakeup capability flag.
 * @dev: PCI device to handle.
 * @ign: Ignored.
 */
static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign)
{
	device_set_wakeup_capable(&dev->dev, true);
	return 0;
}

/**
 * pcie_pme_mark_devices - Set the wakeup flag for devices below a port.
 * @port: PCIe root port or event collector to handle.
 *
 * For each device below given root port, including the port itself (or for each
 * root complex integrated endpoint if @port is a root complex event collector)
 * set the flag indicating that it can signal run-time wake-up events.
 */
static void pcie_pme_mark_devices(struct pci_dev *port)
{
	pcie_pme_can_wakeup(port, NULL);
	if (port->subordinate)
		pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL);
}

/**
 * pcie_pme_probe - Initialize PCIe PME service for given root port.
 * @srv: PCIe service to initialize.
 */
static int pcie_pme_probe(struct pcie_device *srv)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	int ret;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);
	INIT_WORK(&data->work, pcie_pme_work_fn);
	data->srv = srv;
	set_service_data(srv, data);

	port = srv->port;
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);

	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	if (ret) {
		kfree(data);
		return ret;
	}

	dev_info(&port->dev, "Signaling PME with IRQ %d\n", srv->irq);

	pcie_pme_mark_devices(port);
	pcie_pme_interrupt_enable(port, true);
	return 0;
}

static bool pcie_pme_check_wakeup(struct pci_bus *bus)
{
	struct pci_dev *dev;

	if (!bus)
		return false;

	list_for_each_entry(dev, &bus->devices, bus_list)
		if (device_may_wakeup(&dev->dev)
		    || pcie_pme_check_wakeup(dev->subordinate))
			return true;

	return false;
}

/**
 * pcie_pme_suspend - Suspend PCIe PME service device.
 * @srv: PCIe service device to suspend.
 */
static int pcie_pme_suspend(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);
	struct pci_dev *port = srv->port;
	bool wakeup;
	int ret;

	if (device_may_wakeup(&port->dev)) {
		wakeup = true;
	} else {
		down_read(&pci_bus_sem);
		wakeup = pcie_pme_check_wakeup(port->subordinate);
		up_read(&pci_bus_sem);
	}
	if (wakeup) {
		ret = enable_irq_wake(srv->irq);
		if (!ret)
			return 0;
	}

	spin_lock_irq(&data->lock);
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);
	data->noirq = true;
	spin_unlock_irq(&data->lock);

	synchronize_irq(srv->irq);

	return 0;
}

/**
 * pcie_pme_resume - Resume PCIe PME service device.
 * @srv - PCIe service device to resume.
 */
static int pcie_pme_resume(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);

	spin_lock_irq(&data->lock);
	if (data->noirq) {
		struct pci_dev *port = srv->port;

		pcie_clear_root_pme_status(port);
		pcie_pme_interrupt_enable(port, true);
		data->noirq = false;
	} else {
		disable_irq_wake(srv->irq);
	}
	spin_unlock_irq(&data->lock);

	return 0;
}

/**
 * pcie_pme_remove - Prepare PCIe PME service device for removal.
 * @srv - PCIe service device to remove.
 */
static void pcie_pme_remove(struct pcie_device *srv)
{
	pcie_pme_suspend(srv);
	free_irq(srv->irq, srv);
	kfree(get_service_data(srv));
}

static struct pcie_port_service_driver pcie_pme_driver = {
	.name		= "pcie_pme",
	.port_type	= PCI_EXP_TYPE_ROOT_PORT,
	.service	= PCIE_PORT_SERVICE_PME,

	.probe		= pcie_pme_probe,
	.suspend	= pcie_pme_suspend,
	.resume		= pcie_pme_resume,
	.remove		= pcie_pme_remove,
};

/**
 * pcie_pme_service_init - Register the PCIe PME service driver.
 */
static int __init pcie_pme_service_init(void)
{
	return pcie_port_service_register(&pcie_pme_driver);
}
device_initcall(pcie_pme_service_init);
Commit	Line	Data
c7f48656 RW	1	/*
	2	* PCIe Native PME support
	3	*
	4	* Copyright (C) 2007 - 2009 Intel Corp
	5	* Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
	6	* Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License V2. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
c7f48656 RW	13	#include <linux/pci.h>
	14	#include <linux/kernel.h>
	15	#include <linux/errno.h>
5a0e3ad6	16	#include <linux/slab.h>
c7f48656 RW	17	#include <linux/init.h>
	18	#include <linux/interrupt.h>
	19	#include <linux/device.h>
	20	#include <linux/pcieport_if.h>
c7f48656 RW	21	#include <linux/pm_runtime.h>
c7f48656 RW	22
271fb719 RW	23	#include "../pci.h"
271fb719 RW	24	#include "portdrv.h"
c7f48656	25
c39fae14 RW	26	/*
	27	* If this switch is set, MSI will not be used for PCIe PME signaling. This
	28	* causes the PCIe port driver to use INTx interrupts only, but it turns out
	29	* that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
	30	* wake-up from system sleep states.
	31	*/
	32	bool pcie_pme_msi_disabled;
	33
c7f48656 RW	34	static int __init pcie_pme_setup(char *str)
c7f48656 RW	35	{
28eb5f27 RW	36	if (!strncmp(str, "nomsi", 5))
28eb5f27 RW	37	pcie_pme_msi_disabled = true;
b27759f8	38
c7f48656 RW	39	return 1;
	40	}
	41	__setup("pcie_pme=", pcie_pme_setup);
	42
c7f48656 RW	43	struct pcie_pme_service_data {
	44	spinlock_t lock;
	45	struct pcie_device *srv;
	46	struct work_struct work;
c7b5a4e6	47	bool noirq; /* If set, keep the PME interrupt disabled. */
c7f48656 RW	48	};
	49
	50	/**
	51	* pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
	52	* @dev: PCIe root port or event collector.
	53	* @enable: Enable or disable the interrupt.
	54	*/
28eb5f27	55	void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
c7f48656	56	{
c7f48656	57	if (enable)
263e54b9 JL	58	pcie_capability_set_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	59	PCI_EXP_RTCTL_PMEIE);
c7f48656	60	else
263e54b9 JL	61	pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	62	PCI_EXP_RTCTL_PMEIE);
c7f48656 RW	63	}
c7f48656 RW	64
c7f48656 RW	65	/**
	66	* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
	67	* @bus: PCI bus to scan.
	68	*
	69	* Scan given PCI bus and all buses under it for devices asserting PME#.
	70	*/
	71	static bool pcie_pme_walk_bus(struct pci_bus *bus)
	72	{
	73	struct pci_dev *dev;
	74	bool ret = false;
	75
	76	list_for_each_entry(dev, &bus->devices, bus_list) {
	77	/* Skip PCIe devices in case we started from a root port. */
552be54c	78	if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
379021d5 RW	79	if (dev->pme_poll)
	80	dev->pme_poll = false;
	81
c125e96f	82	pci_wakeup_event(dev);
0f953bf6	83	pm_request_resume(&dev->dev);
c7f48656 RW	84	ret = true;
	85	}
	86
	87	if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
	88	ret = true;
	89	}
	90
	91	return ret;
	92	}
	93
	94	/**
	95	* pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
	96	* @bus: Secondary bus of the bridge.
	97	* @devfn: Device/function number to check.
	98	*
	99	* PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
	100	* PCIe PME message. In such that case the bridge should use the Requester ID
	101	* of device/function number 0 on its secondary bus.
	102	*/
	103	static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
	104	{
	105	struct pci_dev *dev;
	106	bool found = false;
	107
	108	if (devfn)
	109	return false;
	110
	111	dev = pci_dev_get(bus->self);
	112	if (!dev)
	113	return false;
	114
62f87c0e	115	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
c7f48656 RW	116	down_read(&pci_bus_sem);
	117	if (pcie_pme_walk_bus(bus))
	118	found = true;
	119	up_read(&pci_bus_sem);
	120	}
	121
	122	pci_dev_put(dev);
	123	return found;
	124	}
	125
	126	/**
	127	* pcie_pme_handle_request - Find device that generated PME and handle it.
	128	* @port: Root port or event collector that generated the PME interrupt.
	129	* @req_id: PCIe Requester ID of the device that generated the PME.
	130	*/
	131	static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
	132	{
	133	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	134	struct pci_bus *bus;
	135	struct pci_dev *dev;
	136	bool found = false;
	137
	138	/* First, check if the PME is from the root port itself. */
	139	if (port->devfn == devfn && port->bus->number == busnr) {
379021d5 RW	140	if (port->pme_poll)
	141	port->pme_poll = false;
	142
c7f48656 RW	143	if (pci_check_pme_status(port)) {
	144	pm_request_resume(&port->dev);
	145	found = true;
	146	} else {
	147	/*
	148	* Apparently, the root port generated the PME on behalf
	149	* of a non-PCIe device downstream. If this is done by
	150	* a root port, the Requester ID field in its status
	151	* register may contain either the root port's, or the
	152	* source device's information (PCI Express Base
	153	* Specification, Rev. 2.0, Section 6.1.9).
	154	*/
	155	down_read(&pci_bus_sem);
	156	found = pcie_pme_walk_bus(port->subordinate);
	157	up_read(&pci_bus_sem);
	158	}
	159	goto out;
	160	}
	161
	162	/* Second, find the bus the source device is on. */
	163	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	164	if (!bus)
	165	goto out;
	166
	167	/* Next, check if the PME is from a PCIe-PCI bridge. */
	168	found = pcie_pme_from_pci_bridge(bus, devfn);
	169	if (found)
	170	goto out;
	171
	172	/* Finally, try to find the PME source on the bus. */
	173	down_read(&pci_bus_sem);
	174	list_for_each_entry(dev, &bus->devices, bus_list) {
	175	pci_dev_get(dev);
	176	if (dev->devfn == devfn) {
	177	found = true;
	178	break;
	179	}
	180	pci_dev_put(dev);
	181	}
	182	up_read(&pci_bus_sem);
	183
	184	if (found) {
	185	/* The device is there, but we have to check its PME status. */
	186	found = pci_check_pme_status(dev);
c125e96f	187	if (found) {
379021d5 RW	188	if (dev->pme_poll)
	189	dev->pme_poll = false;
	190
c125e96f	191	pci_wakeup_event(dev);
0f953bf6	192	pm_request_resume(&dev->dev);
c125e96f	193	}
c7f48656 RW	194	pci_dev_put(dev);
	195	} else if (devfn) {
	196	/*
	197	* The device is not there, but we can still try to recover by
	198	* assuming that the PME was reported by a PCIe-PCI bridge that
	199	* used devfn different from zero.
	200	*/
227f0647	201	dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
c7f48656 RW	202	busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
	203	found = pcie_pme_from_pci_bridge(bus, 0);
	204	}
	205
	206	out:
	207	if (!found)
	208	dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
	209	}
	210
	211	/**
	212	* pcie_pme_work_fn - Work handler for PCIe PME interrupt.
	213	* @work: Work structure giving access to service data.
	214	*/
	215	static void pcie_pme_work_fn(struct work_struct *work)
	216	{
	217	struct pcie_pme_service_data *data =
	218	container_of(work, struct pcie_pme_service_data, work);
	219	struct pci_dev *port = data->srv->port;
c7f48656 RW	220	u32 rtsta;
c7f48656 RW	221
c7f48656 RW	222	spin_lock_irq(&data->lock);
	223
	224	for (;;) {
c7b5a4e6	225	if (data->noirq)
c7f48656 RW	226	break;
c7f48656 RW	227
263e54b9	228	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
3ad3f8ce Q	229	if (rtsta == (u32) ~0)
	230	break;
	231
c7f48656 RW	232	if (rtsta & PCI_EXP_RTSTA_PME) {
	233	/*
	234	* Clear PME status of the port. If there are other
	235	* pending PMEs, the status will be set again.
	236	*/
fe31e697	237	pcie_clear_root_pme_status(port);
c7f48656 RW	238
	239	spin_unlock_irq(&data->lock);
	240	pcie_pme_handle_request(port, rtsta & 0xffff);
	241	spin_lock_irq(&data->lock);
	242
	243	continue;
	244	}
	245
	246	/* No need to loop if there are no more PMEs pending. */
	247	if (!(rtsta & PCI_EXP_RTSTA_PENDING))
	248	break;
	249
	250	spin_unlock_irq(&data->lock);
	251	cpu_relax();
	252	spin_lock_irq(&data->lock);
	253	}
	254
c7b5a4e6	255	if (!data->noirq)
c7f48656 RW	256	pcie_pme_interrupt_enable(port, true);
	257
	258	spin_unlock_irq(&data->lock);
	259	}
	260
	261	/**
	262	* pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
	263	* @irq: Interrupt vector.
	264	* @context: Interrupt context pointer.
	265	*/
	266	static irqreturn_t pcie_pme_irq(int irq, void *context)
	267	{
	268	struct pci_dev *port;
	269	struct pcie_pme_service_data *data;
c7f48656 RW	270	u32 rtsta;
	271	unsigned long flags;
	272
	273	port = ((struct pcie_device *)context)->port;
	274	data = get_service_data((struct pcie_device *)context);
	275
c7f48656	276	spin_lock_irqsave(&data->lock, flags);
263e54b9	277	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656	278
3ad3f8ce	279	if (rtsta == (u32) ~0 \|\| !(rtsta & PCI_EXP_RTSTA_PME)) {
c7f48656 RW	280	spin_unlock_irqrestore(&data->lock, flags);
	281	return IRQ_NONE;
	282	}
	283
	284	pcie_pme_interrupt_enable(port, false);
	285	spin_unlock_irqrestore(&data->lock, flags);
	286
	287	/* We don't use pm_wq, because it's freezable. */
	288	schedule_work(&data->work);
	289
	290	return IRQ_HANDLED;
	291	}
	292
	293	/**
8370c2dc	294	* pcie_pme_can_wakeup - Set the wakeup capability flag.
c7f48656 RW	295	* @dev: PCI device to handle.
	296	* @ign: Ignored.
	297	*/
8370c2dc	298	static int pcie_pme_can_wakeup(struct pci_dev dev, void ign)
c7f48656	299	{
de3ef1eb	300	device_set_wakeup_capable(&dev->dev, true);
c7f48656 RW	301	return 0;
	302	}
	303
	304	/**
8370c2dc	305	* pcie_pme_mark_devices - Set the wakeup flag for devices below a port.
c7f48656 RW	306	* @port: PCIe root port or event collector to handle.
	307	*
	308	* For each device below given root port, including the port itself (or for each
	309	* root complex integrated endpoint if @port is a root complex event collector)
8370c2dc	310	* set the flag indicating that it can signal run-time wake-up events.
c7f48656 RW	311	*/
	312	static void pcie_pme_mark_devices(struct pci_dev *port)
	313	{
8370c2dc	314	pcie_pme_can_wakeup(port, NULL);
0a1e1b26	315	if (port->subordinate)
8370c2dc	316	pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL);
c7f48656 RW	317	}
	318
	319	/**
	320	* pcie_pme_probe - Initialize PCIe PME service for given root port.
	321	* @srv: PCIe service to initialize.
	322	*/
	323	static int pcie_pme_probe(struct pcie_device *srv)
	324	{
	325	struct pci_dev *port;
	326	struct pcie_pme_service_data *data;
	327	int ret;
	328
c7f48656 RW	329	data = kzalloc(sizeof(*data), GFP_KERNEL);
	330	if (!data)
	331	return -ENOMEM;
	332
	333	spin_lock_init(&data->lock);
	334	INIT_WORK(&data->work, pcie_pme_work_fn);
	335	data->srv = srv;
	336	set_service_data(srv, data);
	337
	338	port = srv->port;
	339	pcie_pme_interrupt_enable(port, false);
fe31e697	340	pcie_clear_root_pme_status(port);
c7f48656 RW	341
	342	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	343	if (ret) {
	344	kfree(data);
a902d81a	345	return ret;
c7f48656 RW	346	}
c7f48656 RW	347
a902d81a BH	348	dev_info(&port->dev, "Signaling PME with IRQ %d\n", srv->irq);
	349
	350	pcie_pme_mark_devices(port);
	351	pcie_pme_interrupt_enable(port, true);
	352	return 0;
c7f48656 RW	353	}
c7f48656 RW	354
76cde7e4 RW	355	static bool pcie_pme_check_wakeup(struct pci_bus *bus)
	356	{
	357	struct pci_dev *dev;
	358
	359	if (!bus)
	360	return false;
	361
	362	list_for_each_entry(dev, &bus->devices, bus_list)
	363	if (device_may_wakeup(&dev->dev)
	364	\|\| pcie_pme_check_wakeup(dev->subordinate))
	365	return true;
	366
	367	return false;
	368	}
	369
c7f48656 RW	370	/**
	371	* pcie_pme_suspend - Suspend PCIe PME service device.
	372	* @srv: PCIe service device to suspend.
	373	*/
	374	static int pcie_pme_suspend(struct pcie_device *srv)
	375	{
	376	struct pcie_pme_service_data *data = get_service_data(srv);
	377	struct pci_dev *port = srv->port;
c7b5a4e6	378	bool wakeup;
5dfd7f9f	379	int ret;
c7f48656	380
76cde7e4 RW	381	if (device_may_wakeup(&port->dev)) {
	382	wakeup = true;
	383	} else {
	384	down_read(&pci_bus_sem);
	385	wakeup = pcie_pme_check_wakeup(port->subordinate);
	386	up_read(&pci_bus_sem);
	387	}
76cde7e4	388	if (wakeup) {
5dfd7f9f	389	ret = enable_irq_wake(srv->irq);
c7b5a4e6 RW	390	if (!ret)
c7b5a4e6 RW	391	return 0;
76cde7e4	392	}
c7b5a4e6 RW	393
	394	spin_lock_irq(&data->lock);
	395	pcie_pme_interrupt_enable(port, false);
	396	pcie_clear_root_pme_status(port);
	397	data->noirq = true;
c7f48656 RW	398	spin_unlock_irq(&data->lock);
	399
	400	synchronize_irq(srv->irq);
	401
	402	return 0;
	403	}
	404
	405	/**
	406	* pcie_pme_resume - Resume PCIe PME service device.
	407	* @srv - PCIe service device to resume.
	408	*/
	409	static int pcie_pme_resume(struct pcie_device *srv)
	410	{
	411	struct pcie_pme_service_data *data = get_service_data(srv);
c7f48656 RW	412
c7f48656 RW	413	spin_lock_irq(&data->lock);
c7b5a4e6	414	if (data->noirq) {
76cde7e4 RW	415	struct pci_dev *port = srv->port;
	416
	417	pcie_clear_root_pme_status(port);
	418	pcie_pme_interrupt_enable(port, true);
c7b5a4e6	419	data->noirq = false;
76cde7e4 RW	420	} else {
	421	disable_irq_wake(srv->irq);
	422	}
c7f48656 RW	423	spin_unlock_irq(&data->lock);
	424
	425	return 0;
	426	}
	427
afe3e4d1 YL	428	/**
	429	* pcie_pme_remove - Prepare PCIe PME service device for removal.
	430	* @srv - PCIe service device to remove.
	431	*/
	432	static void pcie_pme_remove(struct pcie_device *srv)
	433	{
	434	pcie_pme_suspend(srv);
	435	free_irq(srv->irq, srv);
	436	kfree(get_service_data(srv));
	437	}
	438
c7f48656 RW	439	static struct pcie_port_service_driver pcie_pme_driver = {
c7f48656 RW	440	.name = "pcie_pme",
f7625980 BH	441	.port_type = PCI_EXP_TYPE_ROOT_PORT,
f7625980 BH	442	.service = PCIE_PORT_SERVICE_PME,
c7f48656 RW	443
	444	.probe = pcie_pme_probe,
	445	.suspend = pcie_pme_suspend,
	446	.resume = pcie_pme_resume,
afe3e4d1	447	.remove = pcie_pme_remove,
c7f48656 RW	448	};
	449
	450	/**
	451	* pcie_pme_service_init - Register the PCIe PME service driver.
	452	*/
	453	static int __init pcie_pme_service_init(void)
	454	{
28eb5f27	455	return pcie_port_service_register(&pcie_pme_driver);
c7f48656	456	}
d7def204	457	device_initcall(pcie_pme_service_init);