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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * File: portdrv.h | |
3 | * Purpose: PCI Express Port Bus Driver's Internal Data Structures | |
4 | * | |
5 | * Copyright (C) 2004 Intel | |
6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
7 | */ | |
8 | ||
9 | #ifndef _PORTDRV_H_ | |
10 | #define _PORTDRV_H_ | |
11 | ||
3ec6a8d0 AM |
12 | #include <linux/compiler.h> |
13 | ||
10126ac1 | 14 | #define PCIE_PORT_DEVICE_MAXSERVICES 5 |
b43d4513 | 15 | /* |
f9f45604 | 16 | * According to the PCI Express Base Specification 2.0, the indices of |
f7625980 | 17 | * the MSI-X table entries used by port services must not exceed 31 |
b43d4513 RW |
18 | */ |
19 | #define PCIE_PORT_MAX_MSIX_ENTRIES 32 | |
1da177e4 | 20 | |
6d81417d | 21 | #define get_descriptor_id(type, service) (((type - 4) << 8) | service) |
1da177e4 LT |
22 | |
23 | extern struct bus_type pcie_port_bus_type; | |
f39d5b72 | 24 | int pcie_port_device_register(struct pci_dev *dev); |
1da177e4 | 25 | #ifdef CONFIG_PM |
f39d5b72 BH |
26 | int pcie_port_device_suspend(struct device *dev); |
27 | int pcie_port_device_resume(struct device *dev); | |
1da177e4 | 28 | #endif |
f39d5b72 BH |
29 | void pcie_port_device_remove(struct pci_dev *dev); |
30 | int __must_check pcie_port_bus_register(void); | |
31 | void pcie_port_bus_unregister(void); | |
1da177e4 | 32 | |
28eb5f27 RW |
33 | struct pci_dev; |
34 | ||
f39d5b72 | 35 | void pcie_clear_root_pme_status(struct pci_dev *dev); |
fe31e697 | 36 | |
7570a333 MT |
37 | #ifdef CONFIG_HOTPLUG_PCI_PCIE |
38 | extern bool pciehp_msi_disabled; | |
39 | ||
40 | static inline bool pciehp_no_msi(void) | |
41 | { | |
42 | return pciehp_msi_disabled; | |
43 | } | |
44 | ||
45 | #else /* !CONFIG_HOTPLUG_PCI_PCIE */ | |
46 | static inline bool pciehp_no_msi(void) { return false; } | |
47 | #endif /* !CONFIG_HOTPLUG_PCI_PCIE */ | |
48 | ||
c39fae14 RW |
49 | #ifdef CONFIG_PCIE_PME |
50 | extern bool pcie_pme_msi_disabled; | |
51 | ||
52 | static inline void pcie_pme_disable_msi(void) | |
53 | { | |
54 | pcie_pme_msi_disabled = true; | |
55 | } | |
56 | ||
57 | static inline bool pcie_pme_no_msi(void) | |
58 | { | |
59 | return pcie_pme_msi_disabled; | |
60 | } | |
28eb5f27 | 61 | |
f39d5b72 | 62 | void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable); |
c39fae14 RW |
63 | #else /* !CONFIG_PCIE_PME */ |
64 | static inline void pcie_pme_disable_msi(void) {} | |
65 | static inline bool pcie_pme_no_msi(void) { return false; } | |
28eb5f27 | 66 | static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} |
c39fae14 RW |
67 | #endif /* !CONFIG_PCIE_PME */ |
68 | ||
28eb5f27 | 69 | #ifdef CONFIG_ACPI |
88a97da1 | 70 | void pcie_port_acpi_setup(struct pci_dev *port, int *mask); |
28eb5f27 | 71 | |
88a97da1 | 72 | static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask) |
28eb5f27 | 73 | { |
88a97da1 | 74 | pcie_port_acpi_setup(port, mask); |
28eb5f27 RW |
75 | } |
76 | #else /* !CONFIG_ACPI */ | |
88a97da1 | 77 | static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask){} |
28eb5f27 RW |
78 | #endif /* !CONFIG_ACPI */ |
79 | ||
1da177e4 | 80 | #endif /* _PORTDRV_H_ */ |