[mirror_ubuntu-artful-kernel.git] / drivers / pci / pcie / portdrv_core.c

/*
 * File:	portdrv_core.c
 * Purpose:	PCI Express Port Bus Driver's Core Functions
 *
 * Copyright (C) 2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pm.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/pcieport_if.h>
#include <linux/aer.h>

#include "../pci.h"
#include "portdrv.h"

bool pciehp_msi_disabled;

static int __init pciehp_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pciehp_msi_disabled = true;

	return 1;
}
__setup("pcie_hp=", pciehp_setup);

/**
 * release_pcie_device - free PCI Express port service device structure
 * @dev: Port service device to release
 *
 * Invoked automatically when device is being removed in response to
 * device_unregister(dev).  Release all resources being claimed.
 */
static void release_pcie_device(struct device *dev)
{
	kfree(to_pcie_device(dev));
}

/**
 * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
 * @entries: Array of MSI-X entries
 * @new_entry: Index of the entry to add to the array
 * @nr_entries: Number of entries aleady in the array
 *
 * Return value: Position of the added entry in the array
 */
static int pcie_port_msix_add_entry(
	struct msix_entry *entries, int new_entry, int nr_entries)
{
	int j;

	for (j = 0; j < nr_entries; j++)
		if (entries[j].entry == new_entry)
			return j;

	entries[j].entry = new_entry;
	return j;
}

/**
 * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
 * @dev: PCI Express port to handle
 * @vectors: Array of interrupt vectors to populate
 * @mask: Bitmask of port capabilities returned by get_port_device_capability()
 *
 * Return value: 0 on success, error code on failure
 */
static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
{
	struct msix_entry *msix_entries;
	int idx[PCIE_PORT_DEVICE_MAXSERVICES];
	int nr_entries, status, pos, i, nvec;
	u16 reg16;
	u32 reg32;

	nr_entries = pci_msix_table_size(dev);
	if (!nr_entries)
		return -EINVAL;
	if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
		nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;

	msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
	if (!msix_entries)
		return -ENOMEM;

	/*
	 * Allocate as many entries as the port wants, so that we can check
	 * which of them will be useful.  Moreover, if nr_entries is correctly
	 * equal to the number of entries this port actually uses, we'll happily
	 * go through without any tricks.
	 */
	for (i = 0; i < nr_entries; i++)
		msix_entries[i].entry = i;

	status = pci_enable_msix(dev, msix_entries, nr_entries);
	if (status)
		goto Exit;

	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		idx[i] = -1;
	status = -EIO;
	nvec = 0;

	if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
		int entry;

		/*
		 * The code below follows the PCI Express Base Specification 2.0
		 * stating in Section 6.1.6 that "PME and Hot-Plug Event
		 * interrupts (when both are implemented) always share the same
		 * MSI or MSI-X vector, as indicated by the Interrupt Message
		 * Number field in the PCI Express Capabilities register", where
		 * according to Section 7.8.2 of the specification "For MSI-X,
		 * the value in this field indicates which MSI-X Table entry is
		 * used to generate the interrupt message."
		 */
		pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
		entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
		if (entry >= nr_entries)
			goto Error;

		i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
		if (i == nvec)
			nvec++;

		idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
		idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
	}

	if (mask & PCIE_PORT_SERVICE_AER) {
		int entry;

		/*
		 * The code below follows Section 7.10.10 of the PCI Express
		 * Base Specification 2.0 stating that bits 31-27 of the Root
		 * Error Status Register contain a value indicating which of the
		 * MSI/MSI-X vectors assigned to the port is going to be used
		 * for AER, where "For MSI-X, the value in this register
		 * indicates which MSI-X Table entry is used to generate the
		 * interrupt message."
		 */
		pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
		pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
		entry = reg32 >> 27;
		if (entry >= nr_entries)
			goto Error;

		i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
		if (i == nvec)
			nvec++;

		idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
	}

	/*
	 * If nvec is equal to the allocated number of entries, we can just use
	 * what we have.  Otherwise, the port has some extra entries not for the
	 * services we know and we need to work around that.
	 */
	if (nvec == nr_entries) {
		status = 0;
	} else {
		/* Drop the temporary MSI-X setup */
		pci_disable_msix(dev);

		/* Now allocate the MSI-X vectors for real */
		status = pci_enable_msix(dev, msix_entries, nvec);
		if (status)
			goto Exit;
	}

	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;

 Exit:
	kfree(msix_entries);
	return status;

 Error:
	pci_disable_msix(dev);
	goto Exit;
}

/**
 * init_service_irqs - initialize irqs for PCI Express port services
 * @dev: PCI Express port to handle
 * @irqs: Array of irqs to populate
 * @mask: Bitmask of port capabilities returned by get_port_device_capability()
 *
 * Return value: Interrupt mode associated with the port
 */
static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
{
	int i, irq = -1;

	/*
	 * If MSI cannot be used for PCIe PME or hotplug, we have to use
	 * INTx or other interrupts, e.g. system shared interrupt.
	 */
	if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
	    ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
		if (dev->irq)
			irq = dev->irq;
		goto no_msi;
	}

	/* Try to use MSI-X if supported */
	if (!pcie_port_enable_msix(dev, irqs, mask))
		return 0;

	/*
	 * We're not going to use MSI-X, so try MSI and fall back to INTx.
	 * If neither MSI/MSI-X nor INTx available, try other interrupt.  On
	 * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
	 */
	if (!pci_enable_msi(dev) || dev->irq)
		irq = dev->irq;

 no_msi:
	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		irqs[i] = irq;
	irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;

	if (irq < 0)
		return -ENODEV;
	return 0;
}

static void cleanup_service_irqs(struct pci_dev *dev)
{
	if (dev->msix_enabled)
		pci_disable_msix(dev);
	else if (dev->msi_enabled)
		pci_disable_msi(dev);
}

/**
 * get_port_device_capability - discover capabilities of a PCI Express port
 * @dev: PCI Express port to examine
 *
 * The capabilities are read from the port's PCI Express configuration registers
 * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
 * 7.9 - 7.11.
 *
 * Return value: Bitmask of discovered port capabilities
 */
static int get_port_device_capability(struct pci_dev *dev)
{
	int services = 0;
	u32 reg32;
	int cap_mask = 0;
	int err;

	if (pcie_ports_disabled)
		return 0;

	err = pcie_port_platform_notify(dev, &cap_mask);
	if (!pcie_ports_auto) {
		cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
				| PCIE_PORT_SERVICE_VC;
		if (pci_aer_available())
			cap_mask |= PCIE_PORT_SERVICE_AER;
	} else if (err) {
			return 0;
	}

	/* Hot-Plug Capable */
	if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
	    pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) {
		pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
		if (reg32 & PCI_EXP_SLTCAP_HPC) {
			services |= PCIE_PORT_SERVICE_HP;
			/*
			 * Disable hot-plug interrupts in case they have been
			 * enabled by the BIOS and the hot-plug service driver
			 * is not loaded.
			 */
			pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
				PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
		}
	}
	/* AER capable */
	if ((cap_mask & PCIE_PORT_SERVICE_AER)
	    && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
		services |= PCIE_PORT_SERVICE_AER;
		/*
		 * Disable AER on this port in case it's been enabled by the
		 * BIOS (the AER service driver will enable it when necessary).
		 */
		pci_disable_pcie_error_reporting(dev);
	}
	/* VC support */
	if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
		services |= PCIE_PORT_SERVICE_VC;
	/* Root ports are capable of generating PME too */
	if ((cap_mask & PCIE_PORT_SERVICE_PME)
	    && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
		services |= PCIE_PORT_SERVICE_PME;
		/*
		 * Disable PME interrupt on this port in case it's been enabled
		 * by the BIOS (the PME service driver will enable it when
		 * necessary).
		 */
		pcie_pme_interrupt_enable(dev, false);
	}

	return services;
}

/**
 * pcie_device_init - allocate and initialize PCI Express port service device
 * @pdev: PCI Express port to associate the service device with
 * @service: Type of service to associate with the service device
 * @irq: Interrupt vector to associate with the service device
 */
static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
{
	int retval;
	struct pcie_device *pcie;
	struct device *device;

	pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
	if (!pcie)
		return -ENOMEM;
	pcie->port = pdev;
	pcie->irq = irq;
	pcie->service = service;

	/* Initialize generic device interface */
	device = &pcie->device;
	device->bus = &pcie_port_bus_type;
	device->release = release_pcie_device;	/* callback to free pcie dev */
	dev_set_name(device, "%s:pcie%02x",
		     pci_name(pdev),
		     get_descriptor_id(pci_pcie_type(pdev), service));
	device->parent = &pdev->dev;
	device_enable_async_suspend(device);

	retval = device_register(device);
	if (retval)
		kfree(pcie);
	else
		get_device(device);
	return retval;
}

/**
 * pcie_port_device_register - register PCI Express port
 * @dev: PCI Express port to register
 *
 * Allocate the port extension structure and register services associated with
 * the port.
 */
int pcie_port_device_register(struct pci_dev *dev)
{
	int status, capabilities, i, nr_service;
	int irqs[PCIE_PORT_DEVICE_MAXSERVICES];

	/* Enable PCI Express port device */
	status = pci_enable_device(dev);
	if (status)
		return status;

	/* Get and check PCI Express port services */
	capabilities = get_port_device_capability(dev);
	if (!capabilities)
		return 0;

	pci_set_master(dev);
	/*
	 * Initialize service irqs. Don't use service devices that
	 * require interrupts if there is no way to generate them.
	 */
	status = init_service_irqs(dev, irqs, capabilities);
	if (status) {
		capabilities &= PCIE_PORT_SERVICE_VC;
		if (!capabilities)
			goto error_disable;
	}

	/* Allocate child services if any */
	status = -ENODEV;
	nr_service = 0;
	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
		int service = 1 << i;
		if (!(capabilities & service))
			continue;
		if (!pcie_device_init(dev, service, irqs[i]))
			nr_service++;
	}
	if (!nr_service)
		goto error_cleanup_irqs;

	return 0;

error_cleanup_irqs:
	cleanup_service_irqs(dev);
error_disable:
	pci_disable_device(dev);
	return status;
}

#ifdef CONFIG_PM
static int suspend_iter(struct device *dev, void *data)
{
	struct pcie_port_service_driver *service_driver;

	if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
		service_driver = to_service_driver(dev->driver);
		if (service_driver->suspend)
			service_driver->suspend(to_pcie_device(dev));
	}
	return 0;
}

/**
 * pcie_port_device_suspend - suspend port services associated with a PCIe port
 * @dev: PCI Express port to handle
 */
int pcie_port_device_suspend(struct device *dev)
{
	return device_for_each_child(dev, NULL, suspend_iter);
}

static int resume_iter(struct device *dev, void *data)
{
	struct pcie_port_service_driver *service_driver;

	if ((dev->bus == &pcie_port_bus_type) &&
	    (dev->driver)) {
		service_driver = to_service_driver(dev->driver);
		if (service_driver->resume)
			service_driver->resume(to_pcie_device(dev));
	}
	return 0;
}

/**
 * pcie_port_device_suspend - resume port services associated with a PCIe port
 * @dev: PCI Express port to handle
 */
int pcie_port_device_resume(struct device *dev)
{
	return device_for_each_child(dev, NULL, resume_iter);
}
#endif /* PM */

static int remove_iter(struct device *dev, void *data)
{
	if (dev->bus == &pcie_port_bus_type) {
		put_device(dev);
		device_unregister(dev);
	}
	return 0;
}

/**
 * pcie_port_device_remove - unregister PCI Express port service devices
 * @dev: PCI Express port the service devices to unregister are associated with
 *
 * Remove PCI Express port service devices associated with given port and
 * disable MSI-X or MSI for the port.
 */
void pcie_port_device_remove(struct pci_dev *dev)
{
	device_for_each_child(&dev->dev, NULL, remove_iter);
	cleanup_service_irqs(dev);
	pci_disable_device(dev);
}

/**
 * pcie_port_probe_service - probe driver for given PCI Express port service
 * @dev: PCI Express port service device to probe against
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * whenever match is found between the driver and a port service device.
 */
static int pcie_port_probe_service(struct device *dev)
{
	struct pcie_device *pciedev;
	struct pcie_port_service_driver *driver;
	int status;

	if (!dev || !dev->driver)
		return -ENODEV;

	driver = to_service_driver(dev->driver);
	if (!driver || !driver->probe)
		return -ENODEV;

	pciedev = to_pcie_device(dev);
	status = driver->probe(pciedev);
	if (!status) {
		dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
			driver->name);
		get_device(dev);
	}
	return status;
}

/**
 * pcie_port_remove_service - detach driver from given PCI Express port service
 * @dev: PCI Express port service device to handle
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * when device_unregister() is called for the port service device associated
 * with the driver.
 */
static int pcie_port_remove_service(struct device *dev)
{
	struct pcie_device *pciedev;
	struct pcie_port_service_driver *driver;

	if (!dev || !dev->driver)
		return 0;

	pciedev = to_pcie_device(dev);
	driver = to_service_driver(dev->driver);
	if (driver && driver->remove) {
		dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
			driver->name);
		driver->remove(pciedev);
		put_device(dev);
	}
	return 0;
}

/**
 * pcie_port_shutdown_service - shut down given PCI Express port service
 * @dev: PCI Express port service device to handle
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * when device_shutdown() is called for the port service device associated
 * with the driver.
 */
static void pcie_port_shutdown_service(struct device *dev) {}

/**
 * pcie_port_service_register - register PCI Express port service driver
 * @new: PCI Express port service driver to register
 */
int pcie_port_service_register(struct pcie_port_service_driver *new)
{
	if (pcie_ports_disabled)
		return -ENODEV;

	new->driver.name = (char *)new->name;
	new->driver.bus = &pcie_port_bus_type;
	new->driver.probe = pcie_port_probe_service;
	new->driver.remove = pcie_port_remove_service;
	new->driver.shutdown = pcie_port_shutdown_service;

	return driver_register(&new->driver);
}
EXPORT_SYMBOL(pcie_port_service_register);

/**
 * pcie_port_service_unregister - unregister PCI Express port service driver
 * @drv: PCI Express port service driver to unregister
 */
void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
{
	driver_unregister(&drv->driver);
}
EXPORT_SYMBOL(pcie_port_service_unregister);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* File: portdrv_core.c
	3	* Purpose: PCI Express Port Bus Driver's Core Functions
	4	*
	5	* Copyright (C) 2004 Intel
	6	* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/pci.h>
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/pm.h>
4e57b681 TS	14	#include <linux/string.h>
4e57b681 TS	15	#include <linux/slab.h>
1da177e4	16	#include <linux/pcieport_if.h>
28eb5f27	17	#include <linux/aer.h>
1da177e4	18
1bf83e55	19	#include "../pci.h"
1da177e4 LT	20	#include "portdrv.h"
1da177e4 LT	21
7570a333 MT	22	bool pciehp_msi_disabled;
	23
	24	static int __init pciehp_setup(char *str)
	25	{
	26	if (!strncmp(str, "nomsi", 5))
	27	pciehp_msi_disabled = true;
	28
	29	return 1;
	30	}
	31	__setup("pcie_hp=", pciehp_setup);
	32
facf6d16 RW	33	/**
	34	* release_pcie_device - free PCI Express port service device structure
	35	* @dev: Port service device to release
	36	*
	37	* Invoked automatically when device is being removed in response to
	38	* device_unregister(dev). Release all resources being claimed.
1da177e4 LT	39	*/
	40	static void release_pcie_device(struct device *dev)
	41	{
40da4186	42	kfree(to_pcie_device(dev));
1da177e4 LT	43	}
1da177e4 LT	44
b43d4513 RW	45	/**
	46	* pcie_port_msix_add_entry - add entry to given array of MSI-X entries
	47	* @entries: Array of MSI-X entries
	48	* @new_entry: Index of the entry to add to the array
	49	* @nr_entries: Number of entries aleady in the array
	50	*
	51	* Return value: Position of the added entry in the array
	52	*/
	53	static int pcie_port_msix_add_entry(
	54	struct msix_entry *entries, int new_entry, int nr_entries)
	55	{
	56	int j;
	57
	58	for (j = 0; j < nr_entries; j++)
	59	if (entries[j].entry == new_entry)
	60	return j;
	61
	62	entries[j].entry = new_entry;
	63	return j;
	64	}
	65
	66	/**
	67	* pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
	68	* @dev: PCI Express port to handle
	69	* @vectors: Array of interrupt vectors to populate
	70	* @mask: Bitmask of port capabilities returned by get_port_device_capability()
	71	*
	72	* Return value: 0 on success, error code on failure
	73	*/
	74	static int pcie_port_enable_msix(struct pci_dev dev, int vectors, int mask)
	75	{
	76	struct msix_entry *msix_entries;
	77	int idx[PCIE_PORT_DEVICE_MAXSERVICES];
	78	int nr_entries, status, pos, i, nvec;
	79	u16 reg16;
	80	u32 reg32;
	81
	82	nr_entries = pci_msix_table_size(dev);
	83	if (!nr_entries)
	84	return -EINVAL;
	85	if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
	86	nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
	87
	88	msix_entries = kzalloc(sizeof(msix_entries) nr_entries, GFP_KERNEL);
	89	if (!msix_entries)
	90	return -ENOMEM;
	91
	92	/*
	93	* Allocate as many entries as the port wants, so that we can check
	94	* which of them will be useful. Moreover, if nr_entries is correctly
	95	* equal to the number of entries this port actually uses, we'll happily
	96	* go through without any tricks.
	97	*/
	98	for (i = 0; i < nr_entries; i++)
	99	msix_entries[i].entry = i;
	100
	101	status = pci_enable_msix(dev, msix_entries, nr_entries);
	102	if (status)
	103	goto Exit;
	104
	105	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
	106	idx[i] = -1;
	107	status = -EIO;
	108	nvec = 0;
109
110	if (mask & (PCIE_PORT_SERVICE_PME \| PCIE_PORT_SERVICE_HP)) {
111	int entry;
112
113	/*
114	* The code below follows the PCI Express Base Specification 2.0
115	* stating in Section 6.1.6 that "PME and Hot-Plug Event
116	* interrupts (when both are implemented) always share the same
117	* MSI or MSI-X vector, as indicated by the Interrupt Message
118	* Number field in the PCI Express Capabilities register", where
119	* according to Section 7.8.2 of the specification "For MSI-X,
120	* the value in this field indicates which MSI-X Table entry is
121	* used to generate the interrupt message."
122	*/
33e8b34f	123	pcie_capability_read_word(dev, PCI_EXP_FLAGS, &reg16);
f9f45604	124	entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
b43d4513 RW	125	if (entry >= nr_entries)
	126	goto Error;
	127
	128	i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
	129	if (i == nvec)
	130	nvec++;
	131
	132	idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
	133	idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
	134	}
	135
	136	if (mask & PCIE_PORT_SERVICE_AER) {
	137	int entry;
	138
	139	/*
	140	* The code below follows Section 7.10.10 of the PCI Express
	141	* Base Specification 2.0 stating that bits 31-27 of the Root
	142	* Error Status Register contain a value indicating which of the
	143	* MSI/MSI-X vectors assigned to the port is going to be used
	144	* for AER, where "For MSI-X, the value in this register
	145	* indicates which MSI-X Table entry is used to generate the
	146	* interrupt message."
	147	*/
	148	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
	149	pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
	150	entry = reg32 >> 27;
	151	if (entry >= nr_entries)
	152	goto Error;
	153
	154	i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
	155	if (i == nvec)
	156	nvec++;
	157
	158	idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
	159	}
	160
	161	/*
	162	* If nvec is equal to the allocated number of entries, we can just use
	163	* what we have. Otherwise, the port has some extra entries not for the
	164	* services we know and we need to work around that.
	165	*/
	166	if (nvec == nr_entries) {
	167	status = 0;
	168	} else {
	169	/* Drop the temporary MSI-X setup */
	170	pci_disable_msix(dev);
	171
	172	/* Now allocate the MSI-X vectors for real */
	173	status = pci_enable_msix(dev, msix_entries, nvec);
	174	if (status)
	175	goto Exit;
	176	}
	177
	178	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
	179	vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
	180
	181	Exit:
	182	kfree(msix_entries);
	183	return status;
	184
	185	Error:
	186	pci_disable_msix(dev);
	187	goto Exit;
	188	}
189
facf6d16	190	/**
dc535178	191	* init_service_irqs - initialize irqs for PCI Express port services
facf6d16	192	* @dev: PCI Express port to handle
dc535178	193	* @irqs: Array of irqs to populate
facf6d16 RW	194	* @mask: Bitmask of port capabilities returned by get_port_device_capability()
	195	*
	196	* Return value: Interrupt mode associated with the port
	197	*/
dc535178	198	static int init_service_irqs(struct pci_dev dev, int irqs, int mask)
1da177e4	199	{
c39fae14 RW	200	int i, irq = -1;
c39fae14 RW	201
e237d83f SL	202	/*
	203	* If MSI cannot be used for PCIe PME or hotplug, we have to use
	204	* INTx or other interrupts, e.g. system shared interrupt.
	205	*/
7570a333 MT	206	if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) \|\|
7570a333 MT	207	((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
e237d83f	208	if (dev->irq)
c39fae14 RW	209	irq = dev->irq;
	210	goto no_msi;
	211	}
90e9cd50	212
b43d4513	213	/* Try to use MSI-X if supported */
dc535178 KK	214	if (!pcie_port_enable_msix(dev, irqs, mask))
dc535178 KK	215	return 0;
c39fae14	216
e237d83f SL	217	/*
	218	* We're not going to use MSI-X, so try MSI and fall back to INTx.
	219	* If neither MSI/MSI-X nor INTx available, try other interrupt. On
	220	* some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
	221	*/
	222	if (!pci_enable_msi(dev) \|\| dev->irq)
dc535178	223	irq = dev->irq;
b43d4513	224
c39fae14	225	no_msi:
b43d4513	226	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
dc535178 KK	227	irqs[i] = irq;
dc535178 KK	228	irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
1da177e4	229
dc535178 KK	230	if (irq < 0)
	231	return -ENODEV;
	232	return 0;
1da177e4 LT	233	}
1da177e4 LT	234
fbb5de70 KK	235	static void cleanup_service_irqs(struct pci_dev *dev)
	236	{
	237	if (dev->msix_enabled)
	238	pci_disable_msix(dev);
	239	else if (dev->msi_enabled)
	240	pci_disable_msi(dev);
	241	}
	242
facf6d16 RW	243	/**
	244	* get_port_device_capability - discover capabilities of a PCI Express port
	245	* @dev: PCI Express port to examine
	246	*
	247	* The capabilities are read from the port's PCI Express configuration registers
	248	* as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
	249	* 7.9 - 7.11.
	250	*
	251	* Return value: Bitmask of discovered port capabilities
	252	*/
1da177e4 LT	253	static int get_port_device_capability(struct pci_dev *dev)
1da177e4 LT	254	{
2dcfaf85	255	int services = 0;
1da177e4	256	u32 reg32;
1267b3a3	257	int cap_mask = 0;
28eb5f27 RW	258	int err;
28eb5f27 RW	259
fe31e697 RW	260	if (pcie_ports_disabled)
	261	return 0;
	262
28eb5f27	263	err = pcie_port_platform_notify(dev, &cap_mask);
fe31e697	264	if (!pcie_ports_auto) {
28eb5f27 RW	265	cap_mask = PCIE_PORT_SERVICE_PME \| PCIE_PORT_SERVICE_HP
	266	\| PCIE_PORT_SERVICE_VC;
	267	if (pci_aer_available())
	268	cap_mask \|= PCIE_PORT_SERVICE_AER;
fe31e697 RW	269	} else if (err) {
fe31e697 RW	270	return 0;
28eb5f27	271	}
1da177e4	272
1da177e4	273	/* Hot-Plug Capable */
ff8e59bc	274	if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
1c531d82	275	pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) {
2dcfaf85	276	pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
2bd50dd8	277	if (reg32 & PCI_EXP_SLTCAP_HPC) {
1da177e4	278	services \|= PCIE_PORT_SERVICE_HP;
2bd50dd8 RW	279	/*
	280	* Disable hot-plug interrupts in case they have been
	281	* enabled by the BIOS and the hot-plug service driver
	282	* is not loaded.
	283	*/
2dcfaf85 JL	284	pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
2dcfaf85 JL	285	PCI_EXP_SLTCTL_CCIE \| PCI_EXP_SLTCTL_HPIE);
2bd50dd8	286	}
1bf83e55 RW	287	}
1bf83e55 RW	288	/* AER capable */
28eb5f27	289	if ((cap_mask & PCIE_PORT_SERVICE_AER)
2bd50dd8	290	&& pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
0927678f	291	services \|= PCIE_PORT_SERVICE_AER;
2bd50dd8 RW	292	/*
	293	* Disable AER on this port in case it's been enabled by the
	294	* BIOS (the AER service driver will enable it when necessary).
	295	*/
	296	pci_disable_pcie_error_reporting(dev);
	297	}
1bf83e55	298	/* VC support */
0927678f JB	299	if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
0927678f JB	300	services \|= PCIE_PORT_SERVICE_VC;
9e5d0b16	301	/* Root ports are capable of generating PME too */
28eb5f27	302	if ((cap_mask & PCIE_PORT_SERVICE_PME)
62f87c0e	303	&& pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
9e5d0b16	304	services \|= PCIE_PORT_SERVICE_PME;
2bd50dd8 RW	305	/*
	306	* Disable PME interrupt on this port in case it's been enabled
	307	* by the BIOS (the PME service driver will enable it when
	308	* necessary).
	309	*/
	310	pcie_pme_interrupt_enable(dev, false);
	311	}
1da177e4 LT	312
	313	return services;
	314	}
	315
facf6d16	316	/**
52a0f24b KK	317	* pcie_device_init - allocate and initialize PCI Express port service device
	318	* @pdev: PCI Express port to associate the service device with
	319	* @service: Type of service to associate with the service device
facf6d16	320	* @irq: Interrupt vector to associate with the service device
facf6d16	321	*/
52a0f24b	322	static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
1da177e4	323	{
52a0f24b KK	324	int retval;
52a0f24b KK	325	struct pcie_device *pcie;
1da177e4 LT	326	struct device *device;
1da177e4 LT	327
52a0f24b KK	328	pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
	329	if (!pcie)
	330	return -ENOMEM;
	331	pcie->port = pdev;
	332	pcie->irq = irq;
	333	pcie->service = service;
1da177e4 LT	334
1da177e4 LT	335	/* Initialize generic device interface */
52a0f24b	336	device = &pcie->device;
1da177e4	337	device->bus = &pcie_port_bus_type;
1da177e4	338	device->release = release_pcie_device; /* callback to free pcie dev */
1a927133	339	dev_set_name(device, "%s:pcie%02x",
52a0f24b	340	pci_name(pdev),
62f87c0e	341	get_descriptor_id(pci_pcie_type(pdev), service));
52a0f24b	342	device->parent = &pdev->dev;
a1e4d72c	343	device_enable_async_suspend(device);
52a0f24b KK	344
	345	retval = device_register(device);
	346	if (retval)
	347	kfree(pcie);
	348	else
	349	get_device(device);
	350	return retval;
1da177e4 LT	351	}
1da177e4 LT	352
facf6d16 RW	353	/**
	354	* pcie_port_device_register - register PCI Express port
	355	* @dev: PCI Express port to register
	356	*
	357	* Allocate the port extension structure and register services associated with
	358	* the port.
	359	*/
1da177e4 LT	360	int pcie_port_device_register(struct pci_dev *dev)
1da177e4 LT	361	{
40717c39	362	int status, capabilities, i, nr_service;
dc535178	363	int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
1da177e4	364
1ce5e830 KK	365	/* Enable PCI Express port device */
	366	status = pci_enable_device(dev);
	367	if (status)
694f88ef	368	return status;
fe31e697 RW	369
	370	/* Get and check PCI Express port services */
	371	capabilities = get_port_device_capability(dev);
eca67315	372	if (!capabilities)
fe31e697	373	return 0;
fe31e697	374
1ce5e830	375	pci_set_master(dev);
dc535178 KK	376	/*
	377	* Initialize service irqs. Don't use service devices that
	378	* require interrupts if there is no way to generate them.
	379	*/
	380	status = init_service_irqs(dev, irqs, capabilities);
	381	if (status) {
	382	capabilities &= PCIE_PORT_SERVICE_VC;
	383	if (!capabilities)
1ce5e830	384	goto error_disable;
f118c0c3	385	}
1da177e4 LT	386
1da177e4 LT	387	/* Allocate child services if any */
40717c39 KK	388	status = -ENODEV;
	389	nr_service = 0;
	390	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
90e9cd50	391	int service = 1 << i;
90e9cd50 RW	392	if (!(capabilities & service))
90e9cd50 RW	393	continue;
40717c39 KK	394	if (!pcie_device_init(dev, service, irqs[i]))
40717c39 KK	395	nr_service++;
f118c0c3	396	}
40717c39	397	if (!nr_service)
fbb5de70	398	goto error_cleanup_irqs;
40717c39	399
1da177e4	400	return 0;
f118c0c3	401
fbb5de70 KK	402	error_cleanup_irqs:
fbb5de70 KK	403	cleanup_service_irqs(dev);
1ce5e830 KK	404	error_disable:
1ce5e830 KK	405	pci_disable_device(dev);
f118c0c3	406	return status;
1da177e4 LT	407	}
	408
	409	#ifdef CONFIG_PM
d0e2b4a0	410	static int suspend_iter(struct device dev, void data)
1da177e4	411	{
1da177e4	412	struct pcie_port_service_driver *service_driver;
d0e2b4a0	413
40da4186 HS	414	if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
	415	service_driver = to_service_driver(dev->driver);
	416	if (service_driver->suspend)
	417	service_driver->suspend(to_pcie_device(dev));
	418	}
d0e2b4a0	419	return 0;
d0e2b4a0	420	}
1da177e4	421
facf6d16 RW	422	/**
	423	* pcie_port_device_suspend - suspend port services associated with a PCIe port
	424	* @dev: PCI Express port to handle
facf6d16	425	*/
3a3c244c	426	int pcie_port_device_suspend(struct device *dev)
d0e2b4a0	427	{
3a3c244c	428	return device_for_each_child(dev, NULL, suspend_iter);
1da177e4 LT	429	}
1da177e4 LT	430
d0e2b4a0	431	static int resume_iter(struct device dev, void data)
d0e2b4a0	432	{
1da177e4 LT	433	struct pcie_port_service_driver *service_driver;
1da177e4 LT	434
d0e2b4a0	435	if ((dev->bus == &pcie_port_bus_type) &&
	436	(dev->driver)) {
	437	service_driver = to_service_driver(dev->driver);
	438	if (service_driver->resume)
	439	service_driver->resume(to_pcie_device(dev));
1da177e4	440	}
d0e2b4a0	441	return 0;
d0e2b4a0	442	}
1da177e4	443
facf6d16 RW	444	/**
	445	* pcie_port_device_suspend - resume port services associated with a PCIe port
	446	* @dev: PCI Express port to handle
	447	*/
3a3c244c	448	int pcie_port_device_resume(struct device *dev)
d0e2b4a0	449	{
3a3c244c	450	return device_for_each_child(dev, NULL, resume_iter);
1da177e4	451	}
3a3c244c	452	#endif /* PM */
1da177e4	453
d0e2b4a0	454	static int remove_iter(struct device dev, void data)
1da177e4	455	{
d0e2b4a0	456	if (dev->bus == &pcie_port_bus_type) {
ae40582e EB	457	put_device(dev);
ae40582e EB	458	device_unregister(dev);
1da177e4	459	}
d0e2b4a0	460	return 0;
	461	}
	462
facf6d16 RW	463	/**
	464	* pcie_port_device_remove - unregister PCI Express port service devices
	465	* @dev: PCI Express port the service devices to unregister are associated with
	466	*
	467	* Remove PCI Express port service devices associated with given port and
	468	* disable MSI-X or MSI for the port.
	469	*/
d0e2b4a0	470	void pcie_port_device_remove(struct pci_dev *dev)
d0e2b4a0	471	{
ae40582e	472	device_for_each_child(&dev->dev, NULL, remove_iter);
fbb5de70	473	cleanup_service_irqs(dev);
dc535178	474	pci_disable_device(dev);
1da177e4 LT	475	}
1da177e4 LT	476
d9347371 RW	477	/**
	478	* pcie_port_probe_service - probe driver for given PCI Express port service
	479	* @dev: PCI Express port service device to probe against
	480	*
	481	* If PCI Express port service driver is registered with
	482	* pcie_port_service_register(), this function will be called by the driver core
	483	* whenever match is found between the driver and a port service device.
	484	*/
fa6c9937	485	static int pcie_port_probe_service(struct device *dev)
1da177e4	486	{
fa6c9937 RW	487	struct pcie_device *pciedev;
	488	struct pcie_port_service_driver *driver;
	489	int status;
	490
	491	if (!dev \|\| !dev->driver)
	492	return -ENODEV;
	493
	494	driver = to_service_driver(dev->driver);
	495	if (!driver \|\| !driver->probe)
	496	return -ENODEV;
	497
	498	pciedev = to_pcie_device(dev);
0516c8bc	499	status = driver->probe(pciedev);
fa6c9937 RW	500	if (!status) {
	501	dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
	502	driver->name);
	503	get_device(dev);
	504	}
	505	return status;
1da177e4 LT	506	}
1da177e4 LT	507
d9347371 RW	508	/**
	509	* pcie_port_remove_service - detach driver from given PCI Express port service
	510	* @dev: PCI Express port service device to handle
	511	*
	512	* If PCI Express port service driver is registered with
	513	* pcie_port_service_register(), this function will be called by the driver core
	514	* when device_unregister() is called for the port service device associated
	515	* with the driver.
	516	*/
fa6c9937	517	static int pcie_port_remove_service(struct device *dev)
1da177e4	518	{
fa6c9937 RW	519	struct pcie_device *pciedev;
	520	struct pcie_port_service_driver *driver;
	521
	522	if (!dev \|\| !dev->driver)
	523	return 0;
	524
	525	pciedev = to_pcie_device(dev);
	526	driver = to_service_driver(dev->driver);
	527	if (driver && driver->remove) {
	528	dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
	529	driver->name);
	530	driver->remove(pciedev);
	531	put_device(dev);
	532	}
	533	return 0;
1da177e4 LT	534	}
1da177e4 LT	535
d9347371 RW	536	/**
	537	* pcie_port_shutdown_service - shut down given PCI Express port service
	538	* @dev: PCI Express port service device to handle
	539	*
	540	* If PCI Express port service driver is registered with
	541	* pcie_port_service_register(), this function will be called by the driver core
	542	* when device_shutdown() is called for the port service device associated
	543	* with the driver.
	544	*/
fa6c9937 RW	545	static void pcie_port_shutdown_service(struct device *dev) {}
fa6c9937 RW	546
d9347371 RW	547	/**
	548	* pcie_port_service_register - register PCI Express port service driver
	549	* @new: PCI Express port service driver to register
	550	*/
1da177e4 LT	551	int pcie_port_service_register(struct pcie_port_service_driver *new)
1da177e4 LT	552	{
79dd9182 RW	553	if (pcie_ports_disabled)
	554	return -ENODEV;
	555
1da177e4 LT	556	new->driver.name = (char *)new->name;
	557	new->driver.bus = &pcie_port_bus_type;
	558	new->driver.probe = pcie_port_probe_service;
	559	new->driver.remove = pcie_port_remove_service;
	560	new->driver.shutdown = pcie_port_shutdown_service;
1da177e4 LT	561
1da177e4 LT	562	return driver_register(&new->driver);
d0e2b4a0	563	}
40da4186	564	EXPORT_SYMBOL(pcie_port_service_register);
1da177e4	565
d9347371 RW	566	/**
	567	* pcie_port_service_unregister - unregister PCI Express port service driver
	568	* @drv: PCI Express port service driver to unregister
	569	*/
fa6c9937	570	void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
1da177e4	571	{
fa6c9937	572	driver_unregister(&drv->driver);
1da177e4	573	}
1da177e4	574	EXPORT_SYMBOL(pcie_port_service_unregister);