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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * File: portdrv_core.c | |
4 | * Purpose: PCI Express Port Bus Driver's Core Functions | |
5 | * | |
6 | * Copyright (C) 2004 Intel | |
7 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
8 | */ | |
9 | ||
10 | #include <linux/module.h> | |
11 | #include <linux/pci.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/pm.h> | |
006d44e4 | 15 | #include <linux/pm_runtime.h> |
4e57b681 TS |
16 | #include <linux/string.h> |
17 | #include <linux/slab.h> | |
1da177e4 | 18 | #include <linux/pcieport_if.h> |
28eb5f27 | 19 | #include <linux/aer.h> |
1da177e4 | 20 | |
1bf83e55 | 21 | #include "../pci.h" |
1da177e4 LT |
22 | #include "portdrv.h" |
23 | ||
7570a333 MT |
24 | bool pciehp_msi_disabled; |
25 | ||
26 | static int __init pciehp_setup(char *str) | |
27 | { | |
28 | if (!strncmp(str, "nomsi", 5)) | |
29 | pciehp_msi_disabled = true; | |
30 | ||
31 | return 1; | |
32 | } | |
33 | __setup("pcie_hp=", pciehp_setup); | |
34 | ||
facf6d16 RW |
35 | /** |
36 | * release_pcie_device - free PCI Express port service device structure | |
37 | * @dev: Port service device to release | |
38 | * | |
39 | * Invoked automatically when device is being removed in response to | |
40 | * device_unregister(dev). Release all resources being claimed. | |
1da177e4 LT |
41 | */ |
42 | static void release_pcie_device(struct device *dev) | |
43 | { | |
40da4186 | 44 | kfree(to_pcie_device(dev)); |
1da177e4 LT |
45 | } |
46 | ||
b43d4513 | 47 | /** |
a1d5f18c GP |
48 | * pcie_port_enable_irq_vec - try to set up MSI-X or MSI as interrupt mode |
49 | * for given port | |
b43d4513 | 50 | * @dev: PCI Express port to handle |
3674cc49 | 51 | * @irqs: Array of interrupt vectors to populate |
b43d4513 RW |
52 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() |
53 | * | |
54 | * Return value: 0 on success, error code on failure | |
55 | */ | |
a1d5f18c | 56 | static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) |
b43d4513 | 57 | { |
3674cc49 | 58 | int nr_entries, entry, nvec = 0; |
b43d4513 RW |
59 | |
60 | /* | |
61 | * Allocate as many entries as the port wants, so that we can check | |
62 | * which of them will be useful. Moreover, if nr_entries is correctly | |
63 | * equal to the number of entries this port actually uses, we'll happily | |
64 | * go through without any tricks. | |
65 | */ | |
a1d5f18c GP |
66 | nr_entries = pci_alloc_irq_vectors(dev, 1, PCIE_PORT_MAX_MSI_ENTRIES, |
67 | PCI_IRQ_MSIX | PCI_IRQ_MSI); | |
3674cc49 CH |
68 | if (nr_entries < 0) |
69 | return nr_entries; | |
b43d4513 RW |
70 | |
71 | if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) { | |
3674cc49 | 72 | u16 reg16; |
b43d4513 RW |
73 | |
74 | /* | |
a1d5f18c GP |
75 | * Per PCIe r3.1, sec 6.1.6, "PME and Hot-Plug Event |
76 | * interrupts (when both are implemented) always share the | |
77 | * same MSI or MSI-X vector, as indicated by the Interrupt | |
78 | * Message Number field in the PCI Express Capabilities | |
79 | * register". | |
80 | * | |
81 | * Per sec 7.8.2, "For MSI, the [Interrupt Message Number] | |
82 | * indicates the offset between the base Message Data and | |
83 | * the interrupt message that is generated." | |
84 | * | |
85 | * "For MSI-X, the [Interrupt Message Number] indicates | |
86 | * which MSI-X Table entry is used to generate the | |
87 | * interrupt message." | |
b43d4513 | 88 | */ |
33e8b34f | 89 | pcie_capability_read_word(dev, PCI_EXP_FLAGS, ®16); |
f9f45604 | 90 | entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; |
b43d4513 | 91 | if (entry >= nr_entries) |
3674cc49 | 92 | goto out_free_irqs; |
b43d4513 | 93 | |
3674cc49 CH |
94 | irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pci_irq_vector(dev, entry); |
95 | irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pci_irq_vector(dev, entry); | |
b43d4513 | 96 | |
3674cc49 | 97 | nvec = max(nvec, entry + 1); |
b43d4513 RW |
98 | } |
99 | ||
100 | if (mask & PCIE_PORT_SERVICE_AER) { | |
3674cc49 | 101 | u32 reg32, pos; |
b43d4513 RW |
102 | |
103 | /* | |
a1d5f18c GP |
104 | * Per PCIe r3.1, sec 7.10.10, the Advanced Error Interrupt |
105 | * Message Number in the Root Error Status register | |
106 | * indicates which MSI/MSI-X vector is used for AER. | |
107 | * | |
108 | * "For MSI, the [Advanced Error Interrupt Message Number] | |
109 | * indicates the offset between the base Message Data and | |
110 | * the interrupt message that is generated." | |
111 | * | |
112 | * "For MSI-X, the [Advanced Error Interrupt Message | |
113 | * Number] indicates which MSI-X Table entry is used to | |
114 | * generate the interrupt message." | |
b43d4513 RW |
115 | */ |
116 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | |
117 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); | |
118 | entry = reg32 >> 27; | |
119 | if (entry >= nr_entries) | |
3674cc49 | 120 | goto out_free_irqs; |
b43d4513 | 121 | |
3674cc49 | 122 | irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, entry); |
b43d4513 | 123 | |
3674cc49 | 124 | nvec = max(nvec, entry + 1); |
b43d4513 RW |
125 | } |
126 | ||
ae6dc7de GP |
127 | if (mask & PCIE_PORT_SERVICE_DPC) { |
128 | u16 reg16, pos; | |
129 | ||
130 | /* | |
131 | * Per PCIe r4.0 (v0.9), sec 7.9.15.2, the DPC Interrupt | |
132 | * Message Number in the DPC Capability register indicates | |
133 | * which MSI/MSI-X vector is used for DPC. | |
134 | * | |
135 | * "For MSI, the [DPC Interrupt Message Number] indicates | |
136 | * the offset between the base Message Data and the | |
137 | * interrupt message that is generated." | |
138 | * | |
139 | * "For MSI-X, the [DPC Interrupt Message Number] indicates | |
140 | * which MSI-X Table entry is used to generate the | |
141 | * interrupt message." | |
142 | */ | |
143 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC); | |
144 | pci_read_config_word(dev, pos + PCI_EXP_DPC_CAP, ®16); | |
145 | entry = reg16 & 0x1f; | |
146 | if (entry >= nr_entries) | |
147 | goto out_free_irqs; | |
148 | ||
149 | irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, entry); | |
150 | ||
151 | nvec = max(nvec, entry + 1); | |
152 | } | |
153 | ||
b43d4513 RW |
154 | /* |
155 | * If nvec is equal to the allocated number of entries, we can just use | |
156 | * what we have. Otherwise, the port has some extra entries not for the | |
157 | * services we know and we need to work around that. | |
158 | */ | |
3674cc49 | 159 | if (nvec != nr_entries) { |
b43d4513 | 160 | /* Drop the temporary MSI-X setup */ |
3674cc49 | 161 | pci_free_irq_vectors(dev); |
b43d4513 RW |
162 | |
163 | /* Now allocate the MSI-X vectors for real */ | |
3674cc49 | 164 | nr_entries = pci_alloc_irq_vectors(dev, nvec, nvec, |
a1d5f18c | 165 | PCI_IRQ_MSIX | PCI_IRQ_MSI); |
3674cc49 CH |
166 | if (nr_entries < 0) |
167 | return nr_entries; | |
b43d4513 RW |
168 | } |
169 | ||
3674cc49 | 170 | return 0; |
b43d4513 | 171 | |
3674cc49 CH |
172 | out_free_irqs: |
173 | pci_free_irq_vectors(dev); | |
174 | return -EIO; | |
b43d4513 RW |
175 | } |
176 | ||
facf6d16 | 177 | /** |
3674cc49 | 178 | * pcie_init_service_irqs - initialize irqs for PCI Express port services |
facf6d16 | 179 | * @dev: PCI Express port to handle |
dc535178 | 180 | * @irqs: Array of irqs to populate |
facf6d16 RW |
181 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() |
182 | * | |
183 | * Return value: Interrupt mode associated with the port | |
184 | */ | |
3674cc49 | 185 | static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) |
1da177e4 | 186 | { |
3674cc49 CH |
187 | int ret, i; |
188 | ||
189 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) | |
190 | irqs[i] = -1; | |
c39fae14 | 191 | |
e237d83f | 192 | /* |
a1d5f18c GP |
193 | * If we support PME or hotplug, but we can't use MSI/MSI-X for |
194 | * them, we have to fall back to INTx or other interrupts, e.g., a | |
195 | * system shared interrupt. | |
e237d83f | 196 | */ |
a1d5f18c GP |
197 | if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) |
198 | goto legacy_irq; | |
199 | ||
200 | if ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi()) | |
201 | goto legacy_irq; | |
202 | ||
203 | /* Try to use MSI-X or MSI if supported */ | |
204 | if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0) | |
205 | return 0; | |
90e9cd50 | 206 | |
a1d5f18c GP |
207 | legacy_irq: |
208 | /* fall back to legacy IRQ */ | |
209 | ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_LEGACY); | |
3674cc49 CH |
210 | if (ret < 0) |
211 | return -ENODEV; | |
b43d4513 | 212 | |
3674cc49 CH |
213 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { |
214 | if (i != PCIE_PORT_SERVICE_VC_SHIFT) | |
215 | irqs[i] = pci_irq_vector(dev, 0); | |
216 | } | |
1da177e4 | 217 | |
dc535178 | 218 | return 0; |
1da177e4 LT |
219 | } |
220 | ||
facf6d16 RW |
221 | /** |
222 | * get_port_device_capability - discover capabilities of a PCI Express port | |
223 | * @dev: PCI Express port to examine | |
224 | * | |
225 | * The capabilities are read from the port's PCI Express configuration registers | |
226 | * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and | |
227 | * 7.9 - 7.11. | |
228 | * | |
229 | * Return value: Bitmask of discovered port capabilities | |
230 | */ | |
1da177e4 LT |
231 | static int get_port_device_capability(struct pci_dev *dev) |
232 | { | |
2dcfaf85 | 233 | int services = 0; |
1267b3a3 | 234 | int cap_mask = 0; |
28eb5f27 | 235 | |
fe31e697 RW |
236 | if (pcie_ports_disabled) |
237 | return 0; | |
238 | ||
6b87e700 | 239 | cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP |
10126ac1 | 240 | | PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_DPC; |
6b87e700 AM |
241 | if (pci_aer_available()) |
242 | cap_mask |= PCIE_PORT_SERVICE_AER; | |
243 | ||
88a97da1 JD |
244 | if (pcie_ports_auto) |
245 | pcie_port_platform_notify(dev, &cap_mask); | |
1da177e4 | 246 | |
1da177e4 | 247 | /* Hot-Plug Capable */ |
f8415222 LW |
248 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) { |
249 | services |= PCIE_PORT_SERVICE_HP; | |
250 | /* | |
251 | * Disable hot-plug interrupts in case they have been enabled | |
252 | * by the BIOS and the hot-plug service driver is not loaded. | |
253 | */ | |
254 | pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, | |
255 | PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); | |
1bf83e55 RW |
256 | } |
257 | /* AER capable */ | |
28eb5f27 | 258 | if ((cap_mask & PCIE_PORT_SERVICE_AER) |
2bd50dd8 | 259 | && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) { |
0927678f | 260 | services |= PCIE_PORT_SERVICE_AER; |
2bd50dd8 RW |
261 | /* |
262 | * Disable AER on this port in case it's been enabled by the | |
263 | * BIOS (the AER service driver will enable it when necessary). | |
264 | */ | |
265 | pci_disable_pcie_error_reporting(dev); | |
266 | } | |
1bf83e55 | 267 | /* VC support */ |
0927678f JB |
268 | if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC)) |
269 | services |= PCIE_PORT_SERVICE_VC; | |
9e5d0b16 | 270 | /* Root ports are capable of generating PME too */ |
28eb5f27 | 271 | if ((cap_mask & PCIE_PORT_SERVICE_PME) |
62f87c0e | 272 | && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) { |
9e5d0b16 | 273 | services |= PCIE_PORT_SERVICE_PME; |
2bd50dd8 RW |
274 | /* |
275 | * Disable PME interrupt on this port in case it's been enabled | |
276 | * by the BIOS (the PME service driver will enable it when | |
277 | * necessary). | |
278 | */ | |
279 | pcie_pme_interrupt_enable(dev, false); | |
280 | } | |
10126ac1 KB |
281 | if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC)) |
282 | services |= PCIE_PORT_SERVICE_DPC; | |
1da177e4 LT |
283 | |
284 | return services; | |
285 | } | |
286 | ||
facf6d16 | 287 | /** |
52a0f24b KK |
288 | * pcie_device_init - allocate and initialize PCI Express port service device |
289 | * @pdev: PCI Express port to associate the service device with | |
290 | * @service: Type of service to associate with the service device | |
facf6d16 | 291 | * @irq: Interrupt vector to associate with the service device |
facf6d16 | 292 | */ |
52a0f24b | 293 | static int pcie_device_init(struct pci_dev *pdev, int service, int irq) |
1da177e4 | 294 | { |
52a0f24b KK |
295 | int retval; |
296 | struct pcie_device *pcie; | |
1da177e4 LT |
297 | struct device *device; |
298 | ||
52a0f24b KK |
299 | pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); |
300 | if (!pcie) | |
301 | return -ENOMEM; | |
302 | pcie->port = pdev; | |
303 | pcie->irq = irq; | |
304 | pcie->service = service; | |
1da177e4 LT |
305 | |
306 | /* Initialize generic device interface */ | |
52a0f24b | 307 | device = &pcie->device; |
1da177e4 | 308 | device->bus = &pcie_port_bus_type; |
1da177e4 | 309 | device->release = release_pcie_device; /* callback to free pcie dev */ |
6d81417d | 310 | dev_set_name(device, "%s:pcie%03x", |
52a0f24b | 311 | pci_name(pdev), |
62f87c0e | 312 | get_descriptor_id(pci_pcie_type(pdev), service)); |
52a0f24b | 313 | device->parent = &pdev->dev; |
a1e4d72c | 314 | device_enable_async_suspend(device); |
52a0f24b KK |
315 | |
316 | retval = device_register(device); | |
8f3acca9 | 317 | if (retval) { |
f3986205 | 318 | put_device(device); |
8f3acca9 BH |
319 | return retval; |
320 | } | |
321 | ||
006d44e4 MW |
322 | pm_runtime_no_callbacks(device); |
323 | ||
8f3acca9 | 324 | return 0; |
1da177e4 LT |
325 | } |
326 | ||
facf6d16 RW |
327 | /** |
328 | * pcie_port_device_register - register PCI Express port | |
329 | * @dev: PCI Express port to register | |
330 | * | |
331 | * Allocate the port extension structure and register services associated with | |
332 | * the port. | |
333 | */ | |
1da177e4 LT |
334 | int pcie_port_device_register(struct pci_dev *dev) |
335 | { | |
40717c39 | 336 | int status, capabilities, i, nr_service; |
dc535178 | 337 | int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; |
1da177e4 | 338 | |
1ce5e830 KK |
339 | /* Enable PCI Express port device */ |
340 | status = pci_enable_device(dev); | |
341 | if (status) | |
694f88ef | 342 | return status; |
fe31e697 RW |
343 | |
344 | /* Get and check PCI Express port services */ | |
345 | capabilities = get_port_device_capability(dev); | |
eca67315 | 346 | if (!capabilities) |
fe31e697 | 347 | return 0; |
fe31e697 | 348 | |
1ce5e830 | 349 | pci_set_master(dev); |
dc535178 KK |
350 | /* |
351 | * Initialize service irqs. Don't use service devices that | |
352 | * require interrupts if there is no way to generate them. | |
374a9140 RJ |
353 | * However, some drivers may have a polling mode (e.g. pciehp_poll_mode) |
354 | * that can be used in the absence of irqs. Allow them to determine | |
355 | * if that is to be used. | |
dc535178 | 356 | */ |
3674cc49 | 357 | status = pcie_init_service_irqs(dev, irqs, capabilities); |
dc535178 | 358 | if (status) { |
374a9140 | 359 | capabilities &= PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_HP; |
dc535178 | 360 | if (!capabilities) |
1ce5e830 | 361 | goto error_disable; |
f118c0c3 | 362 | } |
1da177e4 LT |
363 | |
364 | /* Allocate child services if any */ | |
40717c39 KK |
365 | status = -ENODEV; |
366 | nr_service = 0; | |
367 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { | |
90e9cd50 | 368 | int service = 1 << i; |
90e9cd50 RW |
369 | if (!(capabilities & service)) |
370 | continue; | |
40717c39 KK |
371 | if (!pcie_device_init(dev, service, irqs[i])) |
372 | nr_service++; | |
f118c0c3 | 373 | } |
40717c39 | 374 | if (!nr_service) |
fbb5de70 | 375 | goto error_cleanup_irqs; |
40717c39 | 376 | |
1da177e4 | 377 | return 0; |
f118c0c3 | 378 | |
fbb5de70 | 379 | error_cleanup_irqs: |
3674cc49 | 380 | pci_free_irq_vectors(dev); |
1ce5e830 KK |
381 | error_disable: |
382 | pci_disable_device(dev); | |
f118c0c3 | 383 | return status; |
1da177e4 LT |
384 | } |
385 | ||
386 | #ifdef CONFIG_PM | |
d0e2b4a0 | 387 | static int suspend_iter(struct device *dev, void *data) |
1da177e4 | 388 | { |
1da177e4 | 389 | struct pcie_port_service_driver *service_driver; |
d0e2b4a0 | 390 | |
40da4186 HS |
391 | if ((dev->bus == &pcie_port_bus_type) && dev->driver) { |
392 | service_driver = to_service_driver(dev->driver); | |
393 | if (service_driver->suspend) | |
394 | service_driver->suspend(to_pcie_device(dev)); | |
395 | } | |
d0e2b4a0 | 396 | return 0; |
397 | } | |
1da177e4 | 398 | |
facf6d16 RW |
399 | /** |
400 | * pcie_port_device_suspend - suspend port services associated with a PCIe port | |
401 | * @dev: PCI Express port to handle | |
facf6d16 | 402 | */ |
3a3c244c | 403 | int pcie_port_device_suspend(struct device *dev) |
d0e2b4a0 | 404 | { |
3a3c244c | 405 | return device_for_each_child(dev, NULL, suspend_iter); |
1da177e4 LT |
406 | } |
407 | ||
d0e2b4a0 | 408 | static int resume_iter(struct device *dev, void *data) |
409 | { | |
1da177e4 LT |
410 | struct pcie_port_service_driver *service_driver; |
411 | ||
d0e2b4a0 | 412 | if ((dev->bus == &pcie_port_bus_type) && |
413 | (dev->driver)) { | |
414 | service_driver = to_service_driver(dev->driver); | |
415 | if (service_driver->resume) | |
416 | service_driver->resume(to_pcie_device(dev)); | |
1da177e4 | 417 | } |
d0e2b4a0 | 418 | return 0; |
419 | } | |
1da177e4 | 420 | |
facf6d16 | 421 | /** |
e7f6c6d0 | 422 | * pcie_port_device_resume - resume port services associated with a PCIe port |
facf6d16 RW |
423 | * @dev: PCI Express port to handle |
424 | */ | |
3a3c244c | 425 | int pcie_port_device_resume(struct device *dev) |
d0e2b4a0 | 426 | { |
3a3c244c | 427 | return device_for_each_child(dev, NULL, resume_iter); |
1da177e4 | 428 | } |
3a3c244c | 429 | #endif /* PM */ |
1da177e4 | 430 | |
d0e2b4a0 | 431 | static int remove_iter(struct device *dev, void *data) |
1da177e4 | 432 | { |
e75f34ce | 433 | if (dev->bus == &pcie_port_bus_type) |
ae40582e | 434 | device_unregister(dev); |
d0e2b4a0 | 435 | return 0; |
436 | } | |
437 | ||
facf6d16 RW |
438 | /** |
439 | * pcie_port_device_remove - unregister PCI Express port service devices | |
440 | * @dev: PCI Express port the service devices to unregister are associated with | |
441 | * | |
442 | * Remove PCI Express port service devices associated with given port and | |
443 | * disable MSI-X or MSI for the port. | |
444 | */ | |
d0e2b4a0 | 445 | void pcie_port_device_remove(struct pci_dev *dev) |
446 | { | |
ae40582e | 447 | device_for_each_child(&dev->dev, NULL, remove_iter); |
3674cc49 | 448 | pci_free_irq_vectors(dev); |
dc535178 | 449 | pci_disable_device(dev); |
1da177e4 LT |
450 | } |
451 | ||
d9347371 RW |
452 | /** |
453 | * pcie_port_probe_service - probe driver for given PCI Express port service | |
454 | * @dev: PCI Express port service device to probe against | |
455 | * | |
456 | * If PCI Express port service driver is registered with | |
457 | * pcie_port_service_register(), this function will be called by the driver core | |
458 | * whenever match is found between the driver and a port service device. | |
459 | */ | |
fa6c9937 | 460 | static int pcie_port_probe_service(struct device *dev) |
1da177e4 | 461 | { |
fa6c9937 RW |
462 | struct pcie_device *pciedev; |
463 | struct pcie_port_service_driver *driver; | |
464 | int status; | |
465 | ||
466 | if (!dev || !dev->driver) | |
467 | return -ENODEV; | |
468 | ||
469 | driver = to_service_driver(dev->driver); | |
470 | if (!driver || !driver->probe) | |
471 | return -ENODEV; | |
472 | ||
473 | pciedev = to_pcie_device(dev); | |
0516c8bc | 474 | status = driver->probe(pciedev); |
8f3acca9 BH |
475 | if (status) |
476 | return status; | |
477 | ||
8f3acca9 BH |
478 | get_device(dev); |
479 | return 0; | |
1da177e4 LT |
480 | } |
481 | ||
d9347371 RW |
482 | /** |
483 | * pcie_port_remove_service - detach driver from given PCI Express port service | |
484 | * @dev: PCI Express port service device to handle | |
485 | * | |
486 | * If PCI Express port service driver is registered with | |
487 | * pcie_port_service_register(), this function will be called by the driver core | |
488 | * when device_unregister() is called for the port service device associated | |
489 | * with the driver. | |
490 | */ | |
fa6c9937 | 491 | static int pcie_port_remove_service(struct device *dev) |
1da177e4 | 492 | { |
fa6c9937 RW |
493 | struct pcie_device *pciedev; |
494 | struct pcie_port_service_driver *driver; | |
495 | ||
496 | if (!dev || !dev->driver) | |
497 | return 0; | |
498 | ||
499 | pciedev = to_pcie_device(dev); | |
500 | driver = to_service_driver(dev->driver); | |
501 | if (driver && driver->remove) { | |
fa6c9937 RW |
502 | driver->remove(pciedev); |
503 | put_device(dev); | |
504 | } | |
505 | return 0; | |
1da177e4 LT |
506 | } |
507 | ||
d9347371 RW |
508 | /** |
509 | * pcie_port_shutdown_service - shut down given PCI Express port service | |
510 | * @dev: PCI Express port service device to handle | |
511 | * | |
512 | * If PCI Express port service driver is registered with | |
513 | * pcie_port_service_register(), this function will be called by the driver core | |
514 | * when device_shutdown() is called for the port service device associated | |
515 | * with the driver. | |
516 | */ | |
fa6c9937 RW |
517 | static void pcie_port_shutdown_service(struct device *dev) {} |
518 | ||
d9347371 RW |
519 | /** |
520 | * pcie_port_service_register - register PCI Express port service driver | |
521 | * @new: PCI Express port service driver to register | |
522 | */ | |
1da177e4 LT |
523 | int pcie_port_service_register(struct pcie_port_service_driver *new) |
524 | { | |
79dd9182 RW |
525 | if (pcie_ports_disabled) |
526 | return -ENODEV; | |
527 | ||
6f825b73 | 528 | new->driver.name = new->name; |
1da177e4 LT |
529 | new->driver.bus = &pcie_port_bus_type; |
530 | new->driver.probe = pcie_port_probe_service; | |
531 | new->driver.remove = pcie_port_remove_service; | |
532 | new->driver.shutdown = pcie_port_shutdown_service; | |
1da177e4 LT |
533 | |
534 | return driver_register(&new->driver); | |
d0e2b4a0 | 535 | } |
40da4186 | 536 | EXPORT_SYMBOL(pcie_port_service_register); |
1da177e4 | 537 | |
d9347371 RW |
538 | /** |
539 | * pcie_port_service_unregister - unregister PCI Express port service driver | |
540 | * @drv: PCI Express port service driver to unregister | |
541 | */ | |
fa6c9937 | 542 | void pcie_port_service_unregister(struct pcie_port_service_driver *drv) |
1da177e4 | 543 | { |
fa6c9937 | 544 | driver_unregister(&drv->driver); |
1da177e4 | 545 | } |
1da177e4 | 546 | EXPORT_SYMBOL(pcie_port_service_unregister); |