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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
df62ab5e | 3 | * Procfs interface for the PCI bus |
1da177e4 | 4 | * |
df62ab5e | 5 | * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz> |
1da177e4 LT |
6 | */ |
7 | ||
8 | #include <linux/init.h> | |
9 | #include <linux/pci.h> | |
5a0e3ad6 | 10 | #include <linux/slab.h> |
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/proc_fs.h> | |
13 | #include <linux/seq_file.h> | |
aa0ac365 | 14 | #include <linux/capability.h> |
7c0f6ba6 | 15 | #include <linux/uaccess.h> |
eb627e17 | 16 | #include <linux/security.h> |
1da177e4 | 17 | #include <asm/byteorder.h> |
bc56b9e0 | 18 | #include "pci.h" |
1da177e4 LT |
19 | |
20 | static int proc_initialized; /* = 0 */ | |
21 | ||
3c78bc61 | 22 | static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence) |
1da177e4 | 23 | { |
54de90d6 AV |
24 | struct pci_dev *dev = PDE_DATA(file_inode(file)); |
25 | return fixed_size_llseek(file, off, whence, dev->cfg_size); | |
1da177e4 LT |
26 | } |
27 | ||
3c78bc61 RD |
28 | static ssize_t proc_bus_pci_read(struct file *file, char __user *buf, |
29 | size_t nbytes, loff_t *ppos) | |
1da177e4 | 30 | { |
d9dda78b | 31 | struct pci_dev *dev = PDE_DATA(file_inode(file)); |
1da177e4 LT |
32 | unsigned int pos = *ppos; |
33 | unsigned int cnt, size; | |
34 | ||
35 | /* | |
36 | * Normal users can read only the standardized portion of the | |
37 | * configuration space as several chips lock up when trying to read | |
38 | * undefined locations (think of Intel PIIX4 as a typical example). | |
39 | */ | |
40 | ||
41 | if (capable(CAP_SYS_ADMIN)) | |
d9dda78b | 42 | size = dev->cfg_size; |
1da177e4 LT |
43 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
44 | size = 128; | |
45 | else | |
46 | size = 64; | |
47 | ||
48 | if (pos >= size) | |
49 | return 0; | |
50 | if (nbytes >= size) | |
51 | nbytes = size; | |
52 | if (pos + nbytes > size) | |
53 | nbytes = size - pos; | |
54 | cnt = nbytes; | |
55 | ||
96d4f267 | 56 | if (!access_ok(buf, cnt)) |
1da177e4 LT |
57 | return -EINVAL; |
58 | ||
b3c32c4f HY |
59 | pci_config_pm_runtime_get(dev); |
60 | ||
1da177e4 LT |
61 | if ((pos & 1) && cnt) { |
62 | unsigned char val; | |
e04b0ea2 | 63 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
64 | __put_user(val, buf); |
65 | buf++; | |
66 | pos++; | |
67 | cnt--; | |
68 | } | |
69 | ||
70 | if ((pos & 3) && cnt > 2) { | |
71 | unsigned short val; | |
e04b0ea2 | 72 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 73 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
74 | buf += 2; |
75 | pos += 2; | |
76 | cnt -= 2; | |
77 | } | |
78 | ||
79 | while (cnt >= 4) { | |
80 | unsigned int val; | |
e04b0ea2 | 81 | pci_user_read_config_dword(dev, pos, &val); |
f17a077e | 82 | __put_user(cpu_to_le32(val), (__le32 __user *) buf); |
1da177e4 LT |
83 | buf += 4; |
84 | pos += 4; | |
85 | cnt -= 4; | |
86 | } | |
87 | ||
88 | if (cnt >= 2) { | |
89 | unsigned short val; | |
e04b0ea2 | 90 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 91 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
92 | buf += 2; |
93 | pos += 2; | |
94 | cnt -= 2; | |
95 | } | |
96 | ||
97 | if (cnt) { | |
98 | unsigned char val; | |
e04b0ea2 | 99 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
100 | __put_user(val, buf); |
101 | buf++; | |
102 | pos++; | |
103 | cnt--; | |
104 | } | |
105 | ||
b3c32c4f HY |
106 | pci_config_pm_runtime_put(dev); |
107 | ||
1da177e4 LT |
108 | *ppos = pos; |
109 | return nbytes; | |
110 | } | |
111 | ||
3c78bc61 RD |
112 | static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf, |
113 | size_t nbytes, loff_t *ppos) | |
1da177e4 | 114 | { |
496ad9aa | 115 | struct inode *ino = file_inode(file); |
d9dda78b | 116 | struct pci_dev *dev = PDE_DATA(ino); |
1da177e4 | 117 | int pos = *ppos; |
d9dda78b | 118 | int size = dev->cfg_size; |
eb627e17 MG |
119 | int cnt, ret; |
120 | ||
121 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
122 | if (ret) | |
123 | return ret; | |
1da177e4 LT |
124 | |
125 | if (pos >= size) | |
126 | return 0; | |
127 | if (nbytes >= size) | |
128 | nbytes = size; | |
129 | if (pos + nbytes > size) | |
130 | nbytes = size - pos; | |
131 | cnt = nbytes; | |
132 | ||
96d4f267 | 133 | if (!access_ok(buf, cnt)) |
1da177e4 LT |
134 | return -EINVAL; |
135 | ||
b3c32c4f HY |
136 | pci_config_pm_runtime_get(dev); |
137 | ||
1da177e4 LT |
138 | if ((pos & 1) && cnt) { |
139 | unsigned char val; | |
140 | __get_user(val, buf); | |
e04b0ea2 | 141 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
142 | buf++; |
143 | pos++; | |
144 | cnt--; | |
145 | } | |
146 | ||
147 | if ((pos & 3) && cnt > 2) { | |
f17a077e HH |
148 | __le16 val; |
149 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 150 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
151 | buf += 2; |
152 | pos += 2; | |
153 | cnt -= 2; | |
154 | } | |
155 | ||
156 | while (cnt >= 4) { | |
f17a077e HH |
157 | __le32 val; |
158 | __get_user(val, (__le32 __user *) buf); | |
e04b0ea2 | 159 | pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); |
1da177e4 LT |
160 | buf += 4; |
161 | pos += 4; | |
162 | cnt -= 4; | |
163 | } | |
164 | ||
165 | if (cnt >= 2) { | |
f17a077e HH |
166 | __le16 val; |
167 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 168 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
169 | buf += 2; |
170 | pos += 2; | |
171 | cnt -= 2; | |
172 | } | |
173 | ||
174 | if (cnt) { | |
175 | unsigned char val; | |
176 | __get_user(val, buf); | |
e04b0ea2 | 177 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
178 | buf++; |
179 | pos++; | |
180 | cnt--; | |
181 | } | |
182 | ||
b3c32c4f HY |
183 | pci_config_pm_runtime_put(dev); |
184 | ||
1da177e4 | 185 | *ppos = pos; |
d9dda78b | 186 | i_size_write(ino, dev->cfg_size); |
1da177e4 LT |
187 | return nbytes; |
188 | } | |
189 | ||
190 | struct pci_filp_private { | |
191 | enum pci_mmap_state mmap_state; | |
192 | int write_combine; | |
193 | }; | |
194 | ||
add77184 MS |
195 | static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, |
196 | unsigned long arg) | |
1da177e4 | 197 | { |
d9dda78b | 198 | struct pci_dev *dev = PDE_DATA(file_inode(file)); |
1da177e4 LT |
199 | #ifdef HAVE_PCI_MMAP |
200 | struct pci_filp_private *fpriv = file->private_data; | |
201 | #endif /* HAVE_PCI_MMAP */ | |
202 | int ret = 0; | |
203 | ||
eb627e17 MG |
204 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); |
205 | if (ret) | |
206 | return ret; | |
207 | ||
1da177e4 LT |
208 | switch (cmd) { |
209 | case PCIIOC_CONTROLLER: | |
210 | ret = pci_domain_nr(dev->bus); | |
211 | break; | |
212 | ||
213 | #ifdef HAVE_PCI_MMAP | |
214 | case PCIIOC_MMAP_IS_IO: | |
e854d8b2 DW |
215 | if (!arch_can_pci_mmap_io()) |
216 | return -EINVAL; | |
1da177e4 LT |
217 | fpriv->mmap_state = pci_mmap_io; |
218 | break; | |
219 | ||
220 | case PCIIOC_MMAP_IS_MEM: | |
221 | fpriv->mmap_state = pci_mmap_mem; | |
222 | break; | |
223 | ||
224 | case PCIIOC_WRITE_COMBINE: | |
ae749c7a DW |
225 | if (arch_can_pci_mmap_wc()) { |
226 | if (arg) | |
227 | fpriv->write_combine = 1; | |
228 | else | |
229 | fpriv->write_combine = 0; | |
230 | break; | |
231 | } | |
232 | /* If arch decided it can't, fall through... */ | |
1da177e4 | 233 | #endif /* HAVE_PCI_MMAP */ |
df561f66 | 234 | fallthrough; |
1da177e4 LT |
235 | default: |
236 | ret = -EINVAL; | |
237 | break; | |
f7625980 | 238 | } |
1da177e4 LT |
239 | |
240 | return ret; | |
241 | } | |
242 | ||
243 | #ifdef HAVE_PCI_MMAP | |
244 | static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) | |
245 | { | |
d9dda78b | 246 | struct pci_dev *dev = PDE_DATA(file_inode(file)); |
1da177e4 | 247 | struct pci_filp_private *fpriv = file->private_data; |
e854d8b2 | 248 | int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM; |
1da177e4 | 249 | |
eb627e17 MG |
250 | if (!capable(CAP_SYS_RAWIO) || |
251 | security_locked_down(LOCKDOWN_PCI_ACCESS)) | |
1da177e4 LT |
252 | return -EPERM; |
253 | ||
e854d8b2 DW |
254 | if (fpriv->mmap_state == pci_mmap_io) { |
255 | if (!arch_can_pci_mmap_io()) | |
256 | return -EINVAL; | |
17caf567 | 257 | res_bit = IORESOURCE_IO; |
e854d8b2 | 258 | } |
17caf567 | 259 | |
9eff02e2 | 260 | /* Make sure the caller is mapping a real resource for this device */ |
c9c13ba4 | 261 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
17caf567 DW |
262 | if (dev->resource[i].flags & res_bit && |
263 | pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) | |
9eff02e2 JB |
264 | break; |
265 | } | |
266 | ||
c9c13ba4 | 267 | if (i >= PCI_STD_NUM_BARS) |
9eff02e2 JB |
268 | return -ENODEV; |
269 | ||
cef4d023 DW |
270 | if (fpriv->mmap_state == pci_mmap_mem && |
271 | fpriv->write_combine) { | |
272 | if (dev->resource[i].flags & IORESOURCE_PREFETCH) | |
273 | write_combine = 1; | |
274 | else | |
275 | return -EINVAL; | |
276 | } | |
f66e2258 | 277 | ret = pci_mmap_page_range(dev, i, vma, |
3a92c319 | 278 | fpriv->mmap_state, write_combine); |
1da177e4 LT |
279 | if (ret < 0) |
280 | return ret; | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | static int proc_bus_pci_open(struct inode *inode, struct file *file) | |
286 | { | |
287 | struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL); | |
288 | ||
289 | if (!fpriv) | |
290 | return -ENOMEM; | |
291 | ||
292 | fpriv->mmap_state = pci_mmap_io; | |
293 | fpriv->write_combine = 0; | |
294 | ||
295 | file->private_data = fpriv; | |
296 | ||
297 | return 0; | |
298 | } | |
299 | ||
300 | static int proc_bus_pci_release(struct inode *inode, struct file *file) | |
301 | { | |
302 | kfree(file->private_data); | |
303 | file->private_data = NULL; | |
304 | ||
305 | return 0; | |
306 | } | |
307 | #endif /* HAVE_PCI_MMAP */ | |
308 | ||
97a32539 AD |
309 | static const struct proc_ops proc_bus_pci_ops = { |
310 | .proc_lseek = proc_bus_pci_lseek, | |
311 | .proc_read = proc_bus_pci_read, | |
312 | .proc_write = proc_bus_pci_write, | |
313 | .proc_ioctl = proc_bus_pci_ioctl, | |
314 | #ifdef CONFIG_COMPAT | |
315 | .proc_compat_ioctl = proc_bus_pci_ioctl, | |
316 | #endif | |
1da177e4 | 317 | #ifdef HAVE_PCI_MMAP |
97a32539 AD |
318 | .proc_open = proc_bus_pci_open, |
319 | .proc_release = proc_bus_pci_release, | |
320 | .proc_mmap = proc_bus_pci_mmap, | |
1da177e4 | 321 | #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA |
97a32539 | 322 | .proc_get_unmapped_area = get_pci_unmapped_area, |
1da177e4 LT |
323 | #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */ |
324 | #endif /* HAVE_PCI_MMAP */ | |
325 | }; | |
326 | ||
1da177e4 LT |
327 | /* iterator */ |
328 | static void *pci_seq_start(struct seq_file *m, loff_t *pos) | |
329 | { | |
330 | struct pci_dev *dev = NULL; | |
331 | loff_t n = *pos; | |
332 | ||
333 | for_each_pci_dev(dev) { | |
334 | if (!n--) | |
335 | break; | |
336 | } | |
337 | return dev; | |
338 | } | |
339 | ||
340 | static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) | |
341 | { | |
342 | struct pci_dev *dev = v; | |
343 | ||
344 | (*pos)++; | |
345 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | |
346 | return dev; | |
347 | } | |
348 | ||
349 | static void pci_seq_stop(struct seq_file *m, void *v) | |
350 | { | |
351 | if (v) { | |
352 | struct pci_dev *dev = v; | |
353 | pci_dev_put(dev); | |
354 | } | |
355 | } | |
356 | ||
357 | static int show_device(struct seq_file *m, void *v) | |
358 | { | |
359 | const struct pci_dev *dev = v; | |
360 | const struct pci_driver *drv; | |
361 | int i; | |
362 | ||
363 | if (dev == NULL) | |
364 | return 0; | |
365 | ||
366 | drv = pci_dev_driver(dev); | |
367 | seq_printf(m, "%02x%02x\t%04x%04x\t%x", | |
368 | dev->bus->number, | |
369 | dev->devfn, | |
370 | dev->vendor, | |
371 | dev->device, | |
372 | dev->irq); | |
fde09c6d YZ |
373 | |
374 | /* only print standard and ROM resources to preserve compatibility */ | |
375 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
e31dd6e4 | 376 | resource_size_t start, end; |
2311b1f2 | 377 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 GKH |
378 | seq_printf(m, "\t%16llx", |
379 | (unsigned long long)(start | | |
380 | (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); | |
2311b1f2 | 381 | } |
fde09c6d | 382 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { |
e31dd6e4 | 383 | resource_size_t start, end; |
2311b1f2 | 384 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 | 385 | seq_printf(m, "\t%16llx", |
1da177e4 | 386 | dev->resource[i].start < dev->resource[i].end ? |
1396a8c3 | 387 | (unsigned long long)(end - start) + 1 : 0); |
2311b1f2 | 388 | } |
1da177e4 LT |
389 | seq_putc(m, '\t'); |
390 | if (drv) | |
590a18e1 | 391 | seq_puts(m, drv->name); |
1da177e4 LT |
392 | seq_putc(m, '\n'); |
393 | return 0; | |
394 | } | |
395 | ||
02d90fc3 | 396 | static const struct seq_operations proc_bus_pci_devices_op = { |
1da177e4 LT |
397 | .start = pci_seq_start, |
398 | .next = pci_seq_next, | |
399 | .stop = pci_seq_stop, | |
400 | .show = show_device | |
401 | }; | |
402 | ||
403 | static struct proc_dir_entry *proc_bus_pci_dir; | |
404 | ||
405 | int pci_proc_attach_device(struct pci_dev *dev) | |
406 | { | |
407 | struct pci_bus *bus = dev->bus; | |
408 | struct proc_dir_entry *e; | |
409 | char name[16]; | |
410 | ||
411 | if (!proc_initialized) | |
412 | return -EACCES; | |
413 | ||
414 | if (!bus->procdir) { | |
415 | if (pci_proc_domain(bus)) { | |
416 | sprintf(name, "%04x:%02x", pci_domain_nr(bus), | |
417 | bus->number); | |
418 | } else { | |
419 | sprintf(name, "%02x", bus->number); | |
420 | } | |
421 | bus->procdir = proc_mkdir(name, proc_bus_pci_dir); | |
422 | if (!bus->procdir) | |
423 | return -ENOMEM; | |
424 | } | |
425 | ||
426 | sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); | |
c7705f34 | 427 | e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir, |
97a32539 | 428 | &proc_bus_pci_ops, dev); |
1da177e4 LT |
429 | if (!e) |
430 | return -ENOMEM; | |
271a15ea | 431 | proc_set_size(e, dev->cfg_size); |
1da177e4 LT |
432 | dev->procent = e; |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | int pci_proc_detach_device(struct pci_dev *dev) | |
438 | { | |
a8ca16ea DH |
439 | proc_remove(dev->procent); |
440 | dev->procent = NULL; | |
1da177e4 LT |
441 | return 0; |
442 | } | |
443 | ||
3c78bc61 | 444 | int pci_proc_detach_bus(struct pci_bus *bus) |
1da177e4 | 445 | { |
a8ca16ea | 446 | proc_remove(bus->procdir); |
1da177e4 LT |
447 | return 0; |
448 | } | |
449 | ||
1da177e4 LT |
450 | static int __init pci_proc_init(void) |
451 | { | |
1da177e4 | 452 | struct pci_dev *dev = NULL; |
9c37066d | 453 | proc_bus_pci_dir = proc_mkdir("bus/pci", NULL); |
fddda2b7 CH |
454 | proc_create_seq("devices", 0, proc_bus_pci_dir, |
455 | &proc_bus_pci_devices_op); | |
1da177e4 | 456 | proc_initialized = 1; |
4e344b1c | 457 | for_each_pci_dev(dev) |
1da177e4 | 458 | pci_proc_attach_device(dev); |
4e344b1c | 459 | |
1da177e4 LT |
460 | return 0; |
461 | } | |
eaf61142 | 462 | device_initcall(pci_proc_init); |