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CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/rom.c
3 *
4 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
5 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
6 *
7 * PCI ROM access routines
8 */
1da177e4 9#include <linux/kernel.h>
363c75db 10#include <linux/export.h>
1da177e4 11#include <linux/pci.h>
4e57b681 12#include <linux/slab.h>
1da177e4
LT
13
14#include "pci.h"
15
16/**
17 * pci_enable_rom - enable ROM decoding for a PCI device
67be2dd1 18 * @pdev: PCI device to enable
1da177e4
LT
19 *
20 * Enable ROM decoding on @dev. This involves simply turning on the last
21 * bit of the PCI ROM BAR. Note that some cards may share address decoders
22 * between the ROM and other resources, so enabling it may disable access
23 * to MMIO registers or other card memory.
24 */
e416de5e 25int pci_enable_rom(struct pci_dev *pdev)
1da177e4 26{
4708f9a5 27 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
8085ce08 28 struct pci_bus_region region;
1da177e4
LT
29 u32 rom_addr;
30
8085ce08
BH
31 if (!res->flags)
32 return -1;
33
4708f9a5
BH
34 /* Nothing to enable if we're using a shadow copy in RAM */
35 if (res->flags & IORESOURCE_ROM_SHADOW)
36 return 0;
37
0b457dde
BH
38 /*
39 * Ideally pci_update_resource() would update the ROM BAR address,
40 * and we would only set the enable bit here. But apparently some
41 * devices have buggy ROM BARs that read as zero when disabled.
42 */
fc279850 43 pcibios_resource_to_bus(pdev->bus, &region, res);
1da177e4 44 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
8085ce08
BH
45 rom_addr &= ~PCI_ROM_ADDRESS_MASK;
46 rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
1da177e4 47 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
8085ce08 48 return 0;
1da177e4 49}
b7fe9434 50EXPORT_SYMBOL_GPL(pci_enable_rom);
1da177e4
LT
51
52/**
53 * pci_disable_rom - disable ROM decoding for a PCI device
67be2dd1 54 * @pdev: PCI device to disable
1da177e4
LT
55 *
56 * Disable ROM decoding on a PCI device by turning off the last bit in the
57 * ROM BAR.
58 */
e416de5e 59void pci_disable_rom(struct pci_dev *pdev)
1da177e4 60{
4708f9a5 61 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
1da177e4 62 u32 rom_addr;
4708f9a5
BH
63
64 if (res->flags & IORESOURCE_ROM_SHADOW)
65 return;
66
1da177e4
LT
67 pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
68 rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
69 pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
70}
b7fe9434 71EXPORT_SYMBOL_GPL(pci_disable_rom);
1da177e4 72
d7ad2254
JK
73/**
74 * pci_get_rom_size - obtain the actual size of the ROM image
4cc59c72 75 * @pdev: target PCI device
d7ad2254
JK
76 * @rom: kernel virtual pointer to image of ROM
77 * @size: size of PCI window
78 * return: size of actual ROM image
79 *
80 * Determine the actual length of the ROM image.
81 * The PCI window size could be much larger than the
82 * actual image size.
83 */
97c44836 84size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
d7ad2254
JK
85{
86 void __iomem *image;
87 int last_image;
16b036af 88 unsigned length;
d7ad2254
JK
89
90 image = rom;
91 do {
92 void __iomem *pds;
93 /* Standard PCI ROMs start out with these bytes 55 AA */
4066df63
VD
94 if (readw(image) != 0xAA55) {
95 dev_err(&pdev->dev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n",
96 readw(image));
d7ad2254 97 break;
97c44836 98 }
4066df63 99 /* get the PCI data structure and check its "PCIR" signature */
d7ad2254 100 pds = image + readw(image + 24);
4066df63
VD
101 if (readl(pds) != 0x52494350) {
102 dev_err(&pdev->dev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n",
103 readl(pds));
d7ad2254 104 break;
4066df63 105 }
d7ad2254 106 last_image = readb(pds + 21) & 0x80;
16b036af
MD
107 length = readw(pds + 16);
108 image += length * 512;
47b975d2
EC
109 /* Avoid iterating through memory outside the resource window */
110 if (image > rom + size)
111 break;
16b036af 112 } while (length && !last_image);
d7ad2254
JK
113
114 /* never return a size larger than the PCI resource window */
115 /* there are known ROMs that get the size wrong */
116 return min((size_t)(image - rom), size);
117}
118
1da177e4
LT
119/**
120 * pci_map_rom - map a PCI ROM to kernel space
67be2dd1 121 * @pdev: pointer to pci device struct
1da177e4 122 * @size: pointer to receive size of pci window over ROM
f5dafca5
RD
123 *
124 * Return: kernel virtual pointer to image of ROM
1da177e4
LT
125 *
126 * Map a PCI ROM into kernel space. If ROM is boot video ROM,
127 * the shadow BIOS copy will be returned instead of the
128 * actual ROM.
129 */
130void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
131{
132 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
fffe01f7 133 loff_t start;
1da177e4 134 void __iomem *rom;
1da177e4 135
f50dd8c3
BH
136 /* assign the ROM an address if it doesn't have one */
137 if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE))
138 return NULL;
139
140 start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
141 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
142 if (*size == 0)
143 return NULL;
144
145 /* Enable ROM space decodes */
146 if (pci_enable_rom(pdev))
147 return NULL;
547b5246 148
1da177e4 149 rom = ioremap(start, *size);
a48a687d
CD
150 if (!rom)
151 goto err_ioremap;
1da177e4
LT
152
153 /*
154 * Try to find the true size of the ROM since sometimes the PCI window
155 * size is much larger than the actual size of the ROM.
156 * True size is important if the ROM is going to be copied.
157 */
97c44836 158 *size = pci_get_rom_size(pdev, rom, *size);
a405f191
CD
159 if (!*size)
160 goto invalid_rom;
161
1da177e4 162 return rom;
a48a687d 163
a405f191
CD
164invalid_rom:
165 iounmap(rom);
a48a687d
CD
166err_ioremap:
167 /* restore enable if ioremap fails */
168 if (!(res->flags & IORESOURCE_ROM_ENABLE))
169 pci_disable_rom(pdev);
170 return NULL;
1da177e4 171}
b7fe9434 172EXPORT_SYMBOL(pci_map_rom);
1da177e4 173
1da177e4
LT
174/**
175 * pci_unmap_rom - unmap the ROM from kernel space
67be2dd1 176 * @pdev: pointer to pci device struct
1da177e4
LT
177 * @rom: virtual address of the previous mapping
178 *
179 * Remove a mapping of a previously mapped ROM
180 */
181void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
182{
183 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
184
fffe01f7 185 iounmap(rom);
1da177e4 186
4708f9a5
BH
187 /* Disable again before continuing */
188 if (!(res->flags & IORESOURCE_ROM_ENABLE))
1da177e4
LT
189 pci_disable_rom(pdev);
190}
b7fe9434 191EXPORT_SYMBOL(pci_unmap_rom);
1da177e4 192
fffe01f7
MG
193/**
194 * pci_platform_rom - provides a pointer to any ROM image provided by the
195 * platform
196 * @pdev: pointer to pci device struct
197 * @size: pointer to receive size of pci window over ROM
198 */
199void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
200{
201 if (pdev->rom && pdev->romlen) {
202 *size = pdev->romlen;
203 return phys_to_virt((phys_addr_t)pdev->rom);
204 }
205
206 return NULL;
207}
fffe01f7 208EXPORT_SYMBOL(pci_platform_rom);