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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/pci/rom.c | |
3 | * | |
4 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
5 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
6 | * | |
7 | * PCI ROM access routines | |
8 | */ | |
1da177e4 | 9 | #include <linux/kernel.h> |
363c75db | 10 | #include <linux/export.h> |
1da177e4 | 11 | #include <linux/pci.h> |
4e57b681 | 12 | #include <linux/slab.h> |
1da177e4 LT |
13 | |
14 | #include "pci.h" | |
15 | ||
16 | /** | |
17 | * pci_enable_rom - enable ROM decoding for a PCI device | |
67be2dd1 | 18 | * @pdev: PCI device to enable |
1da177e4 LT |
19 | * |
20 | * Enable ROM decoding on @dev. This involves simply turning on the last | |
21 | * bit of the PCI ROM BAR. Note that some cards may share address decoders | |
22 | * between the ROM and other resources, so enabling it may disable access | |
23 | * to MMIO registers or other card memory. | |
24 | */ | |
e416de5e | 25 | int pci_enable_rom(struct pci_dev *pdev) |
1da177e4 | 26 | { |
8085ce08 BH |
27 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; |
28 | struct pci_bus_region region; | |
1da177e4 LT |
29 | u32 rom_addr; |
30 | ||
8085ce08 BH |
31 | if (!res->flags) |
32 | return -1; | |
33 | ||
34 | pcibios_resource_to_bus(pdev, ®ion, res); | |
1da177e4 | 35 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
8085ce08 BH |
36 | rom_addr &= ~PCI_ROM_ADDRESS_MASK; |
37 | rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 | 38 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); |
8085ce08 | 39 | return 0; |
1da177e4 LT |
40 | } |
41 | ||
42 | /** | |
43 | * pci_disable_rom - disable ROM decoding for a PCI device | |
67be2dd1 | 44 | * @pdev: PCI device to disable |
1da177e4 LT |
45 | * |
46 | * Disable ROM decoding on a PCI device by turning off the last bit in the | |
47 | * ROM BAR. | |
48 | */ | |
e416de5e | 49 | void pci_disable_rom(struct pci_dev *pdev) |
1da177e4 LT |
50 | { |
51 | u32 rom_addr; | |
52 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); | |
53 | rom_addr &= ~PCI_ROM_ADDRESS_ENABLE; | |
54 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); | |
55 | } | |
56 | ||
d7ad2254 JK |
57 | /** |
58 | * pci_get_rom_size - obtain the actual size of the ROM image | |
4cc59c72 | 59 | * @pdev: target PCI device |
d7ad2254 JK |
60 | * @rom: kernel virtual pointer to image of ROM |
61 | * @size: size of PCI window | |
62 | * return: size of actual ROM image | |
63 | * | |
64 | * Determine the actual length of the ROM image. | |
65 | * The PCI window size could be much larger than the | |
66 | * actual image size. | |
67 | */ | |
97c44836 | 68 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) |
d7ad2254 JK |
69 | { |
70 | void __iomem *image; | |
71 | int last_image; | |
72 | ||
73 | image = rom; | |
74 | do { | |
75 | void __iomem *pds; | |
76 | /* Standard PCI ROMs start out with these bytes 55 AA */ | |
97c44836 TN |
77 | if (readb(image) != 0x55) { |
78 | dev_err(&pdev->dev, "Invalid ROM contents\n"); | |
d7ad2254 | 79 | break; |
97c44836 | 80 | } |
d7ad2254 JK |
81 | if (readb(image + 1) != 0xAA) |
82 | break; | |
83 | /* get the PCI data structure and check its signature */ | |
84 | pds = image + readw(image + 24); | |
85 | if (readb(pds) != 'P') | |
86 | break; | |
87 | if (readb(pds + 1) != 'C') | |
88 | break; | |
89 | if (readb(pds + 2) != 'I') | |
90 | break; | |
91 | if (readb(pds + 3) != 'R') | |
92 | break; | |
93 | last_image = readb(pds + 21) & 0x80; | |
94 | /* this length is reliable */ | |
95 | image += readw(pds + 16) * 512; | |
96 | } while (!last_image); | |
97 | ||
98 | /* never return a size larger than the PCI resource window */ | |
99 | /* there are known ROMs that get the size wrong */ | |
100 | return min((size_t)(image - rom), size); | |
101 | } | |
102 | ||
1da177e4 LT |
103 | /** |
104 | * pci_map_rom - map a PCI ROM to kernel space | |
67be2dd1 | 105 | * @pdev: pointer to pci device struct |
1da177e4 | 106 | * @size: pointer to receive size of pci window over ROM |
f5dafca5 RD |
107 | * |
108 | * Return: kernel virtual pointer to image of ROM | |
1da177e4 LT |
109 | * |
110 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
111 | * the shadow BIOS copy will be returned instead of the | |
112 | * actual ROM. | |
113 | */ | |
114 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) | |
115 | { | |
116 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
117 | loff_t start; | |
118 | void __iomem *rom; | |
1da177e4 | 119 | |
84c1b80e MG |
120 | /* |
121 | * Some devices may provide ROMs via a source other than the BAR | |
122 | */ | |
123 | if (pdev->rom && pdev->romlen) { | |
124 | *size = pdev->romlen; | |
dbd3fc33 | 125 | return phys_to_virt(pdev->rom); |
b5e4efe7 | 126 | /* |
6b5c76b8 EO |
127 | * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy |
128 | * memory map if the VGA enable bit of the Bridge Control register is | |
129 | * set for embedded VGA. | |
b5e4efe7 | 130 | */ |
84c1b80e | 131 | } else if (res->flags & IORESOURCE_ROM_SHADOW) { |
1da177e4 LT |
132 | /* primary video rom always starts here */ |
133 | start = (loff_t)0xC0000; | |
134 | *size = 0x20000; /* cover C000:0 through E000:0 */ | |
135 | } else { | |
a2302c68 JK |
136 | if (res->flags & |
137 | (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) { | |
1da177e4 | 138 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); |
e31dd6e4 GKH |
139 | return (void __iomem *)(unsigned long) |
140 | pci_resource_start(pdev, PCI_ROM_RESOURCE); | |
1da177e4 LT |
141 | } else { |
142 | /* assign the ROM an address if it doesn't have one */ | |
8085ce08 BH |
143 | if (res->parent == NULL && |
144 | pci_assign_resource(pdev,PCI_ROM_RESOURCE)) | |
145 | return NULL; | |
1da177e4 LT |
146 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); |
147 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
148 | if (*size == 0) | |
149 | return NULL; | |
150 | ||
151 | /* Enable ROM space decodes */ | |
8085ce08 BH |
152 | if (pci_enable_rom(pdev)) |
153 | return NULL; | |
1da177e4 LT |
154 | } |
155 | } | |
156 | ||
157 | rom = ioremap(start, *size); | |
158 | if (!rom) { | |
159 | /* restore enable if ioremap fails */ | |
160 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | | |
161 | IORESOURCE_ROM_SHADOW | | |
162 | IORESOURCE_ROM_COPY))) | |
163 | pci_disable_rom(pdev); | |
164 | return NULL; | |
165 | } | |
166 | ||
167 | /* | |
168 | * Try to find the true size of the ROM since sometimes the PCI window | |
169 | * size is much larger than the actual size of the ROM. | |
170 | * True size is important if the ROM is going to be copied. | |
171 | */ | |
97c44836 | 172 | *size = pci_get_rom_size(pdev, rom, *size); |
1da177e4 LT |
173 | return rom; |
174 | } | |
175 | ||
1da177e4 LT |
176 | /** |
177 | * pci_unmap_rom - unmap the ROM from kernel space | |
67be2dd1 | 178 | * @pdev: pointer to pci device struct |
1da177e4 LT |
179 | * @rom: virtual address of the previous mapping |
180 | * | |
181 | * Remove a mapping of a previously mapped ROM | |
182 | */ | |
183 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom) | |
184 | { | |
185 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
186 | ||
a2302c68 | 187 | if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) |
1da177e4 LT |
188 | return; |
189 | ||
84c1b80e MG |
190 | if (!pdev->rom || !pdev->romlen) |
191 | iounmap(rom); | |
1da177e4 LT |
192 | |
193 | /* Disable again before continuing, leave enabled if pci=rom */ | |
194 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) | |
195 | pci_disable_rom(pdev); | |
196 | } | |
197 | ||
1da177e4 | 198 | /** |
0643245f | 199 | * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy |
67be2dd1 | 200 | * @pdev: pointer to pci device struct |
1da177e4 LT |
201 | * |
202 | * Free the copied ROM if we allocated one. | |
203 | */ | |
204 | void pci_cleanup_rom(struct pci_dev *pdev) | |
205 | { | |
206 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
207 | if (res->flags & IORESOURCE_ROM_COPY) { | |
e31dd6e4 | 208 | kfree((void*)(unsigned long)res->start); |
1da177e4 LT |
209 | res->flags &= ~IORESOURCE_ROM_COPY; |
210 | res->start = 0; | |
211 | res->end = 0; | |
212 | } | |
213 | } | |
214 | ||
215 | EXPORT_SYMBOL(pci_map_rom); | |
1da177e4 | 216 | EXPORT_SYMBOL(pci_unmap_rom); |
e416de5e AC |
217 | EXPORT_SYMBOL_GPL(pci_enable_rom); |
218 | EXPORT_SYMBOL_GPL(pci_disable_rom); |