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PCI/switchtec: Fix vep_vector_number ioread width
[mirror_ubuntu-bionic-kernel.git] / drivers / pci / switch / switchtec.c
CommitLineData
080b47de
LG		 1/*
2 * Microsemi Switchtec(tm) PCIe Management Driver
3 * Copyright (c) 2017, Microsemi Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 */
15
5a1c269f 16#include <linux/switchtec.h>
52eabba5
LG		 17#include <linux/switchtec_ioctl.h>
18
080b47de
LG		 19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
23#include <linux/poll.h>
080b47de 24#include <linux/wait.h>
eaaa7c20 25#include <linux/io-64-nonatomic-lo-hi.h>
b8d9c3ca
GS		 26#include <linux/nospec.h>
27
080b47de
LG		 28MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
29MODULE_VERSION("0.1");
30MODULE_LICENSE("GPL");
31MODULE_AUTHOR("Microsemi Corporation");
32
33static int max_devices = 16;
34module_param(max_devices, int, 0644);
35MODULE_PARM_DESC(max_devices, "max number of switchtec device instances");
36
37static dev_t switchtec_devt;
080b47de
LG		 38static DEFINE_IDA(switchtec_minor_ida);
39
302e994d
LG		 40struct class *switchtec_class;
41EXPORT_SYMBOL_GPL(switchtec_class);
080b47de
LG		 42
43enum mrpc_state {
44 MRPC_IDLE = 0,
45 MRPC_QUEUED,
46 MRPC_RUNNING,
47 MRPC_DONE,
48};
49
50struct switchtec_user {
51 struct switchtec_dev *stdev;
52
53 enum mrpc_state state;
54
55 struct completion comp;
56 struct kref kref;
57 struct list_head list;
58
59 u32 cmd;
60 u32 status;
61 u32 return_code;
62 size_t data_len;
63 size_t read_len;
64 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE];
65 int event_cnt;
66};
67
68static struct switchtec_user *stuser_create(struct switchtec_dev *stdev)
69{
70 struct switchtec_user *stuser;
71
72 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL);
73 if (!stuser)
74 return ERR_PTR(-ENOMEM);
75
76 get_device(&stdev->dev);
77 stuser->stdev = stdev;
78 kref_init(&stuser->kref);
79 INIT_LIST_HEAD(&stuser->list);
80 init_completion(&stuser->comp);
81 stuser->event_cnt = atomic_read(&stdev->event_cnt);
82
83 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
84
85 return stuser;
86}
87
88static void stuser_free(struct kref *kref)
89{
90 struct switchtec_user *stuser;
91
92 stuser = container_of(kref, struct switchtec_user, kref);
93
94 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser);
95
96 put_device(&stuser->stdev->dev);
97 kfree(stuser);
98}
99
100static void stuser_put(struct switchtec_user *stuser)
101{
102 kref_put(&stuser->kref, stuser_free);
103}
104
105static void stuser_set_state(struct switchtec_user *stuser,
106 enum mrpc_state state)
107{
108 /* requires the mrpc_mutex to already be held when called */
109
110 const char * const state_names[] = {
111 [MRPC_IDLE] = "IDLE",
112 [MRPC_QUEUED] = "QUEUED",
113 [MRPC_RUNNING] = "RUNNING",
114 [MRPC_DONE] = "DONE",
115 };
116
117 stuser->state = state;
118
119 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s",
120 stuser, state_names[state]);
121}
122
123static void mrpc_complete_cmd(struct switchtec_dev *stdev);
124
125static void mrpc_cmd_submit(struct switchtec_dev *stdev)
126{
127 /* requires the mrpc_mutex to already be held when called */
128
129 struct switchtec_user *stuser;
130
131 if (stdev->mrpc_busy)
132 return;
133
134 if (list_empty(&stdev->mrpc_queue))
135 return;
136
137 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
138 list);
139
140 stuser_set_state(stuser, MRPC_RUNNING);
141 stdev->mrpc_busy = 1;
142 memcpy_toio(&stdev->mmio_mrpc->input_data,
143 stuser->data, stuser->data_len);
144 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd);
145
080b47de
LG		 146 schedule_delayed_work(&stdev->mrpc_timeout,
147 msecs_to_jiffies(500));
148}
149
150static int mrpc_queue_cmd(struct switchtec_user *stuser)
151{
152 /* requires the mrpc_mutex to already be held when called */
153
154 struct switchtec_dev *stdev = stuser->stdev;
155
156 kref_get(&stuser->kref);
157 stuser->read_len = sizeof(stuser->data);
158 stuser_set_state(stuser, MRPC_QUEUED);
159 init_completion(&stuser->comp);
160 list_add_tail(&stuser->list, &stdev->mrpc_queue);
161
162 mrpc_cmd_submit(stdev);
163
164 return 0;
165}
166
167static void mrpc_complete_cmd(struct switchtec_dev *stdev)
168{
169 /* requires the mrpc_mutex to already be held when called */
170 struct switchtec_user *stuser;
171
172 if (list_empty(&stdev->mrpc_queue))
173 return;
174
175 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user,
176 list);
177
178 stuser->status = ioread32(&stdev->mmio_mrpc->status);
179 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS)
180 return;
181
182 stuser_set_state(stuser, MRPC_DONE);
183 stuser->return_code = 0;
184
185 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE)
186 goto out;
187
188 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value);
189 if (stuser->return_code != 0)
190 goto out;
191
192 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data,
193 stuser->read_len);
194
195out:
196 complete_all(&stuser->comp);
197 list_del_init(&stuser->list);
198 stuser_put(stuser);
199 stdev->mrpc_busy = 0;
200
201 mrpc_cmd_submit(stdev);
202}
203
204static void mrpc_event_work(struct work_struct *work)
205{
206 struct switchtec_dev *stdev;
207
208 stdev = container_of(work, struct switchtec_dev, mrpc_work);
209
210 dev_dbg(&stdev->dev, "%s\n", __func__);
211
212 mutex_lock(&stdev->mrpc_mutex);
213 cancel_delayed_work(&stdev->mrpc_timeout);
214 mrpc_complete_cmd(stdev);
215 mutex_unlock(&stdev->mrpc_mutex);
216}
217
218static void mrpc_timeout_work(struct work_struct *work)
219{
220 struct switchtec_dev *stdev;
221 u32 status;
222
223 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work);
224
225 dev_dbg(&stdev->dev, "%s\n", __func__);
226
227 mutex_lock(&stdev->mrpc_mutex);
228
229 status = ioread32(&stdev->mmio_mrpc->status);
230 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) {
231 schedule_delayed_work(&stdev->mrpc_timeout,
232 msecs_to_jiffies(500));
233 goto out;
234 }
235
236 mrpc_complete_cmd(stdev);
237
238out:
239 mutex_unlock(&stdev->mrpc_mutex);
240}
241
5d8e1881
LG		 242static ssize_t device_version_show(struct device *dev,
243 struct device_attribute *attr, char *buf)
244{
245 struct switchtec_dev *stdev = to_stdev(dev);
246 u32 ver;
247
248 ver = ioread32(&stdev->mmio_sys_info->device_version);
249
250 return sprintf(buf, "%x\n", ver);
251}
252static DEVICE_ATTR_RO(device_version);
253
254static ssize_t fw_version_show(struct device *dev,
255 struct device_attribute *attr, char *buf)
256{
257 struct switchtec_dev *stdev = to_stdev(dev);
258 u32 ver;
259
260 ver = ioread32(&stdev->mmio_sys_info->firmware_version);
261
262 return sprintf(buf, "%08x\n", ver);
263}
264static DEVICE_ATTR_RO(fw_version);
265
266static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len)
267{
268 int i;
269
270 memcpy_fromio(buf, attr, len);
271 buf[len] = '\n';
272 buf[len + 1] = 0;
273
274 for (i = len - 1; i > 0; i--) {
275 if (buf[i] != ' ')
276 break;
277 buf[i] = '\n';
278 buf[i + 1] = 0;
279 }
280
281 return strlen(buf);
282}
283
284#define DEVICE_ATTR_SYS_INFO_STR(field) \
285static ssize_t field ## _show(struct device *dev, \
286 struct device_attribute *attr, char *buf) \
287{ \
288 struct switchtec_dev *stdev = to_stdev(dev); \
289 return io_string_show(buf, &stdev->mmio_sys_info->field, \
290 sizeof(stdev->mmio_sys_info->field)); \
291} \
292\
293static DEVICE_ATTR_RO(field)
294
295DEVICE_ATTR_SYS_INFO_STR(vendor_id);
296DEVICE_ATTR_SYS_INFO_STR(product_id);
297DEVICE_ATTR_SYS_INFO_STR(product_revision);
298DEVICE_ATTR_SYS_INFO_STR(component_vendor);
299
300static ssize_t component_id_show(struct device *dev,
301 struct device_attribute *attr, char *buf)
302{
303 struct switchtec_dev *stdev = to_stdev(dev);
304 int id = ioread16(&stdev->mmio_sys_info->component_id);
305
306 return sprintf(buf, "PM%04X\n", id);
307}
308static DEVICE_ATTR_RO(component_id);
309
310static ssize_t component_revision_show(struct device *dev,
311 struct device_attribute *attr, char *buf)
312{
313 struct switchtec_dev *stdev = to_stdev(dev);
314 int rev = ioread8(&stdev->mmio_sys_info->component_revision);
315
316 return sprintf(buf, "%d\n", rev);
317}
318static DEVICE_ATTR_RO(component_revision);
319
320static ssize_t partition_show(struct device *dev,
321 struct device_attribute *attr, char *buf)
322{
323 struct switchtec_dev *stdev = to_stdev(dev);
324
325 return sprintf(buf, "%d\n", stdev->partition);
326}
327static DEVICE_ATTR_RO(partition);
328
329static ssize_t partition_count_show(struct device *dev,
330 struct device_attribute *attr, char *buf)
331{
332 struct switchtec_dev *stdev = to_stdev(dev);
333
334 return sprintf(buf, "%d\n", stdev->partition_count);
335}
336static DEVICE_ATTR_RO(partition_count);
337
338static struct attribute *switchtec_device_attrs[] = {
339 &dev_attr_device_version.attr,
340 &dev_attr_fw_version.attr,
341 &dev_attr_vendor_id.attr,
342 &dev_attr_product_id.attr,
343 &dev_attr_product_revision.attr,
344 &dev_attr_component_vendor.attr,
345 &dev_attr_component_id.attr,
346 &dev_attr_component_revision.attr,
347 &dev_attr_partition.attr,
348 &dev_attr_partition_count.attr,
349 NULL,
350};
351
352ATTRIBUTE_GROUPS(switchtec_device);
353
080b47de
LG		 354static int switchtec_dev_open(struct inode *inode, struct file *filp)
355{
356 struct switchtec_dev *stdev;
357 struct switchtec_user *stuser;
358
359 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev);
360
361 stuser = stuser_create(stdev);
362 if (IS_ERR(stuser))
363 return PTR_ERR(stuser);
364
365 filp->private_data = stuser;
366 nonseekable_open(inode, filp);
367
368 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser);
369
370 return 0;
371}
372
373static int switchtec_dev_release(struct inode *inode, struct file *filp)
374{
375 struct switchtec_user *stuser = filp->private_data;
376
377 stuser_put(stuser);
378
379 return 0;
380}
381
382static int lock_mutex_and_test_alive(struct switchtec_dev *stdev)
383{
384 if (mutex_lock_interruptible(&stdev->mrpc_mutex))
385 return -EINTR;
386
387 if (!stdev->alive) {
388 mutex_unlock(&stdev->mrpc_mutex);
389 return -ENODEV;
390 }
391
392 return 0;
393}
394
395static ssize_t switchtec_dev_write(struct file *filp, const char __user *data,
396 size_t size, loff_t *off)
397{
398 struct switchtec_user *stuser = filp->private_data;
399 struct switchtec_dev *stdev = stuser->stdev;
400 int rc;
401
402 if (size < sizeof(stuser->cmd) ||
403 size > sizeof(stuser->cmd) + sizeof(stuser->data))
404 return -EINVAL;
405
406 stuser->data_len = size - sizeof(stuser->cmd);
407
408 rc = lock_mutex_and_test_alive(stdev);
409 if (rc)
410 return rc;
411
412 if (stuser->state != MRPC_IDLE) {
413 rc = -EBADE;
414 goto out;
415 }
416
417 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd));
418 if (rc) {
419 rc = -EFAULT;
420 goto out;
421 }
422
423 data += sizeof(stuser->cmd);
424 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd));
425 if (rc) {
426 rc = -EFAULT;
427 goto out;
428 }
429
430 rc = mrpc_queue_cmd(stuser);
431
432out:
433 mutex_unlock(&stdev->mrpc_mutex);
434
435 if (rc)
436 return rc;
437
438 return size;
439}
440
441static ssize_t switchtec_dev_read(struct file *filp, char __user *data,
442 size_t size, loff_t *off)
443{
444 struct switchtec_user *stuser = filp->private_data;
445 struct switchtec_dev *stdev = stuser->stdev;
446 int rc;
447
448 if (size < sizeof(stuser->cmd) ||
449 size > sizeof(stuser->cmd) + sizeof(stuser->data))
450 return -EINVAL;
451
452 rc = lock_mutex_and_test_alive(stdev);
453 if (rc)
454 return rc;
455
456 if (stuser->state == MRPC_IDLE) {
457 mutex_unlock(&stdev->mrpc_mutex);
458 return -EBADE;
459 }
460
461 stuser->read_len = size - sizeof(stuser->return_code);
462
463 mutex_unlock(&stdev->mrpc_mutex);
464
465 if (filp->f_flags & O_NONBLOCK) {
466 if (!try_wait_for_completion(&stuser->comp))
467 return -EAGAIN;
468 } else {
469 rc = wait_for_completion_interruptible(&stuser->comp);
470 if (rc < 0)
471 return rc;
472 }
473
474 rc = lock_mutex_and_test_alive(stdev);
475 if (rc)
476 return rc;
477
478 if (stuser->state != MRPC_DONE) {
479 mutex_unlock(&stdev->mrpc_mutex);
480 return -EBADE;
481 }
482
483 rc = copy_to_user(data, &stuser->return_code,
484 sizeof(stuser->return_code));
485 if (rc) {
486 rc = -EFAULT;
487 goto out;
488 }
489
490 data += sizeof(stuser->return_code);
491 rc = copy_to_user(data, &stuser->data,
492 size - sizeof(stuser->return_code));
493 if (rc) {
494 rc = -EFAULT;
495 goto out;
496 }
497
498 stuser_set_state(stuser, MRPC_IDLE);
499
500out:
501 mutex_unlock(&stdev->mrpc_mutex);
502
503 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE)
504 return size;
505 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED)
506 return -ENXIO;
507 else
508 return -EBADMSG;
509}
510
511static unsigned int switchtec_dev_poll(struct file *filp, poll_table *wait)
512{
513 struct switchtec_user *stuser = filp->private_data;
514 struct switchtec_dev *stdev = stuser->stdev;
515 int ret = 0;
516
517 poll_wait(filp, &stuser->comp.wait, wait);
518 poll_wait(filp, &stdev->event_wq, wait);
519
520 if (lock_mutex_and_test_alive(stdev))
521 return POLLIN | POLLRDHUP | POLLOUT | POLLERR | POLLHUP;
522
523 mutex_unlock(&stdev->mrpc_mutex);
524
525 if (try_wait_for_completion(&stuser->comp))
526 ret |= POLLIN | POLLRDNORM;
527
528 if (stuser->event_cnt != atomic_read(&stdev->event_cnt))
529 ret |= POLLPRI | POLLRDBAND;
530
531 return ret;
532}
533
52eabba5
LG		 534static int ioctl_flash_info(struct switchtec_dev *stdev,
535 struct switchtec_ioctl_flash_info __user *uinfo)
536{
537 struct switchtec_ioctl_flash_info info = {0};
538 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
539
540 info.flash_length = ioread32(&fi->flash_length);
541 info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS;
542
543 if (copy_to_user(uinfo, &info, sizeof(info)))
544 return -EFAULT;
545
546 return 0;
547}
548
549static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info,
550 struct partition_info __iomem *pi)
551{
552 info->address = ioread32(&pi->address);
553 info->length = ioread32(&pi->length);
554}
555
556static int ioctl_flash_part_info(struct switchtec_dev *stdev,
557 struct switchtec_ioctl_flash_part_info __user *uinfo)
558{
559 struct switchtec_ioctl_flash_part_info info = {0};
560 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info;
079e3bc5 561 struct sys_info_regs __iomem *si = stdev->mmio_sys_info;
52eabba5
LG		 562 u32 active_addr = -1;
563
564 if (copy_from_user(&info, uinfo, sizeof(info)))
565 return -EFAULT;
566
567 switch (info.flash_partition) {
568 case SWITCHTEC_IOCTL_PART_CFG0:
569 active_addr = ioread32(&fi->active_cfg);
570 set_fw_info_part(&info, &fi->cfg0);
079e3bc5
LG		 571 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG0_RUNNING)
572 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 573 break;
574 case SWITCHTEC_IOCTL_PART_CFG1:
575 active_addr = ioread32(&fi->active_cfg);
576 set_fw_info_part(&info, &fi->cfg1);
079e3bc5
LG		 577 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG1_RUNNING)
578 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 579 break;
580 case SWITCHTEC_IOCTL_PART_IMG0:
581 active_addr = ioread32(&fi->active_img);
582 set_fw_info_part(&info, &fi->img0);
079e3bc5
LG		 583 if (ioread16(&si->img_running) == SWITCHTEC_IMG0_RUNNING)
584 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 585 break;
586 case SWITCHTEC_IOCTL_PART_IMG1:
587 active_addr = ioread32(&fi->active_img);
588 set_fw_info_part(&info, &fi->img1);
079e3bc5
LG		 589 if (ioread16(&si->img_running) == SWITCHTEC_IMG1_RUNNING)
590 info.active |= SWITCHTEC_IOCTL_PART_RUNNING;
52eabba5
LG		 591 break;
592 case SWITCHTEC_IOCTL_PART_NVLOG:
593 set_fw_info_part(&info, &fi->nvlog);
594 break;
595 case SWITCHTEC_IOCTL_PART_VENDOR0:
596 set_fw_info_part(&info, &fi->vendor[0]);
597 break;
598 case SWITCHTEC_IOCTL_PART_VENDOR1:
599 set_fw_info_part(&info, &fi->vendor[1]);
600 break;
601 case SWITCHTEC_IOCTL_PART_VENDOR2:
602 set_fw_info_part(&info, &fi->vendor[2]);
603 break;
604 case SWITCHTEC_IOCTL_PART_VENDOR3:
605 set_fw_info_part(&info, &fi->vendor[3]);
606 break;
607 case SWITCHTEC_IOCTL_PART_VENDOR4:
608 set_fw_info_part(&info, &fi->vendor[4]);
609 break;
610 case SWITCHTEC_IOCTL_PART_VENDOR5:
611 set_fw_info_part(&info, &fi->vendor[5]);
612 break;
613 case SWITCHTEC_IOCTL_PART_VENDOR6:
614 set_fw_info_part(&info, &fi->vendor[6]);
615 break;
616 case SWITCHTEC_IOCTL_PART_VENDOR7:
617 set_fw_info_part(&info, &fi->vendor[7]);
618 break;
619 default:
620 return -EINVAL;
621 }
622
623 if (info.address == active_addr)
079e3bc5 624 info.active |= SWITCHTEC_IOCTL_PART_ACTIVE;
52eabba5
LG		 625
626 if (copy_to_user(uinfo, &info, sizeof(info)))
627 return -EFAULT;
628
629 return 0;
630}
631
632static int ioctl_event_summary(struct switchtec_dev *stdev,
633 struct switchtec_user *stuser,
634 struct switchtec_ioctl_event_summary __user *usum)
635{
636 struct switchtec_ioctl_event_summary s = {0};
637 int i;
638 u32 reg;
639
640 s.global = ioread32(&stdev->mmio_sw_event->global_summary);
eaaa7c20 641 s.part_bitmap = readq(&stdev->mmio_sw_event->part_event_bitmap);
52eabba5
LG		 642 s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary);
643
644 for (i = 0; i < stdev->partition_count; i++) {
645 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary);
646 s.part[i] = reg;
647 }
648
649 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
650 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
651 if (reg != MICROSEMI_VENDOR_ID)
652 break;
653
654 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary);
655 s.pff[i] = reg;
656 }
657
658 if (copy_to_user(usum, &s, sizeof(s)))
659 return -EFAULT;
660
661 stuser->event_cnt = atomic_read(&stdev->event_cnt);
662
663 return 0;
664}
665
666static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev,
667 size_t offset, int index)
668{
669 return (void __iomem *)stdev->mmio_sw_event + offset;
670}
671
672static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev,
673 size_t offset, int index)
674{
675 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset;
676}
677
678static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev,
679 size_t offset, int index)
680{
681 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset;
682}
683
684#define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg}
685#define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg}
686#define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg}
687
f05f7355 688static const struct event_reg {
52eabba5
LG		 689 size_t offset;
690 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev,
691 size_t offset, int index);
692} event_regs[] = {
693 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr),
694 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr),
695 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr),
696 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr),
697 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr),
698 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr),
699 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr),
700 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr),
701 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr),
702 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC,
703 twi_mrpc_comp_async_hdr),
704 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr),
705 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC,
706 cli_mrpc_comp_async_hdr),
707 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr),
708 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr),
709 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr),
710 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
711 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr),
712 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr),
713 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr),
714 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr),
715 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr),
716 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr),
717 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr),
718 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr),
719 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr),
720 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr),
721 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr),
722 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr),
723 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr),
724};
725
726static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev,
727 int event_id, int index)
728{
729 size_t off;
730
731 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
732 return ERR_PTR(-EINVAL);
733
734 off = event_regs[event_id].offset;
735
736 if (event_regs[event_id].map_reg == part_ev_reg) {
737 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
738 index = stdev->partition;
739 else if (index < 0 || index >= stdev->partition_count)
740 return ERR_PTR(-EINVAL);
741 } else if (event_regs[event_id].map_reg == pff_ev_reg) {
742 if (index < 0 || index >= stdev->pff_csr_count)
743 return ERR_PTR(-EINVAL);
744 }
745
746 return event_regs[event_id].map_reg(stdev, off, index);
747}
748
749static int event_ctl(struct switchtec_dev *stdev,
750 struct switchtec_ioctl_event_ctl *ctl)
751{
752 int i;
753 u32 __iomem *reg;
754 u32 hdr;
755
756 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index);
757 if (IS_ERR(reg))
758 return PTR_ERR(reg);
759
760 hdr = ioread32(reg);
761 for (i = 0; i < ARRAY_SIZE(ctl->data); i++)
762 ctl->data[i] = ioread32(&reg[i + 1]);
763
764 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED;
765 ctl->count = (hdr >> 5) & 0xFF;
766
767 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR))
768 hdr &= ~SWITCHTEC_EVENT_CLEAR;
769 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL)
770 hdr |= SWITCHTEC_EVENT_EN_IRQ;
771 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL)
772 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
773 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG)
774 hdr |= SWITCHTEC_EVENT_EN_LOG;
775 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG)
776 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
777 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI)
778 hdr |= SWITCHTEC_EVENT_EN_CLI;
779 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI)
780 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
781 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL)
782 hdr |= SWITCHTEC_EVENT_FATAL;
783 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL)
784 hdr &= ~SWITCHTEC_EVENT_FATAL;
785
786 if (ctl->flags)
787 iowrite32(hdr, reg);
788
789 ctl->flags = 0;
790 if (hdr & SWITCHTEC_EVENT_EN_IRQ)
791 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL;
792 if (hdr & SWITCHTEC_EVENT_EN_LOG)
793 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG;
794 if (hdr & SWITCHTEC_EVENT_EN_CLI)
795 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI;
796 if (hdr & SWITCHTEC_EVENT_FATAL)
797 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL;
798
799 return 0;
800}
801
802static int ioctl_event_ctl(struct switchtec_dev *stdev,
803 struct switchtec_ioctl_event_ctl __user *uctl)
804{
805 int ret;
806 int nr_idxs;
e4ae9e24 807 unsigned int event_flags;
52eabba5
LG		 808 struct switchtec_ioctl_event_ctl ctl;
809
810 if (copy_from_user(&ctl, uctl, sizeof(ctl)))
811 return -EFAULT;
812
813 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS)
814 return -EINVAL;
815
816 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED)
817 return -EINVAL;
818
819 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) {
820 if (event_regs[ctl.event_id].map_reg == global_ev_reg)
821 nr_idxs = 1;
822 else if (event_regs[ctl.event_id].map_reg == part_ev_reg)
823 nr_idxs = stdev->partition_count;
824 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg)
825 nr_idxs = stdev->pff_csr_count;
826 else
827 return -EINVAL;
828
e4ae9e24 829 event_flags = ctl.flags;
52eabba5 830 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) {
e4ae9e24 831 ctl.flags = event_flags;
52eabba5
LG		 832 ret = event_ctl(stdev, &ctl);
833 if (ret < 0)
834 return ret;
835 }
836 } else {
837 ret = event_ctl(stdev, &ctl);
838 if (ret < 0)
839 return ret;
840 }
841
842 if (copy_to_user(uctl, &ctl, sizeof(ctl)))
843 return -EFAULT;
844
845 return 0;
846}
847
848static int ioctl_pff_to_port(struct switchtec_dev *stdev,
849 struct switchtec_ioctl_pff_port *up)
850{
851 int i, part;
852 u32 reg;
853 struct part_cfg_regs *pcfg;
854 struct switchtec_ioctl_pff_port p;
855
856 if (copy_from_user(&p, up, sizeof(p)))
857 return -EFAULT;
858
859 p.port = -1;
860 for (part = 0; part < stdev->partition_count; part++) {
861 pcfg = &stdev->mmio_part_cfg_all[part];
862 p.partition = part;
863
864 reg = ioread32(&pcfg->usp_pff_inst_id);
865 if (reg == p.pff) {
866 p.port = 0;
867 break;
868 }
869
870 reg = ioread32(&pcfg->vep_pff_inst_id);
871 if (reg == p.pff) {
872 p.port = SWITCHTEC_IOCTL_PFF_VEP;
873 break;
874 }
875
876 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
877 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
878 if (reg != p.pff)
879 continue;
880
881 p.port = i + 1;
882 break;
883 }
884
885 if (p.port != -1)
886 break;
887 }
888
889 if (copy_to_user(up, &p, sizeof(p)))
890 return -EFAULT;
891
892 return 0;
893}
894
895static int ioctl_port_to_pff(struct switchtec_dev *stdev,
896 struct switchtec_ioctl_pff_port *up)
897{
898 struct switchtec_ioctl_pff_port p;
899 struct part_cfg_regs *pcfg;
900
901 if (copy_from_user(&p, up, sizeof(p)))
902 return -EFAULT;
903
904 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX)
905 pcfg = stdev->mmio_part_cfg;
906 else if (p.partition < stdev->partition_count)
907 pcfg = &stdev->mmio_part_cfg_all[p.partition];
908 else
909 return -EINVAL;
910
911 switch (p.port) {
912 case 0:
913 p.pff = ioread32(&pcfg->usp_pff_inst_id);
914 break;
915 case SWITCHTEC_IOCTL_PFF_VEP:
916 p.pff = ioread32(&pcfg->vep_pff_inst_id);
917 break;
918 default:
919 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
920 return -EINVAL;
b8d9c3ca
GS		 921 p.port = array_index_nospec(p.port,
922 ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
52eabba5
LG		 923 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
924 break;
925 }
926
927 if (copy_to_user(up, &p, sizeof(p)))
928 return -EFAULT;
929
930 return 0;
931}
932
933static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd,
934 unsigned long arg)
935{
936 struct switchtec_user *stuser = filp->private_data;
937 struct switchtec_dev *stdev = stuser->stdev;
938 int rc;
939 void __user *argp = (void __user *)arg;
940
941 rc = lock_mutex_and_test_alive(stdev);
942 if (rc)
943 return rc;
944
945 switch (cmd) {
946 case SWITCHTEC_IOCTL_FLASH_INFO:
947 rc = ioctl_flash_info(stdev, argp);
948 break;
949 case SWITCHTEC_IOCTL_FLASH_PART_INFO:
950 rc = ioctl_flash_part_info(stdev, argp);
951 break;
952 case SWITCHTEC_IOCTL_EVENT_SUMMARY:
953 rc = ioctl_event_summary(stdev, stuser, argp);
954 break;
955 case SWITCHTEC_IOCTL_EVENT_CTL:
956 rc = ioctl_event_ctl(stdev, argp);
957 break;
958 case SWITCHTEC_IOCTL_PFF_TO_PORT:
959 rc = ioctl_pff_to_port(stdev, argp);
960 break;
961 case SWITCHTEC_IOCTL_PORT_TO_PFF:
962 rc = ioctl_port_to_pff(stdev, argp);
963 break;
964 default:
965 rc = -ENOTTY;
966 break;
967 }
968
969 mutex_unlock(&stdev->mrpc_mutex);
970 return rc;
971}
972
080b47de
LG		 973static const struct file_operations switchtec_fops = {
974 .owner = THIS_MODULE,
975 .open = switchtec_dev_open,
976 .release = switchtec_dev_release,
977 .write = switchtec_dev_write,
978 .read = switchtec_dev_read,
979 .poll = switchtec_dev_poll,
52eabba5
LG		 980 .unlocked_ioctl = switchtec_dev_ioctl,
981 .compat_ioctl = switchtec_dev_ioctl,
080b47de
LG		 982};
983
48c302dc
LG		 984static void link_event_work(struct work_struct *work)
985{
986 struct switchtec_dev *stdev;
987
988 stdev = container_of(work, struct switchtec_dev, link_event_work);
989
990 if (stdev->link_notifier)
991 stdev->link_notifier(stdev);
992}
993
994static void check_link_state_events(struct switchtec_dev *stdev)
995{
996 int idx;
997 u32 reg;
998 int count;
999 int occurred = 0;
1000
1001 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1002 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr);
1003 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg);
1004 count = (reg >> 5) & 0xFF;
1005
1006 if (count != stdev->link_event_count[idx]) {
1007 occurred = 1;
1008 stdev->link_event_count[idx] = count;
1009 }
1010 }
1011
1012 if (occurred)
1013 schedule_work(&stdev->link_event_work);
1014}
1015
1016static void enable_link_state_events(struct switchtec_dev *stdev)
1017{
1018 int idx;
1019
1020 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1021 iowrite32(SWITCHTEC_EVENT_CLEAR |
1022 SWITCHTEC_EVENT_EN_IRQ,
1023 &stdev->mmio_pff_csr[idx].link_state_hdr);
1024 }
1025}
1026
080b47de
LG		 1027static void stdev_release(struct device *dev)
1028{
1029 struct switchtec_dev *stdev = to_stdev(dev);
1030
1031 kfree(stdev);
1032}
1033
1034static void stdev_kill(struct switchtec_dev *stdev)
1035{
1036 struct switchtec_user *stuser, *tmpuser;
1037
1038 pci_clear_master(stdev->pdev);
1039
1040 cancel_delayed_work_sync(&stdev->mrpc_timeout);
1041
1042 /* Mark the hardware as unavailable and complete all completions */
1043 mutex_lock(&stdev->mrpc_mutex);
1044 stdev->alive = false;
1045
1046 /* Wake up and kill any users waiting on an MRPC request */
1047 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) {
1048 complete_all(&stuser->comp);
1049 list_del_init(&stuser->list);
1050 stuser_put(stuser);
1051 }
1052
1053 mutex_unlock(&stdev->mrpc_mutex);
1054
1055 /* Wake up any users waiting on event_wq */
1056 wake_up_interruptible(&stdev->event_wq);
1057}
1058
1059static struct switchtec_dev *stdev_create(struct pci_dev *pdev)
1060{
1061 struct switchtec_dev *stdev;
1062 int minor;
1063 struct device *dev;
1064 struct cdev *cdev;
1065 int rc;
1066
1067 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL,
1068 dev_to_node(&pdev->dev));
1069 if (!stdev)
1070 return ERR_PTR(-ENOMEM);
1071
1072 stdev->alive = true;
1073 stdev->pdev = pdev;
1074 INIT_LIST_HEAD(&stdev->mrpc_queue);
1075 mutex_init(&stdev->mrpc_mutex);
1076 stdev->mrpc_busy = 0;
1077 INIT_WORK(&stdev->mrpc_work, mrpc_event_work);
1078 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work);
48c302dc 1079 INIT_WORK(&stdev->link_event_work, link_event_work);
080b47de
LG		 1080 init_waitqueue_head(&stdev->event_wq);
1081 atomic_set(&stdev->event_cnt, 0);
1082
1083 dev = &stdev->dev;
1084 device_initialize(dev);
1085 dev->class = switchtec_class;
1086 dev->parent = &pdev->dev;
5d8e1881 1087 dev->groups = switchtec_device_groups;
080b47de
LG		 1088 dev->release = stdev_release;
1089
1090 minor = ida_simple_get(&switchtec_minor_ida, 0, 0,
1091 GFP_KERNEL);
1092 if (minor < 0) {
1093 rc = minor;
1094 goto err_put;
1095 }
1096
1097 dev->devt = MKDEV(MAJOR(switchtec_devt), minor);
1098 dev_set_name(dev, "switchtec%d", minor);
1099
1100 cdev = &stdev->cdev;
1101 cdev_init(cdev, &switchtec_fops);
1102 cdev->owner = THIS_MODULE;
080b47de
LG		 1103
1104 return stdev;
1105
1106err_put:
1107 put_device(&stdev->dev);
1108 return ERR_PTR(rc);
1109}
1110
52eabba5
LG		 1111static int mask_event(struct switchtec_dev *stdev, int eid, int idx)
1112{
1113 size_t off = event_regs[eid].offset;
1114 u32 __iomem *hdr_reg;
1115 u32 hdr;
1116
1117 hdr_reg = event_regs[eid].map_reg(stdev, off, idx);
1118 hdr = ioread32(hdr_reg);
1119
1120 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ))
1121 return 0;
1122
12467dcc
WS		 1123 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE ||
1124 eid == SWITCHTEC_IOCTL_EVENT_MRPC_COMP)
48c302dc
LG		 1125 return 0;
1126
52eabba5
LG		 1127 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr);
1128 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED);
1129 iowrite32(hdr, hdr_reg);
1130
1131 return 1;
1132}
1133
1134static int mask_all_events(struct switchtec_dev *stdev, int eid)
1135{
1136 int idx;
1137 int count = 0;
1138
1139 if (event_regs[eid].map_reg == part_ev_reg) {
1140 for (idx = 0; idx < stdev->partition_count; idx++)
1141 count += mask_event(stdev, eid, idx);
1142 } else if (event_regs[eid].map_reg == pff_ev_reg) {
1143 for (idx = 0; idx < stdev->pff_csr_count; idx++) {
1144 if (!stdev->pff_local[idx])
1145 continue;
48c302dc 1146
52eabba5
LG		 1147 count += mask_event(stdev, eid, idx);
1148 }
1149 } else {
1150 count += mask_event(stdev, eid, 0);
1151 }
1152
1153 return count;
1154}
1155
080b47de
LG		 1156static irqreturn_t switchtec_event_isr(int irq, void *dev)
1157{
1158 struct switchtec_dev *stdev = dev;
1159 u32 reg;
1160 irqreturn_t ret = IRQ_NONE;
52eabba5 1161 int eid, event_count = 0;
080b47de
LG		 1162
1163 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr);
1164 if (reg & SWITCHTEC_EVENT_OCCURRED) {
1165 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__);
1166 ret = IRQ_HANDLED;
1167 schedule_work(&stdev->mrpc_work);
1168 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr);
1169 }
1170
48c302dc
LG		 1171 check_link_state_events(stdev);
1172
52eabba5
LG		 1173 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++)
1174 event_count += mask_all_events(stdev, eid);
1175
1176 if (event_count) {
1177 atomic_inc(&stdev->event_cnt);
1178 wake_up_interruptible(&stdev->event_wq);
1179 dev_dbg(&stdev->dev, "%s: %d events\n", __func__,
1180 event_count);
1181 return IRQ_HANDLED;
1182 }
1183
080b47de
LG		 1184 return ret;
1185}
1186
1187static int switchtec_init_isr(struct switchtec_dev *stdev)
1188{
1189 int nvecs;
1190 int event_irq;
1191
1192 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, 4,
1193 PCI_IRQ_MSIX | PCI_IRQ_MSI);
1194 if (nvecs < 0)
1195 return nvecs;
1196
2c824eab 1197 event_irq = ioread16(&stdev->mmio_part_cfg->vep_vector_number);
080b47de
LG		 1198 if (event_irq < 0 || event_irq >= nvecs)
1199 return -EFAULT;
1200
1201 event_irq = pci_irq_vector(stdev->pdev, event_irq);
1202 if (event_irq < 0)
1203 return event_irq;
1204
1205 return devm_request_irq(&stdev->pdev->dev, event_irq,
1206 switchtec_event_isr, 0,
1207 KBUILD_MODNAME, stdev);
1208}
1209
1210static void init_pff(struct switchtec_dev *stdev)
1211{
1212 int i;
1213 u32 reg;
1214 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg;
1215
1216 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
1217 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id);
1218 if (reg != MICROSEMI_VENDOR_ID)
1219 break;
1220 }
1221
1222 stdev->pff_csr_count = i;
1223
1224 reg = ioread32(&pcfg->usp_pff_inst_id);
1225 if (reg < SWITCHTEC_MAX_PFF_CSR)
1226 stdev->pff_local[reg] = 1;
1227
1228 reg = ioread32(&pcfg->vep_pff_inst_id);
1229 if (reg < SWITCHTEC_MAX_PFF_CSR)
1230 stdev->pff_local[reg] = 1;
1231
1232 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
1233 reg = ioread32(&pcfg->dsp_pff_inst_id[i]);
1234 if (reg < SWITCHTEC_MAX_PFF_CSR)
1235 stdev->pff_local[reg] = 1;
1236 }
1237}
1238
1239static int switchtec_init_pci(struct switchtec_dev *stdev,
1240 struct pci_dev *pdev)
1241{
1242 int rc;
1243
1244 rc = pcim_enable_device(pdev);
1245 if (rc)
1246 return rc;
1247
1248 rc = pcim_iomap_regions(pdev, 0x1, KBUILD_MODNAME);
1249 if (rc)
1250 return rc;
1251
1252 pci_set_master(pdev);
1253
1254 stdev->mmio = pcim_iomap_table(pdev)[0];
1255 stdev->mmio_mrpc = stdev->mmio + SWITCHTEC_GAS_MRPC_OFFSET;
1256 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET;
1257 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET;
1258 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET;
1259 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET;
9871e9bb 1260 stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id);
080b47de
LG		 1261 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count);
1262 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET;
1263 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition];
1264 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET;
1265
9871e9bb
LG		 1266 if (stdev->partition_count < 1)
1267 stdev->partition_count = 1;
1268
080b47de
LG		 1269 init_pff(stdev);
1270
1271 pci_set_drvdata(pdev, stdev);
1272
1273 return 0;
1274}
1275
1276static int switchtec_pci_probe(struct pci_dev *pdev,
1277 const struct pci_device_id *id)
1278{
1279 struct switchtec_dev *stdev;
1280 int rc;
1281
33dea5aa
LG		 1282 if (pdev->class == MICROSEMI_NTB_CLASSCODE)
1283 request_module_nowait("ntb_hw_switchtec");
1284
080b47de
LG		 1285 stdev = stdev_create(pdev);
1286 if (IS_ERR(stdev))
1287 return PTR_ERR(stdev);
1288
1289 rc = switchtec_init_pci(stdev, pdev);
1290 if (rc)
1291 goto err_put;
1292
1293 rc = switchtec_init_isr(stdev);
1294 if (rc) {
1295 dev_err(&stdev->dev, "failed to init isr.\n");
1296 goto err_put;
1297 }
1298
1299 iowrite32(SWITCHTEC_EVENT_CLEAR |
1300 SWITCHTEC_EVENT_EN_IRQ,
1301 &stdev->mmio_part_cfg->mrpc_comp_hdr);
48c302dc 1302 enable_link_state_events(stdev);
080b47de 1303
e40cf640 1304 rc = cdev_device_add(&stdev->cdev, &stdev->dev);
080b47de
LG		 1305 if (rc)
1306 goto err_devadd;
1307
1308 dev_info(&stdev->dev, "Management device registered.\n");
1309
1310 return 0;
1311
1312err_devadd:
080b47de
LG		 1313 stdev_kill(stdev);
1314err_put:
1315 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1316 put_device(&stdev->dev);
1317 return rc;
1318}
1319
1320static void switchtec_pci_remove(struct pci_dev *pdev)
1321{
1322 struct switchtec_dev *stdev = pci_get_drvdata(pdev);
1323
1324 pci_set_drvdata(pdev, NULL);
1325
e40cf640 1326 cdev_device_del(&stdev->cdev, &stdev->dev);
080b47de
LG		 1327 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt));
1328 dev_info(&stdev->dev, "unregistered.\n");
1329
1330 stdev_kill(stdev);
1331 put_device(&stdev->dev);
1332}
1333
1334#define SWITCHTEC_PCI_DEVICE(device_id) \
1335 { \
1336 .vendor = MICROSEMI_VENDOR_ID, \
1337 .device = device_id, \
1338 .subvendor = PCI_ANY_ID, \
1339 .subdevice = PCI_ANY_ID, \
1340 .class = MICROSEMI_MGMT_CLASSCODE, \
1341 .class_mask = 0xFFFFFFFF, \
1342 }, \
1343 { \
1344 .vendor = MICROSEMI_VENDOR_ID, \
1345 .device = device_id, \
1346 .subvendor = PCI_ANY_ID, \
1347 .subdevice = PCI_ANY_ID, \
1348 .class = MICROSEMI_NTB_CLASSCODE, \
1349 .class_mask = 0xFFFFFFFF, \
1350 }
1351
1352static const struct pci_device_id switchtec_pci_tbl[] = {
1353 SWITCHTEC_PCI_DEVICE(0x8531), //PFX 24xG3
1354 SWITCHTEC_PCI_DEVICE(0x8532), //PFX 32xG3
1355 SWITCHTEC_PCI_DEVICE(0x8533), //PFX 48xG3
1356 SWITCHTEC_PCI_DEVICE(0x8534), //PFX 64xG3
1357 SWITCHTEC_PCI_DEVICE(0x8535), //PFX 80xG3
1358 SWITCHTEC_PCI_DEVICE(0x8536), //PFX 96xG3
1359 SWITCHTEC_PCI_DEVICE(0x8543), //PSX 48xG3
1360 SWITCHTEC_PCI_DEVICE(0x8544), //PSX 64xG3
1361 SWITCHTEC_PCI_DEVICE(0x8545), //PSX 80xG3
1362 SWITCHTEC_PCI_DEVICE(0x8546), //PSX 96xG3
393958d0
LG		 1363 SWITCHTEC_PCI_DEVICE(0x8551), //PAX 24XG3
1364 SWITCHTEC_PCI_DEVICE(0x8552), //PAX 32XG3
1365 SWITCHTEC_PCI_DEVICE(0x8553), //PAX 48XG3
1366 SWITCHTEC_PCI_DEVICE(0x8554), //PAX 64XG3
1367 SWITCHTEC_PCI_DEVICE(0x8555), //PAX 80XG3
1368 SWITCHTEC_PCI_DEVICE(0x8556), //PAX 96XG3
1369 SWITCHTEC_PCI_DEVICE(0x8561), //PFXL 24XG3
1370 SWITCHTEC_PCI_DEVICE(0x8562), //PFXL 32XG3
1371 SWITCHTEC_PCI_DEVICE(0x8563), //PFXL 48XG3
1372 SWITCHTEC_PCI_DEVICE(0x8564), //PFXL 64XG3
1373 SWITCHTEC_PCI_DEVICE(0x8565), //PFXL 80XG3
1374 SWITCHTEC_PCI_DEVICE(0x8566), //PFXL 96XG3
1375 SWITCHTEC_PCI_DEVICE(0x8571), //PFXI 24XG3
1376 SWITCHTEC_PCI_DEVICE(0x8572), //PFXI 32XG3
1377 SWITCHTEC_PCI_DEVICE(0x8573), //PFXI 48XG3
1378 SWITCHTEC_PCI_DEVICE(0x8574), //PFXI 64XG3
1379 SWITCHTEC_PCI_DEVICE(0x8575), //PFXI 80XG3
1380 SWITCHTEC_PCI_DEVICE(0x8576), //PFXI 96XG3
080b47de
LG		 1381 {0}
1382};
1383MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl);
1384
1385static struct pci_driver switchtec_pci_driver = {
1386 .name = KBUILD_MODNAME,
1387 .id_table = switchtec_pci_tbl,
1388 .probe = switchtec_pci_probe,
1389 .remove = switchtec_pci_remove,
1390};
1391
1392static int __init switchtec_init(void)
1393{
1394 int rc;
1395
1396 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices,
1397 "switchtec");
1398 if (rc)
1399 return rc;
1400
1401 switchtec_class = class_create(THIS_MODULE, "switchtec");
1402 if (IS_ERR(switchtec_class)) {
1403 rc = PTR_ERR(switchtec_class);
1404 goto err_create_class;
1405 }
1406
1407 rc = pci_register_driver(&switchtec_pci_driver);
1408 if (rc)
1409 goto err_pci_register;
1410
1411 pr_info(KBUILD_MODNAME ": loaded.\n");
1412
1413 return 0;
1414
1415err_pci_register:
1416 class_destroy(switchtec_class);
1417
1418err_create_class:
1419 unregister_chrdev_region(switchtec_devt, max_devices);
1420
1421 return rc;
1422}
1423module_init(switchtec_init);
1424
1425static void __exit switchtec_exit(void)
1426{
1427 pci_unregister_driver(&switchtec_pci_driver);
1428 class_destroy(switchtec_class);
1429 unregister_chrdev_region(switchtec_devt, max_devices);
1430 ida_destroy(&switchtec_minor_ida);
1431
1432 pr_info(KBUILD_MODNAME ": unloaded.\n");
1433}
1434module_exit(switchtec_exit);
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