[mirror_ubuntu-hirsute-kernel.git] / drivers / pcmcia / at91_cf.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/atmel-mc.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/regmap.h>

#include <pcmcia/ss.h>

/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 * Note: These are offsets from the physical base address.
 */
#define	CF_ATTR_PHYS	(0)
#define	CF_IO_PHYS	(1 << 23)
#define	CF_MEM_PHYS	(0x017ff800)

struct at91_cf_data {
	int	irq_pin;		/* I/O IRQ */
	int	det_pin;		/* Card detect */
	int	vcc_pin;		/* power switching */
	int	rst_pin;		/* card reset */
	u8	chipselect;		/* EBI Chip Select number */
	u8	flags;
#define AT91_CF_TRUE_IDE	0x01
#define AT91_IDE_SWAP_A0_A2	0x02
};

struct regmap *mc;

/*--------------------------------------------------------------------------*/

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;

	unsigned long		phys_baseaddr;
};

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !gpio_get_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket *cf = _cf;

	if (irq == gpio_to_irq(cf->board->det_pin)) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			dev_dbg(&cf->pdev->dev, "card %s\n",
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= gpio_is_valid(cf->board->irq_pin);	/* RDY/nIRQ */
		int vcc	= gpio_is_valid(cf->board->vcc_pin);

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || gpio_get_value(cf->board->irq_pin))
			*sp |= SS_READY;
		if (!vcc || gpio_get_value(cf->board->vcc_pin))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (gpio_is_valid(cf->board->vcc_pin)) {
		switch (s->Vcc) {
		case 0:
			gpio_set_value(cf->board->vcc_pin, 0);
			break;
		case 33:
			gpio_set_value(cf->board->vcc_pin, 1);
			break;
		default:
			return -EINVAL;
		}
	}

	/* toggle reset if needed */
	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);

	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
				s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 *
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
		csr = AT91_MC_SMC_DBW_8;
		dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
	} else {
		csr = AT91_MC_SMC_DBW_16;
		dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
	}
	regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect),
			   AT91_MC_SMC_DBW, csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
	if (map->flags & MAP_ATTRIB)
		map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
	else
		map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

static const struct of_device_id at91_cf_dt_ids[] = {
	{ .compatible = "atmel,at91rm9200-cf" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, at91_cf_dt_ids);

static int at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board;
	struct resource		*io;
	int			status;

	board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL);
	if (!board)
		return -ENOMEM;

	board->irq_pin = of_get_gpio(pdev->dev.of_node, 0);
	board->det_pin = of_get_gpio(pdev->dev.of_node, 1);
	board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2);
	board->rst_pin = of_get_gpio(pdev->dev.of_node, 3);

	mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc");
	if (IS_ERR(mc))
		return PTR_ERR(mc);

	if (!gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin))
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	cf->phys_baseaddr = io->start;
	platform_set_drvdata(pdev, cf);

	/* must be a GPIO; ergo must trigger on both edges */
	status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det");
	if (status < 0)
		return status;

	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin),
					at91_cf_irq, 0, "at91_cf detect", cf);
	if (status < 0)
		return status;

	device_init_wakeup(&pdev->dev, 1);

	status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst");
	if (status < 0)
		goto fail0a;

	if (gpio_is_valid(board->vcc_pin)) {
		status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc");
		if (status < 0)
			goto fail0a;
	}

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (gpio_is_valid(board->irq_pin)) {
		status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq");
		if (status < 0)
			goto fail0a;

		status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin),
					at91_cf_irq, IRQF_SHARED, "at91_cf", cf);
		if (status < 0)
			goto fail0a;
		cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
	} else
		cf->socket.pci_irq = nr_irqs + 1;

	/*
	 * pcmcia layer only remaps "real" memory not iospace
	 * io_offset is set to 0x10000 to avoid the check in static_find_io().
	 * */
	cf->socket.io_offset = 0x10000;
	status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
	if (status)
		goto fail0a;

	/* reserve chip-select regions */
	if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
		status = -ENXIO;
		goto fail0a;
	}

	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
		gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail0a;

	return 0;

fail0a:
	device_init_wakeup(&pdev->dev, 0);
	return status;
}

static int at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);

	pcmcia_unregister_socket(&cf->socket);
	device_init_wakeup(&pdev->dev, 0);

	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		enable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			enable_irq_wake(gpio_to_irq(board->irq_pin));
	}
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		disable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			disable_irq_wake(gpio_to_irq(board->irq_pin));
	}

	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= "at91_cf",
		.of_match_table = at91_cf_dt_ids,
	},
	.probe		= at91_cf_probe,
	.remove		= at91_cf_remove,
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

module_platform_driver(at91_cf_driver);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_cf");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
2c1f3b7a AV	2	/*
	3	* at91_cf.c -- AT91 CompactFlash controller driver
	4	*
	5	* Copyright (C) 2005 David Brownell
2c1f3b7a AV	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/kernel.h>
2c1f3b7a AV	10	#include <linux/platform_device.h>
	11	#include <linux/errno.h>
	12	#include <linux/init.h>
	13	#include <linux/interrupt.h>
5a0e3ad6	14	#include <linux/slab.h>
80af9e6d	15	#include <linux/gpio.h>
a843168d JE	16	#include <linux/io.h>
a843168d JE	17	#include <linux/sizes.h>
eaa9a21d AB	18	#include <linux/mfd/syscon.h>
eaa9a21d AB	19	#include <linux/mfd/syscon/atmel-mc.h>
ed9084ec JE	20	#include <linux/of.h>
	21	#include <linux/of_device.h>
	22	#include <linux/of_gpio.h>
eaa9a21d	23	#include <linux/regmap.h>
2c1f3b7a AV	24
	25	#include <pcmcia/ss.h>
	26
2c1f3b7a AV	27	/*
	28	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	29	* some other bit in {A24,A22..A11} is nREG to flag memory access
	30	* (vs attributes). So more than 2KB/region would just be waste.
ebe5cfb3	31	* Note: These are offsets from the physical base address.
2c1f3b7a	32	*/
ebe5cfb3 AV	33	#define CF_ATTR_PHYS (0)
	34	#define CF_IO_PHYS (1 << 23)
	35	#define CF_MEM_PHYS (0x017ff800)
2c1f3b7a	36
24c8a743 AB	37	struct at91_cf_data {
	38	int irq_pin; /* I/O IRQ */
	39	int det_pin; /* Card detect */
	40	int vcc_pin; /* power switching */
	41	int rst_pin; /* card reset */
	42	u8 chipselect; /* EBI Chip Select number */
	43	u8 flags;
	44	#define AT91_CF_TRUE_IDE 0x01
	45	#define AT91_IDE_SWAP_A0_A2 0x02
	46	};
	47
eaa9a21d AB	48	struct regmap *mc;
eaa9a21d AB	49
2c1f3b7a AV	50	/--------------------------------------------------------------------------/
2c1f3b7a AV	51
2c1f3b7a AV	52	struct at91_cf_socket {
	53	struct pcmcia_socket socket;
	54
	55	unsigned present:1;
	56
	57	struct platform_device *pdev;
	58	struct at91_cf_data *board;
ebe5cfb3 AV	59
ebe5cfb3 AV	60	unsigned long phys_baseaddr;
2c1f3b7a AV	61	};
2c1f3b7a AV	62
2c1f3b7a AV	63	static inline int at91_cf_present(struct at91_cf_socket *cf)
2c1f3b7a AV	64	{
4c1fc445	65	return !gpio_get_value(cf->board->det_pin);
2c1f3b7a AV	66	}
	67
	68	/--------------------------------------------------------------------------/
	69
	70	static int at91_cf_ss_init(struct pcmcia_socket *s)
	71	{
	72	return 0;
	73	}
	74
7d12e780	75	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a	76	{
c7bec5ab	77	struct at91_cf_socket *cf = _cf;
2c1f3b7a	78
80af9e6d	79	if (irq == gpio_to_irq(cf->board->det_pin)) {
2c1f3b7a AV	80	unsigned present = at91_cf_present(cf);
	81
	82	/* kick pccard as needed */
	83	if (present != cf->present) {
	84	cf->present = present;
40ca0209	85	dev_dbg(&cf->pdev->dev, "card %s\n",
2c536200	86	present ? "present" : "gone");
2c1f3b7a AV	87	pcmcia_parse_events(&cf->socket, SS_DETECT);
	88	}
	89	}
	90
	91	return IRQ_HANDLED;
	92	}
	93
	94	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	95	{
	96	struct at91_cf_socket *cf;
	97
	98	if (!sp)
	99	return -EINVAL;
	100
	101	cf = container_of(s, struct at91_cf_socket, socket);
	102
2c536200	103	/* NOTE: CF is always 3VCARD */
2c1f3b7a	104	if (at91_cf_present(cf)) {
80af9e6d JE	105	int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */
80af9e6d JE	106	int vcc = gpio_is_valid(cf->board->vcc_pin);
2c1f3b7a AV	107
2c1f3b7a AV	108	*sp = SS_DETECT \| SS_3VCARD;
e39506b4	109	if (!rdy \|\| gpio_get_value(cf->board->irq_pin))
2c1f3b7a	110	*sp \|= SS_READY;
e39506b4	111	if (!vcc \|\| gpio_get_value(cf->board->vcc_pin))
2c1f3b7a AV	112	*sp \|= SS_POWERON;
	113	} else
	114	*sp = 0;
	115
	116	return 0;
	117	}
	118
2c536200 DB	119	static int
2c536200 DB	120	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	121	{
	122	struct at91_cf_socket *cf;
	123
	124	cf = container_of(sock, struct at91_cf_socket, socket);
	125
	126	/* switch Vcc if needed and possible */
80af9e6d	127	if (gpio_is_valid(cf->board->vcc_pin)) {
2c1f3b7a	128	switch (s->Vcc) {
d652f702 LN	129	case 0:
	130	gpio_set_value(cf->board->vcc_pin, 0);
	131	break;
	132	case 33:
	133	gpio_set_value(cf->board->vcc_pin, 1);
	134	break;
	135	default:
	136	return -EINVAL;
2c1f3b7a AV	137	}
	138	}
	139
	140	/* toggle reset if needed */
4c1fc445	141	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
2c1f3b7a	142
40ca0209 JE	143	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
40ca0209 JE	144	s->Vcc, s->io_irq, s->flags, s->csc_mask);
2c1f3b7a AV	145
	146	return 0;
	147	}
	148
	149	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	150	{
	151	return at91_cf_set_socket(s, &dead_socket);
	152	}
	153
	154	/* we already mapped the I/O region */
	155	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	156	{
	157	struct at91_cf_socket *cf;
	158	u32 csr;
	159
	160	cf = container_of(s, struct at91_cf_socket, socket);
	161	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	162
	163	/*
	164	* Use 16 bit accesses unless/until we need 8-bit i/o space.
eaa9a21d	165	*
2c1f3b7a AV	166	* NOTE: this CF controller ignores IOIS16, so we can't really do
	167	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	168	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	169	* purposes (and handles ide-cs).
	170	*
	171	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	172	* some cards only like that way to get at the odd byte, despite
	173	* CF 3.0 spec table 35 also giving the D8-D15 option.
	174	*/
ebe5cfb3	175	if (!(io->flags & (MAP_16BIT \| MAP_AUTOSZ))) {
eaa9a21d	176	csr = AT91_MC_SMC_DBW_8;
40ca0209	177	dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
2c1f3b7a	178	} else {
eaa9a21d	179	csr = AT91_MC_SMC_DBW_16;
40ca0209	180	dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
2c1f3b7a	181	}
eaa9a21d AB	182	regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect),
eaa9a21d AB	183	AT91_MC_SMC_DBW, csr);
2c1f3b7a AV	184
	185	io->start = cf->socket.io_offset;
	186	io->stop = io->start + SZ_2K - 1;
	187
	188	return 0;
	189	}
	190
	191	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	192	static int
2c536200 DB	193	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	194	{
	195	struct at91_cf_socket *cf;
	196
	197	if (map->card_start)
	198	return -EINVAL;
	199
	200	cf = container_of(s, struct at91_cf_socket, socket);
	201
ebe5cfb3	202	map->flags &= (MAP_ACTIVE \| MAP_ATTRIB \| MAP_16BIT);
2c1f3b7a	203	if (map->flags & MAP_ATTRIB)
ebe5cfb3	204	map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
2c1f3b7a	205	else
ebe5cfb3	206	map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
2c1f3b7a AV	207
	208	return 0;
	209	}
	210
	211	static struct pccard_operations at91_cf_ops = {
	212	.init = at91_cf_ss_init,
	213	.suspend = at91_cf_ss_suspend,
	214	.get_status = at91_cf_get_status,
	215	.set_socket = at91_cf_set_socket,
	216	.set_io_map = at91_cf_set_io_map,
	217	.set_mem_map = at91_cf_set_mem_map,
	218	};
	219
	220	/--------------------------------------------------------------------------/
	221
ed9084ec JE	222	static const struct of_device_id at91_cf_dt_ids[] = {
	223	{ .compatible = "atmel,at91rm9200-cf" },
	224	{ /* sentinel */ }
	225	};
	226	MODULE_DEVICE_TABLE(of, at91_cf_dt_ids);
	227
264788c8	228	static int at91_cf_probe(struct platform_device *pdev)
ed9084ec	229	{
264788c8 AB	230	struct at91_cf_socket *cf;
	231	struct at91_cf_data *board;
	232	struct resource *io;
	233	int status;
ed9084ec JE	234
	235	board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL);
	236	if (!board)
	237	return -ENOMEM;
	238
	239	board->irq_pin = of_get_gpio(pdev->dev.of_node, 0);
	240	board->det_pin = of_get_gpio(pdev->dev.of_node, 1);
	241	board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2);
	242	board->rst_pin = of_get_gpio(pdev->dev.of_node, 3);
	243
eaa9a21d	244	mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc");
264788c8 AB	245	if (IS_ERR(mc))
264788c8 AB	246	return PTR_ERR(mc);
ed9084ec JE	247
ed9084ec JE	248	if (!gpio_is_valid(board->det_pin) \|\| !gpio_is_valid(board->rst_pin))
2c1f3b7a AV	249	return -ENODEV;
2c1f3b7a AV	250
2c536200 DB	251	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	252	if (!io)
	253	return -ENODEV;
	254
54fe1591	255	cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL);
2c1f3b7a AV	256	if (!cf)
	257	return -ENOMEM;
	258
	259	cf->board = board;
	260	cf->pdev = pdev;
ebe5cfb3	261	cf->phys_baseaddr = io->start;
0db6095d	262	platform_set_drvdata(pdev, cf);
2c1f3b7a	263
2c1f3b7a	264	/* must be a GPIO; ergo must trigger on both edges */
54fe1591	265	status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det");
2c1f3b7a	266	if (status < 0)
54fe1591 JE	267	return status;
	268
	269	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin),
	270	at91_cf_irq, 0, "at91_cf detect", cf);
4c1fc445	271	if (status < 0)
54fe1591 JE	272	return status;
54fe1591 JE	273
0db6095d	274	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a	275
54fe1591	276	status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst");
4c1fc445 DB	277	if (status < 0)
	278	goto fail0a;
	279
80af9e6d	280	if (gpio_is_valid(board->vcc_pin)) {
54fe1591	281	status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc");
4c1fc445	282	if (status < 0)
54fe1591	283	goto fail0a;
4c1fc445 DB	284	}
4c1fc445 DB	285
2c1f3b7a AV	286	/*
	287	* The card driver will request this irq later as needed.
	288	* but it causes lots of "irqNN: nobody cared" messages
	289	* unless we report that we handle everything (sigh).
	290	* (Note: DK board doesn't wire the IRQ pin...)
	291	*/
80af9e6d	292	if (gpio_is_valid(board->irq_pin)) {
54fe1591	293	status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq");
4c1fc445	294	if (status < 0)
54fe1591 JE	295	goto fail0a;
	296
	297	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin),
	298	at91_cf_irq, IRQF_SHARED, "at91_cf", cf);
2c1f3b7a	299	if (status < 0)
54fe1591	300	goto fail0a;
80af9e6d	301	cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
2c536200	302	} else
9130adda	303	cf->socket.pci_irq = nr_irqs + 1;
2c1f3b7a	304
1be27c62 AB	305	/*
	306	* pcmcia layer only remaps "real" memory not iospace
	307	* io_offset is set to 0x10000 to avoid the check in static_find_io().
	308	* */
	309	cf->socket.io_offset = 0x10000;
	310	status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
	311	if (status)
54fe1591	312	goto fail0a;
2c1f3b7a	313
40a0017e	314	/* reserve chip-select regions */
54fe1591	315	if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
ebe5cfb3	316	status = -ENXIO;
54fe1591	317	goto fail0a;
ebe5cfb3	318	}
2c1f3b7a	319
40ca0209	320	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
80af9e6d	321	gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));
2c1f3b7a AV	322
2c1f3b7a AV	323	cf->socket.owner = THIS_MODULE;
e4a3c3f0	324	cf->socket.dev.parent = &pdev->dev;
2c1f3b7a AV	325	cf->socket.ops = &at91_cf_ops;
	326	cf->socket.resource_ops = &pccard_static_ops;
	327	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	328	\| SS_CAP_MEM_ALIGN;
	329	cf->socket.map_size = SZ_2K;
2c536200	330	cf->socket.io[0].res = io;
2c1f3b7a AV	331
	332	status = pcmcia_register_socket(&cf->socket);
	333	if (status < 0)
54fe1591	334	goto fail0a;
2c1f3b7a AV	335
	336	return 0;
	337
2c1f3b7a	338	fail0a:
1fbece15	339	device_init_wakeup(&pdev->dev, 0);
2c1f3b7a AV	340	return status;
	341	}
	342
16a7c7cf	343	static int at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	344	{
0db6095d	345	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
2c1f3b7a AV	346
2c1f3b7a AV	347	pcmcia_unregister_socket(&cf->socket);
0db6095d	348	device_init_wakeup(&pdev->dev, 0);
54fe1591	349
2c1f3b7a AV	350	return 0;
	351	}
	352
0db6095d DB	353	#ifdef CONFIG_PM
	354
	355	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	356	{
	357	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	358	struct at91_cf_data *board = cf->board;
	359
1fbece15	360	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	361	enable_irq_wake(gpio_to_irq(board->det_pin));
	362	if (gpio_is_valid(board->irq_pin))
	363	enable_irq_wake(gpio_to_irq(board->irq_pin));
0db6095d	364	}
0db6095d DB	365	return 0;
	366	}
	367
	368	static int at91_cf_resume(struct platform_device *pdev)
	369	{
9af20376 MP	370	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	371	struct at91_cf_data *board = cf->board;
	372
	373	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	374	disable_irq_wake(gpio_to_irq(board->det_pin));
	375	if (gpio_is_valid(board->irq_pin))
	376	disable_irq_wake(gpio_to_irq(board->irq_pin));
9af20376 MP	377	}
9af20376 MP	378
0db6095d DB	379	return 0;
	380	}
	381
	382	#else
	383	#define at91_cf_suspend NULL
	384	#define at91_cf_resume NULL
	385	#endif
	386
	387	static struct platform_driver at91_cf_driver = {
	388	.driver = {
40ca0209	389	.name = "at91_cf",
264788c8	390	.of_match_table = at91_cf_dt_ids,
0db6095d	391	},
16a7c7cf JH	392	.probe = at91_cf_probe,
16a7c7cf JH	393	.remove = at91_cf_remove,
0db6095d DB	394	.suspend = at91_cf_suspend,
0db6095d DB	395	.resume = at91_cf_resume,
2c1f3b7a AV	396	};
2c1f3b7a AV	397
16a7c7cf	398	module_platform_driver(at91_cf_driver);
2c1f3b7a AV	399
	400	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	401	MODULE_AUTHOR("David Brownell");
	402	MODULE_LICENSE("GPL");
12c2c019	403	MODULE_ALIAS("platform:at91_cf");