[mirror_ubuntu-bionic-kernel.git] / drivers / pcmcia / at91_cf.c

/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/platform_data/atmel.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>

#include <pcmcia/ss.h>

#include <mach/at91rm9200_mc.h>
#include <mach/at91_ramc.h>


/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 * Note: These are offsets from the physical base address.
 */
#define	CF_ATTR_PHYS	(0)
#define	CF_IO_PHYS	(1 << 23)
#define	CF_MEM_PHYS	(0x017ff800)

/*--------------------------------------------------------------------------*/

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;

	unsigned long		phys_baseaddr;
};

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !gpio_get_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket *cf = _cf;

	if (irq == gpio_to_irq(cf->board->det_pin)) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			dev_dbg(&cf->pdev->dev, "card %s\n",
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= gpio_is_valid(cf->board->irq_pin);	/* RDY/nIRQ */
		int vcc	= gpio_is_valid(cf->board->vcc_pin);

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || gpio_get_value(cf->board->irq_pin))
			*sp |= SS_READY;
		if (!vcc || gpio_get_value(cf->board->vcc_pin))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (gpio_is_valid(cf->board->vcc_pin)) {
		switch (s->Vcc) {
		case 0:
			gpio_set_value(cf->board->vcc_pin, 0);
			break;
		case 33:
			gpio_set_value(cf->board->vcc_pin, 1);
			break;
		default:
			return -EINVAL;
		}
	}

	/* toggle reset if needed */
	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);

	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
				s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 */
	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;

	/*
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
		csr |= AT91_SMC_DBW_8;
		dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
	} else {
		csr |= AT91_SMC_DBW_16;
		dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
	}
	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
	if (map->flags & MAP_ATTRIB)
		map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
	else
		map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

#if defined(CONFIG_OF)
static const struct of_device_id at91_cf_dt_ids[] = {
	{ .compatible = "atmel,at91rm9200-cf" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, at91_cf_dt_ids);

static int at91_cf_dt_init(struct platform_device *pdev)
{
	struct at91_cf_data *board;

	board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL);
	if (!board)
		return -ENOMEM;

	board->irq_pin = of_get_gpio(pdev->dev.of_node, 0);
	board->det_pin = of_get_gpio(pdev->dev.of_node, 1);
	board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2);
	board->rst_pin = of_get_gpio(pdev->dev.of_node, 3);

	pdev->dev.platform_data = board;

	return 0;
}
#else
static int at91_cf_dt_init(struct platform_device *pdev)
{
	return -ENODEV;
}
#endif

static int at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board = pdev->dev.platform_data;
	struct resource		*io;
	int			status;

	if (!board) {
		status = at91_cf_dt_init(pdev);
		if (status)
			return status;

		board = pdev->dev.platform_data;
	}

	if (!gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin))
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	cf->phys_baseaddr = io->start;
	platform_set_drvdata(pdev, cf);

	/* must be a GPIO; ergo must trigger on both edges */
	status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det");
	if (status < 0)
		return status;

	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin),
					at91_cf_irq, 0, "at91_cf detect", cf);
	if (status < 0)
		return status;

	device_init_wakeup(&pdev->dev, 1);

	status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst");
	if (status < 0)
		goto fail0a;

	if (gpio_is_valid(board->vcc_pin)) {
		status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc");
		if (status < 0)
			goto fail0a;
	}

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (gpio_is_valid(board->irq_pin)) {
		status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq");
		if (status < 0)
			goto fail0a;

		status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin),
					at91_cf_irq, IRQF_SHARED, "at91_cf", cf);
		if (status < 0)
			goto fail0a;
		cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
	} else
		cf->socket.pci_irq = nr_irqs + 1;

	/*
	 * pcmcia layer only remaps "real" memory not iospace
	 * io_offset is set to 0x10000 to avoid the check in static_find_io().
	 * */
	cf->socket.io_offset = 0x10000;
	status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
	if (status)
		goto fail0a;

	/* reserve chip-select regions */
	if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
		status = -ENXIO;
		goto fail0a;
	}

	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
		gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail0a;

	return 0;

fail0a:
	device_init_wakeup(&pdev->dev, 0);
	return status;
}

static int at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);

	pcmcia_unregister_socket(&cf->socket);
	device_init_wakeup(&pdev->dev, 0);

	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		enable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			enable_irq_wake(gpio_to_irq(board->irq_pin));
	}
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		disable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			disable_irq_wake(gpio_to_irq(board->irq_pin));
	}

	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= "at91_cf",
		.of_match_table = of_match_ptr(at91_cf_dt_ids),
	},
	.probe		= at91_cf_probe,
	.remove		= at91_cf_remove,
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

module_platform_driver(at91_cf_driver);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_cf");
Commit	Line	Data
2c1f3b7a AV	1	/*
	2	* at91_cf.c -- AT91 CompactFlash controller driver
	3	*
	4	* Copyright (C) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
2c1f3b7a AV	14	#include <linux/platform_device.h>
	15	#include <linux/errno.h>
	16	#include <linux/init.h>
	17	#include <linux/interrupt.h>
5a0e3ad6	18	#include <linux/slab.h>
80af9e6d	19	#include <linux/gpio.h>
bcd2360c	20	#include <linux/platform_data/atmel.h>
a843168d JE	21	#include <linux/io.h>
a843168d JE	22	#include <linux/sizes.h>
ed9084ec JE	23	#include <linux/of.h>
	24	#include <linux/of_device.h>
	25	#include <linux/of_gpio.h>
2c1f3b7a AV	26
	27	#include <pcmcia/ss.h>
	28
a09e64fb	29	#include <mach/at91rm9200_mc.h>
f363c407	30	#include <mach/at91_ramc.h>
2c1f3b7a AV	31
2c1f3b7a AV	32
2c1f3b7a AV	33	/*
	34	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	35	* some other bit in {A24,A22..A11} is nREG to flag memory access
	36	* (vs attributes). So more than 2KB/region would just be waste.
ebe5cfb3	37	* Note: These are offsets from the physical base address.
2c1f3b7a	38	*/
ebe5cfb3 AV	39	#define CF_ATTR_PHYS (0)
	40	#define CF_IO_PHYS (1 << 23)
	41	#define CF_MEM_PHYS (0x017ff800)
2c1f3b7a AV	42
	43	/--------------------------------------------------------------------------/
	44
2c1f3b7a AV	45	struct at91_cf_socket {
	46	struct pcmcia_socket socket;
	47
	48	unsigned present:1;
	49
	50	struct platform_device *pdev;
	51	struct at91_cf_data *board;
ebe5cfb3 AV	52
ebe5cfb3 AV	53	unsigned long phys_baseaddr;
2c1f3b7a AV	54	};
2c1f3b7a AV	55
2c1f3b7a AV	56	static inline int at91_cf_present(struct at91_cf_socket *cf)
2c1f3b7a AV	57	{
4c1fc445	58	return !gpio_get_value(cf->board->det_pin);
2c1f3b7a AV	59	}
	60
	61	/--------------------------------------------------------------------------/
	62
	63	static int at91_cf_ss_init(struct pcmcia_socket *s)
	64	{
	65	return 0;
	66	}
	67
7d12e780	68	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a	69	{
c7bec5ab	70	struct at91_cf_socket *cf = _cf;
2c1f3b7a	71
80af9e6d	72	if (irq == gpio_to_irq(cf->board->det_pin)) {
2c1f3b7a AV	73	unsigned present = at91_cf_present(cf);
	74
	75	/* kick pccard as needed */
	76	if (present != cf->present) {
	77	cf->present = present;
40ca0209	78	dev_dbg(&cf->pdev->dev, "card %s\n",
2c536200	79	present ? "present" : "gone");
2c1f3b7a AV	80	pcmcia_parse_events(&cf->socket, SS_DETECT);
	81	}
	82	}
	83
	84	return IRQ_HANDLED;
	85	}
	86
	87	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	88	{
	89	struct at91_cf_socket *cf;
	90
	91	if (!sp)
	92	return -EINVAL;
	93
	94	cf = container_of(s, struct at91_cf_socket, socket);
	95
2c536200	96	/* NOTE: CF is always 3VCARD */
2c1f3b7a	97	if (at91_cf_present(cf)) {
80af9e6d JE	98	int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */
80af9e6d JE	99	int vcc = gpio_is_valid(cf->board->vcc_pin);
2c1f3b7a AV	100
2c1f3b7a AV	101	*sp = SS_DETECT \| SS_3VCARD;
e39506b4	102	if (!rdy \|\| gpio_get_value(cf->board->irq_pin))
2c1f3b7a	103	*sp \|= SS_READY;
e39506b4	104	if (!vcc \|\| gpio_get_value(cf->board->vcc_pin))
2c1f3b7a AV	105	*sp \|= SS_POWERON;
	106	} else
	107	*sp = 0;
	108
	109	return 0;
	110	}
	111
2c536200 DB	112	static int
2c536200 DB	113	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	114	{
	115	struct at91_cf_socket *cf;
	116
	117	cf = container_of(sock, struct at91_cf_socket, socket);
	118
	119	/* switch Vcc if needed and possible */
80af9e6d	120	if (gpio_is_valid(cf->board->vcc_pin)) {
2c1f3b7a	121	switch (s->Vcc) {
d652f702 LN	122	case 0:
	123	gpio_set_value(cf->board->vcc_pin, 0);
	124	break;
	125	case 33:
	126	gpio_set_value(cf->board->vcc_pin, 1);
	127	break;
	128	default:
	129	return -EINVAL;
2c1f3b7a AV	130	}
	131	}
	132
	133	/* toggle reset if needed */
4c1fc445	134	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
2c1f3b7a	135
40ca0209 JE	136	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
40ca0209 JE	137	s->Vcc, s->io_irq, s->flags, s->csc_mask);
2c1f3b7a AV	138
	139	return 0;
	140	}
	141
	142	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	143	{
	144	return at91_cf_set_socket(s, &dead_socket);
	145	}
	146
	147	/* we already mapped the I/O region */
	148	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	149	{
	150	struct at91_cf_socket *cf;
	151	u32 csr;
	152
	153	cf = container_of(s, struct at91_cf_socket, socket);
	154	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	155
	156	/*
	157	* Use 16 bit accesses unless/until we need 8-bit i/o space.
2c1f3b7a	158	*/
f363c407	159	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
2c1f3b7a AV	160
	161	/*
	162	* NOTE: this CF controller ignores IOIS16, so we can't really do
	163	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	164	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	165	* purposes (and handles ide-cs).
	166	*
	167	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	168	* some cards only like that way to get at the odd byte, despite
	169	* CF 3.0 spec table 35 also giving the D8-D15 option.
	170	*/
ebe5cfb3	171	if (!(io->flags & (MAP_16BIT \| MAP_AUTOSZ))) {
2c1f3b7a	172	csr \|= AT91_SMC_DBW_8;
40ca0209	173	dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
2c1f3b7a AV	174	} else {
2c1f3b7a AV	175	csr \|= AT91_SMC_DBW_16;
40ca0209	176	dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
2c1f3b7a	177	}
f363c407	178	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
2c1f3b7a AV	179
	180	io->start = cf->socket.io_offset;
	181	io->stop = io->start + SZ_2K - 1;
	182
	183	return 0;
	184	}
	185
	186	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	187	static int
2c536200 DB	188	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	189	{
	190	struct at91_cf_socket *cf;
	191
	192	if (map->card_start)
	193	return -EINVAL;
	194
	195	cf = container_of(s, struct at91_cf_socket, socket);
	196
ebe5cfb3	197	map->flags &= (MAP_ACTIVE \| MAP_ATTRIB \| MAP_16BIT);
2c1f3b7a	198	if (map->flags & MAP_ATTRIB)
ebe5cfb3	199	map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
2c1f3b7a	200	else
ebe5cfb3	201	map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
2c1f3b7a AV	202
	203	return 0;
	204	}
	205
	206	static struct pccard_operations at91_cf_ops = {
	207	.init = at91_cf_ss_init,
	208	.suspend = at91_cf_ss_suspend,
	209	.get_status = at91_cf_get_status,
	210	.set_socket = at91_cf_set_socket,
	211	.set_io_map = at91_cf_set_io_map,
	212	.set_mem_map = at91_cf_set_mem_map,
	213	};
	214
	215	/--------------------------------------------------------------------------/
	216
ed9084ec JE	217	#if defined(CONFIG_OF)
	218	static const struct of_device_id at91_cf_dt_ids[] = {
	219	{ .compatible = "atmel,at91rm9200-cf" },
	220	{ /* sentinel */ }
	221	};
	222	MODULE_DEVICE_TABLE(of, at91_cf_dt_ids);
	223
	224	static int at91_cf_dt_init(struct platform_device *pdev)
	225	{
	226	struct at91_cf_data *board;
	227
	228	board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL);
	229	if (!board)
	230	return -ENOMEM;
	231
	232	board->irq_pin = of_get_gpio(pdev->dev.of_node, 0);
	233	board->det_pin = of_get_gpio(pdev->dev.of_node, 1);
	234	board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2);
	235	board->rst_pin = of_get_gpio(pdev->dev.of_node, 3);
	236
	237	pdev->dev.platform_data = board;
	238
	239	return 0;
	240	}
	241	#else
	242	static int at91_cf_dt_init(struct platform_device *pdev)
	243	{
	244	return -ENODEV;
	245	}
	246	#endif
	247
16a7c7cf	248	static int at91_cf_probe(struct platform_device *pdev)
2c1f3b7a AV	249	{
2c1f3b7a AV	250	struct at91_cf_socket *cf;
0db6095d	251	struct at91_cf_data *board = pdev->dev.platform_data;
2c536200	252	struct resource *io;
2c1f3b7a AV	253	int status;
2c1f3b7a AV	254
ed9084ec JE	255	if (!board) {
	256	status = at91_cf_dt_init(pdev);
	257	if (status)
	258	return status;
	259
	260	board = pdev->dev.platform_data;
	261	}
	262
	263	if (!gpio_is_valid(board->det_pin) \|\| !gpio_is_valid(board->rst_pin))
2c1f3b7a AV	264	return -ENODEV;
2c1f3b7a AV	265
2c536200 DB	266	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	267	if (!io)
	268	return -ENODEV;
	269
54fe1591	270	cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL);
2c1f3b7a AV	271	if (!cf)
	272	return -ENOMEM;
	273
	274	cf->board = board;
	275	cf->pdev = pdev;
ebe5cfb3	276	cf->phys_baseaddr = io->start;
0db6095d	277	platform_set_drvdata(pdev, cf);
2c1f3b7a	278
2c1f3b7a	279	/* must be a GPIO; ergo must trigger on both edges */
54fe1591	280	status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det");
2c1f3b7a	281	if (status < 0)
54fe1591 JE	282	return status;
	283
	284	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin),
	285	at91_cf_irq, 0, "at91_cf detect", cf);
4c1fc445	286	if (status < 0)
54fe1591 JE	287	return status;
54fe1591 JE	288
0db6095d	289	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a	290
54fe1591	291	status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst");
4c1fc445 DB	292	if (status < 0)
	293	goto fail0a;
	294
80af9e6d	295	if (gpio_is_valid(board->vcc_pin)) {
54fe1591	296	status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc");
4c1fc445	297	if (status < 0)
54fe1591	298	goto fail0a;
4c1fc445 DB	299	}
4c1fc445 DB	300
2c1f3b7a AV	301	/*
	302	* The card driver will request this irq later as needed.
	303	* but it causes lots of "irqNN: nobody cared" messages
	304	* unless we report that we handle everything (sigh).
	305	* (Note: DK board doesn't wire the IRQ pin...)
	306	*/
80af9e6d	307	if (gpio_is_valid(board->irq_pin)) {
54fe1591	308	status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq");
4c1fc445	309	if (status < 0)
54fe1591 JE	310	goto fail0a;
	311
	312	status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin),
	313	at91_cf_irq, IRQF_SHARED, "at91_cf", cf);
2c1f3b7a	314	if (status < 0)
54fe1591	315	goto fail0a;
80af9e6d	316	cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
2c536200	317	} else
9130adda	318	cf->socket.pci_irq = nr_irqs + 1;
2c1f3b7a	319
1be27c62 AB	320	/*
	321	* pcmcia layer only remaps "real" memory not iospace
	322	* io_offset is set to 0x10000 to avoid the check in static_find_io().
	323	* */
	324	cf->socket.io_offset = 0x10000;
	325	status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
	326	if (status)
54fe1591	327	goto fail0a;
2c1f3b7a	328
40a0017e	329	/* reserve chip-select regions */
54fe1591	330	if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
ebe5cfb3	331	status = -ENXIO;
54fe1591	332	goto fail0a;
ebe5cfb3	333	}
2c1f3b7a	334
40ca0209	335	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
80af9e6d	336	gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));
2c1f3b7a AV	337
2c1f3b7a AV	338	cf->socket.owner = THIS_MODULE;
e4a3c3f0	339	cf->socket.dev.parent = &pdev->dev;
2c1f3b7a AV	340	cf->socket.ops = &at91_cf_ops;
	341	cf->socket.resource_ops = &pccard_static_ops;
	342	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	343	\| SS_CAP_MEM_ALIGN;
	344	cf->socket.map_size = SZ_2K;
2c536200	345	cf->socket.io[0].res = io;
2c1f3b7a AV	346
	347	status = pcmcia_register_socket(&cf->socket);
	348	if (status < 0)
54fe1591	349	goto fail0a;
2c1f3b7a AV	350
	351	return 0;
	352
2c1f3b7a	353	fail0a:
1fbece15	354	device_init_wakeup(&pdev->dev, 0);
2c1f3b7a AV	355	return status;
	356	}
	357
16a7c7cf	358	static int at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	359	{
0db6095d	360	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
2c1f3b7a AV	361
2c1f3b7a AV	362	pcmcia_unregister_socket(&cf->socket);
0db6095d	363	device_init_wakeup(&pdev->dev, 0);
54fe1591	364
2c1f3b7a AV	365	return 0;
	366	}
	367
0db6095d DB	368	#ifdef CONFIG_PM
	369
	370	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	371	{
	372	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	373	struct at91_cf_data *board = cf->board;
	374
1fbece15	375	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	376	enable_irq_wake(gpio_to_irq(board->det_pin));
	377	if (gpio_is_valid(board->irq_pin))
	378	enable_irq_wake(gpio_to_irq(board->irq_pin));
0db6095d	379	}
0db6095d DB	380	return 0;
	381	}
	382
	383	static int at91_cf_resume(struct platform_device *pdev)
	384	{
9af20376 MP	385	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	386	struct at91_cf_data *board = cf->board;
	387
	388	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	389	disable_irq_wake(gpio_to_irq(board->det_pin));
	390	if (gpio_is_valid(board->irq_pin))
	391	disable_irq_wake(gpio_to_irq(board->irq_pin));
9af20376 MP	392	}
9af20376 MP	393
0db6095d DB	394	return 0;
	395	}
	396
	397	#else
	398	#define at91_cf_suspend NULL
	399	#define at91_cf_resume NULL
	400	#endif
	401
	402	static struct platform_driver at91_cf_driver = {
	403	.driver = {
40ca0209	404	.name = "at91_cf",
ed9084ec	405	.of_match_table = of_match_ptr(at91_cf_dt_ids),
0db6095d	406	},
16a7c7cf JH	407	.probe = at91_cf_probe,
16a7c7cf JH	408	.remove = at91_cf_remove,
0db6095d DB	409	.suspend = at91_cf_suspend,
0db6095d DB	410	.resume = at91_cf_resume,
2c1f3b7a AV	411	};
2c1f3b7a AV	412
16a7c7cf	413	module_platform_driver(at91_cf_driver);
2c1f3b7a AV	414
	415	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	416	MODULE_AUTHOR("David Brownell");
	417	MODULE_LICENSE("GPL");
12c2c019	418	MODULE_ALIAS("platform:at91_cf");