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Commit | Line | Data |
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2c1f3b7a AV |
1 | /* |
2 | * at91_cf.c -- AT91 CompactFlash controller driver | |
3 | * | |
4 | * Copyright (C) 2005 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/kernel.h> | |
2c1f3b7a AV |
14 | #include <linux/platform_device.h> |
15 | #include <linux/errno.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/interrupt.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
80af9e6d | 19 | #include <linux/gpio.h> |
bcd2360c | 20 | #include <linux/platform_data/atmel.h> |
a843168d JE |
21 | #include <linux/io.h> |
22 | #include <linux/sizes.h> | |
ed9084ec JE |
23 | #include <linux/of.h> |
24 | #include <linux/of_device.h> | |
25 | #include <linux/of_gpio.h> | |
2c1f3b7a AV |
26 | |
27 | #include <pcmcia/ss.h> | |
28 | ||
a09e64fb | 29 | #include <mach/at91rm9200_mc.h> |
f363c407 | 30 | #include <mach/at91_ramc.h> |
2c1f3b7a AV |
31 | |
32 | ||
2c1f3b7a AV |
33 | /* |
34 | * A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW; | |
35 | * some other bit in {A24,A22..A11} is nREG to flag memory access | |
36 | * (vs attributes). So more than 2KB/region would just be waste. | |
ebe5cfb3 | 37 | * Note: These are offsets from the physical base address. |
2c1f3b7a | 38 | */ |
ebe5cfb3 AV |
39 | #define CF_ATTR_PHYS (0) |
40 | #define CF_IO_PHYS (1 << 23) | |
41 | #define CF_MEM_PHYS (0x017ff800) | |
2c1f3b7a AV |
42 | |
43 | /*--------------------------------------------------------------------------*/ | |
44 | ||
2c1f3b7a AV |
45 | struct at91_cf_socket { |
46 | struct pcmcia_socket socket; | |
47 | ||
48 | unsigned present:1; | |
49 | ||
50 | struct platform_device *pdev; | |
51 | struct at91_cf_data *board; | |
ebe5cfb3 AV |
52 | |
53 | unsigned long phys_baseaddr; | |
2c1f3b7a AV |
54 | }; |
55 | ||
2c1f3b7a AV |
56 | static inline int at91_cf_present(struct at91_cf_socket *cf) |
57 | { | |
4c1fc445 | 58 | return !gpio_get_value(cf->board->det_pin); |
2c1f3b7a AV |
59 | } |
60 | ||
61 | /*--------------------------------------------------------------------------*/ | |
62 | ||
63 | static int at91_cf_ss_init(struct pcmcia_socket *s) | |
64 | { | |
65 | return 0; | |
66 | } | |
67 | ||
7d12e780 | 68 | static irqreturn_t at91_cf_irq(int irq, void *_cf) |
2c1f3b7a | 69 | { |
c7bec5ab | 70 | struct at91_cf_socket *cf = _cf; |
2c1f3b7a | 71 | |
80af9e6d | 72 | if (irq == gpio_to_irq(cf->board->det_pin)) { |
2c1f3b7a AV |
73 | unsigned present = at91_cf_present(cf); |
74 | ||
75 | /* kick pccard as needed */ | |
76 | if (present != cf->present) { | |
77 | cf->present = present; | |
40ca0209 | 78 | dev_dbg(&cf->pdev->dev, "card %s\n", |
2c536200 | 79 | present ? "present" : "gone"); |
2c1f3b7a AV |
80 | pcmcia_parse_events(&cf->socket, SS_DETECT); |
81 | } | |
82 | } | |
83 | ||
84 | return IRQ_HANDLED; | |
85 | } | |
86 | ||
87 | static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp) | |
88 | { | |
89 | struct at91_cf_socket *cf; | |
90 | ||
91 | if (!sp) | |
92 | return -EINVAL; | |
93 | ||
94 | cf = container_of(s, struct at91_cf_socket, socket); | |
95 | ||
2c536200 | 96 | /* NOTE: CF is always 3VCARD */ |
2c1f3b7a | 97 | if (at91_cf_present(cf)) { |
80af9e6d JE |
98 | int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */ |
99 | int vcc = gpio_is_valid(cf->board->vcc_pin); | |
2c1f3b7a AV |
100 | |
101 | *sp = SS_DETECT | SS_3VCARD; | |
e39506b4 | 102 | if (!rdy || gpio_get_value(cf->board->irq_pin)) |
2c1f3b7a | 103 | *sp |= SS_READY; |
e39506b4 | 104 | if (!vcc || gpio_get_value(cf->board->vcc_pin)) |
2c1f3b7a AV |
105 | *sp |= SS_POWERON; |
106 | } else | |
107 | *sp = 0; | |
108 | ||
109 | return 0; | |
110 | } | |
111 | ||
2c536200 DB |
112 | static int |
113 | at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) | |
2c1f3b7a AV |
114 | { |
115 | struct at91_cf_socket *cf; | |
116 | ||
117 | cf = container_of(sock, struct at91_cf_socket, socket); | |
118 | ||
119 | /* switch Vcc if needed and possible */ | |
80af9e6d | 120 | if (gpio_is_valid(cf->board->vcc_pin)) { |
2c1f3b7a | 121 | switch (s->Vcc) { |
d652f702 LN |
122 | case 0: |
123 | gpio_set_value(cf->board->vcc_pin, 0); | |
124 | break; | |
125 | case 33: | |
126 | gpio_set_value(cf->board->vcc_pin, 1); | |
127 | break; | |
128 | default: | |
129 | return -EINVAL; | |
2c1f3b7a AV |
130 | } |
131 | } | |
132 | ||
133 | /* toggle reset if needed */ | |
4c1fc445 | 134 | gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET); |
2c1f3b7a | 135 | |
40ca0209 JE |
136 | dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n", |
137 | s->Vcc, s->io_irq, s->flags, s->csc_mask); | |
2c1f3b7a AV |
138 | |
139 | return 0; | |
140 | } | |
141 | ||
142 | static int at91_cf_ss_suspend(struct pcmcia_socket *s) | |
143 | { | |
144 | return at91_cf_set_socket(s, &dead_socket); | |
145 | } | |
146 | ||
147 | /* we already mapped the I/O region */ | |
148 | static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) | |
149 | { | |
150 | struct at91_cf_socket *cf; | |
151 | u32 csr; | |
152 | ||
153 | cf = container_of(s, struct at91_cf_socket, socket); | |
154 | io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ); | |
155 | ||
156 | /* | |
157 | * Use 16 bit accesses unless/until we need 8-bit i/o space. | |
2c1f3b7a | 158 | */ |
f363c407 | 159 | csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW; |
2c1f3b7a AV |
160 | |
161 | /* | |
162 | * NOTE: this CF controller ignores IOIS16, so we can't really do | |
163 | * MAP_AUTOSZ. The 16bit mode allows single byte access on either | |
164 | * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many | |
165 | * purposes (and handles ide-cs). | |
166 | * | |
167 | * The 8bit mode is needed for odd byte access on D0-D7. It seems | |
168 | * some cards only like that way to get at the odd byte, despite | |
169 | * CF 3.0 spec table 35 also giving the D8-D15 option. | |
170 | */ | |
ebe5cfb3 | 171 | if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) { |
2c1f3b7a | 172 | csr |= AT91_SMC_DBW_8; |
40ca0209 | 173 | dev_dbg(&cf->pdev->dev, "8bit i/o bus\n"); |
2c1f3b7a AV |
174 | } else { |
175 | csr |= AT91_SMC_DBW_16; | |
40ca0209 | 176 | dev_dbg(&cf->pdev->dev, "16bit i/o bus\n"); |
2c1f3b7a | 177 | } |
f363c407 | 178 | at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr); |
2c1f3b7a AV |
179 | |
180 | io->start = cf->socket.io_offset; | |
181 | io->stop = io->start + SZ_2K - 1; | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | /* pcmcia layer maps/unmaps mem regions */ | |
2c536200 DB |
187 | static int |
188 | at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map) | |
2c1f3b7a AV |
189 | { |
190 | struct at91_cf_socket *cf; | |
191 | ||
192 | if (map->card_start) | |
193 | return -EINVAL; | |
194 | ||
195 | cf = container_of(s, struct at91_cf_socket, socket); | |
196 | ||
ebe5cfb3 | 197 | map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT); |
2c1f3b7a | 198 | if (map->flags & MAP_ATTRIB) |
ebe5cfb3 | 199 | map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS; |
2c1f3b7a | 200 | else |
ebe5cfb3 | 201 | map->static_start = cf->phys_baseaddr + CF_MEM_PHYS; |
2c1f3b7a AV |
202 | |
203 | return 0; | |
204 | } | |
205 | ||
206 | static struct pccard_operations at91_cf_ops = { | |
207 | .init = at91_cf_ss_init, | |
208 | .suspend = at91_cf_ss_suspend, | |
209 | .get_status = at91_cf_get_status, | |
210 | .set_socket = at91_cf_set_socket, | |
211 | .set_io_map = at91_cf_set_io_map, | |
212 | .set_mem_map = at91_cf_set_mem_map, | |
213 | }; | |
214 | ||
215 | /*--------------------------------------------------------------------------*/ | |
216 | ||
ed9084ec JE |
217 | #if defined(CONFIG_OF) |
218 | static const struct of_device_id at91_cf_dt_ids[] = { | |
219 | { .compatible = "atmel,at91rm9200-cf" }, | |
220 | { /* sentinel */ } | |
221 | }; | |
222 | MODULE_DEVICE_TABLE(of, at91_cf_dt_ids); | |
223 | ||
224 | static int at91_cf_dt_init(struct platform_device *pdev) | |
225 | { | |
226 | struct at91_cf_data *board; | |
227 | ||
228 | board = devm_kzalloc(&pdev->dev, sizeof(*board), GFP_KERNEL); | |
229 | if (!board) | |
230 | return -ENOMEM; | |
231 | ||
232 | board->irq_pin = of_get_gpio(pdev->dev.of_node, 0); | |
233 | board->det_pin = of_get_gpio(pdev->dev.of_node, 1); | |
234 | board->vcc_pin = of_get_gpio(pdev->dev.of_node, 2); | |
235 | board->rst_pin = of_get_gpio(pdev->dev.of_node, 3); | |
236 | ||
237 | pdev->dev.platform_data = board; | |
238 | ||
239 | return 0; | |
240 | } | |
241 | #else | |
242 | static int at91_cf_dt_init(struct platform_device *pdev) | |
243 | { | |
244 | return -ENODEV; | |
245 | } | |
246 | #endif | |
247 | ||
0db6095d | 248 | static int __init at91_cf_probe(struct platform_device *pdev) |
2c1f3b7a AV |
249 | { |
250 | struct at91_cf_socket *cf; | |
0db6095d | 251 | struct at91_cf_data *board = pdev->dev.platform_data; |
2c536200 | 252 | struct resource *io; |
2c1f3b7a AV |
253 | int status; |
254 | ||
ed9084ec JE |
255 | if (!board) { |
256 | status = at91_cf_dt_init(pdev); | |
257 | if (status) | |
258 | return status; | |
259 | ||
260 | board = pdev->dev.platform_data; | |
261 | } | |
262 | ||
263 | if (!gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin)) | |
2c1f3b7a AV |
264 | return -ENODEV; |
265 | ||
2c536200 DB |
266 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
267 | if (!io) | |
268 | return -ENODEV; | |
269 | ||
54fe1591 | 270 | cf = devm_kzalloc(&pdev->dev, sizeof(*cf), GFP_KERNEL); |
2c1f3b7a AV |
271 | if (!cf) |
272 | return -ENOMEM; | |
273 | ||
274 | cf->board = board; | |
275 | cf->pdev = pdev; | |
ebe5cfb3 | 276 | cf->phys_baseaddr = io->start; |
0db6095d | 277 | platform_set_drvdata(pdev, cf); |
2c1f3b7a | 278 | |
2c1f3b7a | 279 | /* must be a GPIO; ergo must trigger on both edges */ |
54fe1591 | 280 | status = devm_gpio_request(&pdev->dev, board->det_pin, "cf_det"); |
2c1f3b7a | 281 | if (status < 0) |
54fe1591 JE |
282 | return status; |
283 | ||
284 | status = devm_request_irq(&pdev->dev, gpio_to_irq(board->det_pin), | |
285 | at91_cf_irq, 0, "at91_cf detect", cf); | |
4c1fc445 | 286 | if (status < 0) |
54fe1591 JE |
287 | return status; |
288 | ||
0db6095d | 289 | device_init_wakeup(&pdev->dev, 1); |
2c1f3b7a | 290 | |
54fe1591 | 291 | status = devm_gpio_request(&pdev->dev, board->rst_pin, "cf_rst"); |
4c1fc445 DB |
292 | if (status < 0) |
293 | goto fail0a; | |
294 | ||
80af9e6d | 295 | if (gpio_is_valid(board->vcc_pin)) { |
54fe1591 | 296 | status = devm_gpio_request(&pdev->dev, board->vcc_pin, "cf_vcc"); |
4c1fc445 | 297 | if (status < 0) |
54fe1591 | 298 | goto fail0a; |
4c1fc445 DB |
299 | } |
300 | ||
2c1f3b7a AV |
301 | /* |
302 | * The card driver will request this irq later as needed. | |
303 | * but it causes lots of "irqNN: nobody cared" messages | |
304 | * unless we report that we handle everything (sigh). | |
305 | * (Note: DK board doesn't wire the IRQ pin...) | |
306 | */ | |
80af9e6d | 307 | if (gpio_is_valid(board->irq_pin)) { |
54fe1591 | 308 | status = devm_gpio_request(&pdev->dev, board->irq_pin, "cf_irq"); |
4c1fc445 | 309 | if (status < 0) |
54fe1591 JE |
310 | goto fail0a; |
311 | ||
312 | status = devm_request_irq(&pdev->dev, gpio_to_irq(board->irq_pin), | |
313 | at91_cf_irq, IRQF_SHARED, "at91_cf", cf); | |
2c1f3b7a | 314 | if (status < 0) |
54fe1591 | 315 | goto fail0a; |
80af9e6d | 316 | cf->socket.pci_irq = gpio_to_irq(board->irq_pin); |
2c536200 | 317 | } else |
9130adda | 318 | cf->socket.pci_irq = nr_irqs + 1; |
2c1f3b7a AV |
319 | |
320 | /* pcmcia layer only remaps "real" memory not iospace */ | |
54fe1591 JE |
321 | cf->socket.io_offset = (unsigned long) devm_ioremap(&pdev->dev, |
322 | cf->phys_baseaddr + CF_IO_PHYS, SZ_2K); | |
ebe5cfb3 AV |
323 | if (!cf->socket.io_offset) { |
324 | status = -ENXIO; | |
54fe1591 | 325 | goto fail0a; |
ebe5cfb3 | 326 | } |
2c1f3b7a | 327 | |
40a0017e | 328 | /* reserve chip-select regions */ |
54fe1591 | 329 | if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) { |
ebe5cfb3 | 330 | status = -ENXIO; |
54fe1591 | 331 | goto fail0a; |
ebe5cfb3 | 332 | } |
2c1f3b7a | 333 | |
40ca0209 | 334 | dev_info(&pdev->dev, "irqs det #%d, io #%d\n", |
80af9e6d | 335 | gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin)); |
2c1f3b7a AV |
336 | |
337 | cf->socket.owner = THIS_MODULE; | |
e4a3c3f0 | 338 | cf->socket.dev.parent = &pdev->dev; |
2c1f3b7a AV |
339 | cf->socket.ops = &at91_cf_ops; |
340 | cf->socket.resource_ops = &pccard_static_ops; | |
341 | cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP | |
342 | | SS_CAP_MEM_ALIGN; | |
343 | cf->socket.map_size = SZ_2K; | |
2c536200 | 344 | cf->socket.io[0].res = io; |
2c1f3b7a AV |
345 | |
346 | status = pcmcia_register_socket(&cf->socket); | |
347 | if (status < 0) | |
54fe1591 | 348 | goto fail0a; |
2c1f3b7a AV |
349 | |
350 | return 0; | |
351 | ||
2c1f3b7a | 352 | fail0a: |
1fbece15 | 353 | device_init_wakeup(&pdev->dev, 0); |
2c1f3b7a AV |
354 | return status; |
355 | } | |
356 | ||
0db6095d | 357 | static int __exit at91_cf_remove(struct platform_device *pdev) |
2c1f3b7a | 358 | { |
0db6095d | 359 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); |
2c1f3b7a AV |
360 | |
361 | pcmcia_unregister_socket(&cf->socket); | |
0db6095d | 362 | device_init_wakeup(&pdev->dev, 0); |
54fe1591 | 363 | |
2c1f3b7a AV |
364 | return 0; |
365 | } | |
366 | ||
0db6095d DB |
367 | #ifdef CONFIG_PM |
368 | ||
369 | static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg) | |
370 | { | |
371 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); | |
372 | struct at91_cf_data *board = cf->board; | |
373 | ||
1fbece15 | 374 | if (device_may_wakeup(&pdev->dev)) { |
80af9e6d JE |
375 | enable_irq_wake(gpio_to_irq(board->det_pin)); |
376 | if (gpio_is_valid(board->irq_pin)) | |
377 | enable_irq_wake(gpio_to_irq(board->irq_pin)); | |
0db6095d | 378 | } |
0db6095d DB |
379 | return 0; |
380 | } | |
381 | ||
382 | static int at91_cf_resume(struct platform_device *pdev) | |
383 | { | |
9af20376 MP |
384 | struct at91_cf_socket *cf = platform_get_drvdata(pdev); |
385 | struct at91_cf_data *board = cf->board; | |
386 | ||
387 | if (device_may_wakeup(&pdev->dev)) { | |
80af9e6d JE |
388 | disable_irq_wake(gpio_to_irq(board->det_pin)); |
389 | if (gpio_is_valid(board->irq_pin)) | |
390 | disable_irq_wake(gpio_to_irq(board->irq_pin)); | |
9af20376 MP |
391 | } |
392 | ||
0db6095d DB |
393 | return 0; |
394 | } | |
395 | ||
396 | #else | |
397 | #define at91_cf_suspend NULL | |
398 | #define at91_cf_resume NULL | |
399 | #endif | |
400 | ||
401 | static struct platform_driver at91_cf_driver = { | |
402 | .driver = { | |
40ca0209 | 403 | .name = "at91_cf", |
0db6095d | 404 | .owner = THIS_MODULE, |
ed9084ec | 405 | .of_match_table = of_match_ptr(at91_cf_dt_ids), |
0db6095d | 406 | }, |
2c1f3b7a | 407 | .remove = __exit_p(at91_cf_remove), |
0db6095d DB |
408 | .suspend = at91_cf_suspend, |
409 | .resume = at91_cf_resume, | |
2c1f3b7a AV |
410 | }; |
411 | ||
412 | /*--------------------------------------------------------------------------*/ | |
413 | ||
43f50752 | 414 | module_platform_driver_probe(at91_cf_driver, at91_cf_probe); |
2c1f3b7a AV |
415 | |
416 | MODULE_DESCRIPTION("AT91 Compact Flash Driver"); | |
417 | MODULE_AUTHOR("David Brownell"); | |
418 | MODULE_LICENSE("GPL"); | |
12c2c019 | 419 | MODULE_ALIAS("platform:at91_cf"); |