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1da177e4 LT |
1 | /* |
2 | * cardbus.c -- 16-bit PCMCIA core support | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * The initial developer of the original code is David A. Hinds | |
9 | * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds | |
10 | * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. | |
11 | * | |
12 | * (C) 1999 David A. Hinds | |
13 | */ | |
14 | ||
15 | /* | |
16 | * Cardbus handling has been re-written to be more of a PCI bridge thing, | |
17 | * and the PCI code basically does all the resource handling. | |
18 | * | |
19 | * Linus, Jan 2000 | |
20 | */ | |
21 | ||
22 | ||
1da177e4 | 23 | #include <linux/kernel.h> |
57197b9b | 24 | #include <linux/module.h> |
1da177e4 | 25 | #include <linux/pci.h> |
1da177e4 | 26 | |
1da177e4 | 27 | #include <pcmcia/ss.h> |
1da177e4 | 28 | |
1da177e4 | 29 | |
15ea76d4 | 30 | static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq) |
1da177e4 LT |
31 | { |
32 | struct pci_dev *dev; | |
33 | ||
34 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
35 | u8 irq_pin; | |
36 | ||
15ea76d4 TH |
37 | /* |
38 | * Since there is only one interrupt available to | |
39 | * CardBus devices, all devices downstream of this | |
40 | * device must be using this IRQ. | |
41 | */ | |
1da177e4 LT |
42 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin); |
43 | if (irq_pin) { | |
44 | dev->irq = irq; | |
45 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | |
46 | } | |
47 | ||
15ea76d4 TH |
48 | /* |
49 | * Some controllers transfer very slowly with 0 CLS. | |
50 | * Configure it. This may fail as CLS configuration | |
51 | * is mandatory only for MWI. | |
52 | */ | |
53 | pci_set_cacheline_size(dev); | |
54 | ||
1da177e4 | 55 | if (dev->subordinate) |
15ea76d4 | 56 | cardbus_config_irq_and_cls(dev->subordinate, irq); |
1da177e4 LT |
57 | } |
58 | } | |
59 | ||
57197b9b DB |
60 | /** |
61 | * cb_alloc() - add CardBus device | |
62 | * @s: the pcmcia_socket where the CardBus device is located | |
63 | * | |
64 | * cb_alloc() allocates the kernel data structures for a Cardbus device | |
65 | * and handles the lowest level PCI device setup issues. | |
66 | */ | |
9fea84f4 | 67 | int __ref cb_alloc(struct pcmcia_socket *s) |
1da177e4 LT |
68 | { |
69 | struct pci_bus *bus = s->cb_dev->subordinate; | |
70 | struct pci_dev *dev; | |
71 | unsigned int max, pass; | |
72 | ||
73 | s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0)); | |
6e83ee07 | 74 | pci_fixup_cardbus(bus); |
1da177e4 LT |
75 | |
76 | max = bus->secondary; | |
77 | for (pass = 0; pass < 2; pass++) | |
78 | list_for_each_entry(dev, &bus->devices, bus_list) | |
79 | if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || | |
80 | dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) | |
81 | max = pci_scan_bridge(bus, dev, max, pass); | |
82 | ||
83 | /* | |
84 | * Size all resources below the CardBus controller. | |
85 | */ | |
86 | pci_bus_size_bridges(bus); | |
87 | pci_bus_assign_resources(bus); | |
15ea76d4 | 88 | cardbus_config_irq_and_cls(bus, s->pci_irq); |
8c3520d4 DR |
89 | |
90 | /* socket specific tune function */ | |
91 | if (s->tune_bridge) | |
92 | s->tune_bridge(s, bus); | |
93 | ||
1da177e4 LT |
94 | pci_enable_bridges(bus); |
95 | pci_bus_add_devices(bus); | |
96 | ||
4c89e88b | 97 | return 0; |
1da177e4 LT |
98 | } |
99 | ||
57197b9b DB |
100 | /** |
101 | * cb_free() - remove CardBus device | |
102 | * @s: the pcmcia_socket where the CardBus device was located | |
103 | * | |
104 | * cb_free() handles the lowest level PCI device cleanup. | |
105 | */ | |
9fea84f4 | 106 | void cb_free(struct pcmcia_socket *s) |
1da177e4 LT |
107 | { |
108 | struct pci_dev *bridge = s->cb_dev; | |
109 | ||
1da177e4 | 110 | if (bridge) |
6754b9e9 | 111 | pci_stop_and_remove_behind_bridge(bridge); |
1da177e4 | 112 | } |