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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Device driver for the PCMCIA controller module of the |
3 | * Hitachi HD64465 handheld companion chip. | |
4 | * | |
5 | * Note that the HD64465 provides a very thin PCMCIA host bridge | |
6 | * layer, requiring a lot of the work of supporting cards to be | |
7 | * performed by the processor. For example: mapping of card | |
8 | * interrupts to processor IRQs is done by IRQ demuxing software; | |
9 | * IO and memory mappings are fixed; setting voltages according | |
10 | * to card Voltage Select pins etc is done in software. | |
11 | * | |
12 | * Note also that this driver uses only the simple, fixed, | |
13 | * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the | |
14 | * HD64465. Larger mappings, smaller mappings, or mappings of | |
15 | * different width to the same socket, are all possible only by | |
16 | * involving the SH7750's MMU, which is considered unnecessary here. | |
17 | * The downside is that it may be possible for some drivers to | |
18 | * break because they need or expect 8-bit mappings. | |
19 | * | |
20 | * This driver currently supports only the following configuration: | |
21 | * SH7750 CPU, HD64465, TPS2206 voltage control chip. | |
22 | * | |
23 | * by Greg Banks <gbanks@pocketpenguins.com> | |
24 | * (c) 2000 PocketPenguins Inc | |
25 | */ | |
26 | ||
27 | #include <linux/types.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/string.h> | |
31 | #include <linux/kernel.h> | |
32 | #include <linux/ioport.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/vmalloc.h> | |
35 | #include <asm/errno.h> | |
36 | #include <linux/irq.h> | |
37 | #include <linux/interrupt.h> | |
d052d1be | 38 | #include <linux/platform_device.h> |
1da177e4 LT |
39 | |
40 | #include <asm/io.h> | |
41 | #include <asm/hd64465/hd64465.h> | |
42 | #include <asm/hd64465/io.h> | |
43 | ||
1da177e4 LT |
44 | #include <pcmcia/cs_types.h> |
45 | #include <pcmcia/cs.h> | |
46 | #include <pcmcia/cistpl.h> | |
47 | #include <pcmcia/ds.h> | |
48 | #include <pcmcia/ss.h> | |
1da177e4 LT |
49 | |
50 | #define MODNAME "hd64465_ss" | |
51 | ||
52 | /* #define HD64465_DEBUG 1 */ | |
53 | ||
54 | #if HD64465_DEBUG | |
55 | #define DPRINTK(args...) printk(MODNAME ": " args) | |
56 | #else | |
57 | #define DPRINTK(args...) | |
58 | #endif | |
59 | ||
60 | extern int hd64465_io_debug; | |
61 | extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags); | |
62 | extern void p3_iounmap(void *addr); | |
63 | ||
64 | /*============================================================*/ | |
65 | ||
66 | #define HS_IO_MAP_SIZE (64*1024) | |
67 | ||
68 | typedef struct hs_socket_t | |
69 | { | |
70 | unsigned int number; | |
71 | u_int irq; | |
72 | u_long mem_base; | |
73 | void *io_base; | |
74 | u_long mem_length; | |
75 | u_int ctrl_base; | |
76 | socket_state_t state; | |
77 | pccard_io_map io_maps[MAX_IO_WIN]; | |
78 | pccard_mem_map mem_maps[MAX_WIN]; | |
79 | struct pcmcia_socket socket; | |
80 | } hs_socket_t; | |
81 | ||
82 | ||
83 | ||
84 | #define HS_MAX_SOCKETS 2 | |
85 | static hs_socket_t hs_sockets[HS_MAX_SOCKETS]; | |
86 | ||
87 | #define hs_in(sp, r) inb((sp)->ctrl_base + (r)) | |
88 | #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r)) | |
89 | ||
90 | ||
91 | /* translate a boolean value to a bit in a register */ | |
92 | #define bool_to_regbit(sp, r, bi, bo) \ | |
93 | do { \ | |
94 | unsigned short v = hs_in(sp, r); \ | |
95 | if (bo) \ | |
96 | v |= (bi); \ | |
97 | else \ | |
98 | v &= ~(bi); \ | |
99 | hs_out(sp, v, r); \ | |
100 | } while(0) | |
101 | ||
102 | /* register offsets from HD64465_REG_PCC[01]ISR */ | |
103 | #define ISR 0x0 | |
104 | #define GCR 0x2 | |
105 | #define CSCR 0x4 | |
106 | #define CSCIER 0x6 | |
107 | #define SCR 0x8 | |
108 | ||
109 | ||
110 | /* Mask and values for CSCIER register */ | |
111 | #define IER_MASK 0x80 | |
112 | #define IER_ON 0x3f /* interrupts on */ | |
113 | #define IER_OFF 0x00 /* interrupts off */ | |
114 | ||
115 | /*============================================================*/ | |
116 | ||
117 | #if HD64465_DEBUG > 10 | |
118 | ||
119 | static void cis_hex_dump(const unsigned char *x, int len) | |
120 | { | |
121 | int i; | |
122 | ||
123 | for (i=0 ; i<len ; i++) | |
124 | { | |
125 | if (!(i & 0xf)) | |
126 | printk("\n%08x", (unsigned)(x + i)); | |
127 | printk(" %02x", *(volatile unsigned short*)x); | |
128 | x += 2; | |
129 | } | |
130 | printk("\n"); | |
131 | } | |
132 | ||
133 | #endif | |
134 | /*============================================================*/ | |
135 | ||
136 | /* | |
137 | * This code helps create the illusion that the IREQ line from | |
138 | * the PC card is mapped to one of the CPU's IRQ lines by the | |
139 | * host bridge hardware (which is how every host bridge *except* | |
140 | * the HD64465 works). In particular, it supports enabling | |
141 | * and disabling the IREQ line by code which knows nothing | |
142 | * about the host bridge (e.g. device drivers, IDE code) using | |
143 | * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off() | |
144 | * functions. Also, it supports sharing the mapped IRQ with | |
145 | * real hardware IRQs from the -IRL0-3 lines. | |
146 | */ | |
147 | ||
148 | #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */ | |
149 | static struct | |
150 | { | |
151 | /* index is mapped irq number */ | |
152 | hs_socket_t *sock; | |
153 | hw_irq_controller *old_handler; | |
154 | } hs_mapped_irq[HS_NUM_MAPPED_IRQS]; | |
155 | ||
156 | static void hs_socket_enable_ireq(hs_socket_t *sp) | |
157 | { | |
158 | unsigned short cscier; | |
159 | ||
160 | DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number); | |
161 | ||
162 | cscier = hs_in(sp, CSCIER); | |
163 | cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK; | |
164 | cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL; | |
165 | hs_out(sp, cscier, CSCIER); | |
166 | } | |
167 | ||
168 | static void hs_socket_disable_ireq(hs_socket_t *sp) | |
169 | { | |
170 | unsigned short cscier; | |
171 | ||
172 | DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number); | |
173 | ||
174 | cscier = hs_in(sp, CSCIER); | |
175 | cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK; | |
176 | hs_out(sp, cscier, CSCIER); | |
177 | } | |
178 | ||
179 | static unsigned int hs_startup_irq(unsigned int irq) | |
180 | { | |
181 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | |
182 | hs_mapped_irq[irq].old_handler->startup(irq); | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static void hs_shutdown_irq(unsigned int irq) | |
187 | { | |
188 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | |
189 | hs_mapped_irq[irq].old_handler->shutdown(irq); | |
190 | } | |
191 | ||
192 | static void hs_enable_irq(unsigned int irq) | |
193 | { | |
194 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | |
195 | hs_mapped_irq[irq].old_handler->enable(irq); | |
196 | } | |
197 | ||
198 | static void hs_disable_irq(unsigned int irq) | |
199 | { | |
200 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | |
201 | hs_mapped_irq[irq].old_handler->disable(irq); | |
202 | } | |
203 | ||
204 | extern struct hw_interrupt_type no_irq_type; | |
205 | ||
206 | static void hs_mask_and_ack_irq(unsigned int irq) | |
207 | { | |
208 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | |
209 | /* ack_none() spuriously complains about an unexpected IRQ */ | |
210 | if (hs_mapped_irq[irq].old_handler != &no_irq_type) | |
211 | hs_mapped_irq[irq].old_handler->ack(irq); | |
212 | } | |
213 | ||
214 | static void hs_end_irq(unsigned int irq) | |
215 | { | |
216 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | |
217 | hs_mapped_irq[irq].old_handler->end(irq); | |
218 | } | |
219 | ||
220 | ||
221 | static struct hw_interrupt_type hd64465_ss_irq_type = { | |
222 | .typename = "PCMCIA-IRQ", | |
223 | .startup = hs_startup_irq, | |
224 | .shutdown = hs_shutdown_irq, | |
225 | .enable = hs_enable_irq, | |
226 | .disable = hs_disable_irq, | |
227 | .ack = hs_mask_and_ack_irq, | |
228 | .end = hs_end_irq | |
229 | }; | |
230 | ||
231 | /* | |
232 | * This function should only ever be called with interrupts disabled. | |
233 | */ | |
234 | static void hs_map_irq(hs_socket_t *sp, unsigned int irq) | |
235 | { | |
08678b08 YL |
236 | struct irq_desc *desc; |
237 | ||
1da177e4 LT |
238 | DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq); |
239 | ||
240 | if (irq >= HS_NUM_MAPPED_IRQS) | |
241 | return; | |
242 | ||
08678b08 | 243 | desc = irq_to_desc(irq); |
1da177e4 LT |
244 | hs_mapped_irq[irq].sock = sp; |
245 | /* insert ourselves as the irq controller */ | |
08678b08 YL |
246 | hs_mapped_irq[irq].old_handler = desc->chip; |
247 | desc->chip = &hd64465_ss_irq_type; | |
1da177e4 LT |
248 | } |
249 | ||
250 | ||
251 | /* | |
252 | * This function should only ever be called with interrupts disabled. | |
253 | */ | |
254 | static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq) | |
255 | { | |
08678b08 YL |
256 | struct irq_desc *desc; |
257 | ||
1da177e4 LT |
258 | DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq); |
259 | ||
260 | if (irq >= HS_NUM_MAPPED_IRQS) | |
261 | return; | |
262 | ||
08678b08 | 263 | desc = irq_to_desc(irq); |
1da177e4 | 264 | /* restore the original irq controller */ |
08678b08 | 265 | desc->chip = hs_mapped_irq[irq].old_handler; |
1da177e4 LT |
266 | } |
267 | ||
268 | /*============================================================*/ | |
269 | ||
270 | ||
271 | /* | |
272 | * Set Vpp and Vcc (in tenths of a Volt). Does not | |
273 | * support the hi-Z state. | |
274 | * | |
275 | * Note, this assumes the board uses a TPS2206 chip to control | |
276 | * the Vcc and Vpp voltages to the hs_sockets. If your board | |
277 | * uses the MIC2563 (also supported by the HD64465) then you | |
278 | * will have to modify this function. | |
279 | */ | |
280 | /* 0V 3.3V 5.5V */ | |
281 | static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 }; | |
282 | static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 }; | |
283 | ||
284 | static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp) | |
285 | { | |
286 | u_int psr; | |
287 | u_int vcci = 0; | |
288 | u_int sock = sp->number; | |
289 | ||
290 | DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp); | |
291 | ||
292 | switch (Vcc) | |
293 | { | |
294 | case 0: vcci = 0; break; | |
295 | case 33: vcci = 1; break; | |
296 | case 50: vcci = 2; break; | |
297 | default: return 0; | |
298 | } | |
299 | ||
300 | /* Note: Vpp = 120 not supported -- Greg Banks */ | |
301 | if (Vpp != 0 && Vpp != Vcc) | |
302 | return 0; | |
303 | ||
304 | /* The PSR register holds 8 of the 9 bits which control | |
305 | * the TPS2206 via its serial interface. | |
306 | */ | |
307 | psr = inw(HD64465_REG_PCCPSR); | |
308 | switch (sock) | |
309 | { | |
310 | case 0: | |
311 | psr &= 0x0f; | |
312 | psr |= hs_tps2206_avcc[vcci]; | |
313 | psr |= (Vpp == 0 ? 0x00 : 0x02); | |
314 | break; | |
315 | case 1: | |
316 | psr &= 0xf0; | |
317 | psr |= hs_tps2206_bvcc[vcci]; | |
318 | psr |= (Vpp == 0 ? 0x00 : 0x20); | |
319 | break; | |
320 | }; | |
321 | outw(psr, HD64465_REG_PCCPSR); | |
322 | ||
323 | return 1; | |
324 | } | |
325 | ||
326 | ||
327 | /*============================================================*/ | |
328 | ||
329 | /* | |
330 | * Drive the RESET line to the card. | |
331 | */ | |
332 | static void hs_reset_socket(hs_socket_t *sp, int on) | |
333 | { | |
334 | unsigned short v; | |
335 | ||
336 | v = hs_in(sp, GCR); | |
337 | if (on) | |
338 | v |= HD64465_PCCGCR_PCCR; | |
339 | else | |
340 | v &= ~HD64465_PCCGCR_PCCR; | |
341 | hs_out(sp, v, GCR); | |
342 | } | |
343 | ||
344 | /*============================================================*/ | |
345 | ||
346 | static int hs_init(struct pcmcia_socket *s) | |
347 | { | |
348 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | |
349 | ||
350 | DPRINTK("hs_init(%d)\n", sp->number); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | /*============================================================*/ | |
356 | ||
357 | ||
358 | static int hs_get_status(struct pcmcia_socket *s, u_int *value) | |
359 | { | |
360 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | |
361 | unsigned int isr; | |
362 | u_int status = 0; | |
363 | ||
364 | ||
365 | isr = hs_in(sp, ISR); | |
366 | ||
367 | /* Card is seated and powered when *both* CD pins are low */ | |
368 | if ((isr & HD64465_PCCISR_PCD_MASK) == 0) | |
369 | { | |
370 | status |= SS_DETECT; /* card present */ | |
371 | ||
372 | switch (isr & HD64465_PCCISR_PBVD_MASK) | |
373 | { | |
374 | case HD64465_PCCISR_PBVD_BATGOOD: | |
375 | break; | |
376 | case HD64465_PCCISR_PBVD_BATWARN: | |
377 | status |= SS_BATWARN; | |
378 | break; | |
379 | default: | |
380 | status |= SS_BATDEAD; | |
381 | break; | |
382 | } | |
383 | ||
384 | if (isr & HD64465_PCCISR_PREADY) | |
385 | status |= SS_READY; | |
386 | ||
387 | if (isr & HD64465_PCCISR_PMWP) | |
388 | status |= SS_WRPROT; | |
389 | ||
390 | /* Voltage Select pins interpreted as per Table 4-5 of the std. | |
391 | * Assuming we have the TPS2206, the socket is a "Low Voltage | |
392 | * key, 3.3V and 5V available, no X.XV available". | |
393 | */ | |
394 | switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1)) | |
395 | { | |
396 | case HD64465_PCCISR_PVS1: | |
397 | printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n"); | |
398 | status = 0; | |
399 | break; | |
400 | case 0: | |
401 | case HD64465_PCCISR_PVS2: | |
402 | /* 3.3V */ | |
403 | status |= SS_3VCARD; | |
404 | break; | |
405 | case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1: | |
406 | /* 5V */ | |
407 | break; | |
408 | } | |
409 | ||
410 | /* TODO: SS_POWERON */ | |
411 | /* TODO: SS_STSCHG */ | |
412 | } | |
413 | ||
414 | DPRINTK("hs_get_status(%d) = %x\n", sock, status); | |
415 | ||
416 | *value = status; | |
417 | return 0; | |
418 | } | |
419 | ||
420 | /*============================================================*/ | |
421 | ||
1da177e4 LT |
422 | static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state) |
423 | { | |
424 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | |
425 | u_long flags; | |
426 | u_int changed; | |
427 | unsigned short cscier; | |
428 | ||
429 | DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n", | |
430 | sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq); | |
431 | ||
432 | local_irq_save(flags); /* Don't want interrupts happening here */ | |
433 | ||
434 | if (state->Vpp != sp->state.Vpp || | |
435 | state->Vcc != sp->state.Vcc) { | |
436 | if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) { | |
437 | local_irq_restore(flags); | |
438 | return -EINVAL; | |
439 | } | |
440 | } | |
441 | ||
442 | /* hd64465_io_debug = 1; */ | |
443 | /* | |
444 | * Handle changes in the Card Status Change mask, | |
445 | * by propagating to the CSCR register | |
446 | */ | |
447 | changed = sp->state.csc_mask ^ state->csc_mask; | |
448 | cscier = hs_in(sp, CSCIER); | |
449 | ||
450 | if (changed & SS_DETECT) { | |
451 | if (state->csc_mask & SS_DETECT) | |
452 | cscier |= HD64465_PCCCSCIER_PCDE; | |
453 | else | |
454 | cscier &= ~HD64465_PCCCSCIER_PCDE; | |
455 | } | |
456 | ||
457 | if (changed & SS_READY) { | |
458 | if (state->csc_mask & SS_READY) | |
459 | cscier |= HD64465_PCCCSCIER_PRE; | |
460 | else | |
461 | cscier &= ~HD64465_PCCCSCIER_PRE; | |
462 | } | |
463 | ||
464 | if (changed & SS_BATDEAD) { | |
465 | if (state->csc_mask & SS_BATDEAD) | |
466 | cscier |= HD64465_PCCCSCIER_PBDE; | |
467 | else | |
468 | cscier &= ~HD64465_PCCCSCIER_PBDE; | |
469 | } | |
470 | ||
471 | if (changed & SS_BATWARN) { | |
472 | if (state->csc_mask & SS_BATWARN) | |
473 | cscier |= HD64465_PCCCSCIER_PBWE; | |
474 | else | |
475 | cscier &= ~HD64465_PCCCSCIER_PBWE; | |
476 | } | |
477 | ||
478 | if (changed & SS_STSCHG) { | |
479 | if (state->csc_mask & SS_STSCHG) | |
480 | cscier |= HD64465_PCCCSCIER_PSCE; | |
481 | else | |
482 | cscier &= ~HD64465_PCCCSCIER_PSCE; | |
483 | } | |
484 | ||
485 | hs_out(sp, cscier, CSCIER); | |
486 | ||
487 | if (sp->state.io_irq && !state->io_irq) | |
488 | hs_unmap_irq(sp, sp->state.io_irq); | |
489 | else if (!sp->state.io_irq && state->io_irq) | |
490 | hs_map_irq(sp, state->io_irq); | |
491 | ||
492 | ||
493 | /* | |
494 | * Handle changes in the flags field, | |
495 | * by propagating to config registers. | |
496 | */ | |
497 | changed = sp->state.flags ^ state->flags; | |
498 | ||
499 | if (changed & SS_IOCARD) { | |
500 | DPRINTK("card type: %s\n", | |
501 | (state->flags & SS_IOCARD ? "i/o" : "memory" )); | |
502 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT, | |
503 | state->flags & SS_IOCARD); | |
504 | } | |
505 | ||
506 | if (changed & SS_RESET) { | |
507 | DPRINTK("%s reset card\n", | |
508 | (state->flags & SS_RESET ? "start" : "stop")); | |
509 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR, | |
510 | state->flags & SS_RESET); | |
511 | } | |
512 | ||
513 | if (changed & SS_OUTPUT_ENA) { | |
514 | DPRINTK("%sabling card output\n", | |
515 | (state->flags & SS_OUTPUT_ENA ? "en" : "dis")); | |
516 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV, | |
517 | state->flags & SS_OUTPUT_ENA); | |
518 | } | |
519 | ||
520 | /* TODO: SS_SPKR_ENA */ | |
521 | ||
522 | /* hd64465_io_debug = 0; */ | |
523 | sp->state = *state; | |
524 | ||
525 | local_irq_restore(flags); | |
526 | ||
527 | #if HD64465_DEBUG > 10 | |
528 | if (state->flags & SS_OUTPUT_ENA) | |
529 | cis_hex_dump((const unsigned char*)sp->mem_base, 0x100); | |
530 | #endif | |
531 | return 0; | |
532 | } | |
533 | ||
534 | /*============================================================*/ | |
535 | ||
536 | static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) | |
537 | { | |
538 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | |
539 | int map = io->map; | |
540 | int sock = sp->number; | |
541 | struct pccard_io_map *sio; | |
542 | pgprot_t prot; | |
543 | ||
544 | DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n", | |
545 | sock, map, io->flags, io->speed, io->start, io->stop); | |
546 | if (map >= MAX_IO_WIN) | |
547 | return -EINVAL; | |
548 | sio = &sp->io_maps[map]; | |
549 | ||
550 | /* check for null changes */ | |
551 | if (io->flags == sio->flags && | |
552 | io->start == sio->start && | |
553 | io->stop == sio->stop) | |
554 | return 0; | |
555 | ||
556 | if (io->flags & MAP_AUTOSZ) | |
557 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN); | |
558 | else if (io->flags & MAP_16BIT) | |
559 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16); | |
560 | else | |
561 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8); | |
562 | ||
563 | /* TODO: handle MAP_USE_WAIT */ | |
564 | if (io->flags & MAP_USE_WAIT) | |
565 | printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n"); | |
566 | /* TODO: handle MAP_PREFETCH */ | |
567 | if (io->flags & MAP_PREFETCH) | |
568 | printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n"); | |
569 | /* TODO: handle MAP_WRPROT */ | |
570 | if (io->flags & MAP_WRPROT) | |
571 | printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n"); | |
572 | /* TODO: handle MAP_0WS */ | |
573 | if (io->flags & MAP_0WS) | |
574 | printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n"); | |
575 | ||
576 | if (io->flags & MAP_ACTIVE) { | |
577 | unsigned long pstart, psize, paddrbase; | |
578 | ||
579 | paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW)); | |
580 | pstart = io->start & PAGE_MASK; | |
581 | psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart; | |
582 | ||
583 | /* | |
584 | * Change PTEs in only that portion of the mapping requested | |
585 | * by the caller. This means that most of the time, most of | |
586 | * the PTEs in the io_vma will be unmapped and only the bottom | |
587 | * page will be mapped. But the code allows for weird cards | |
588 | * that might want IO ports > 4K. | |
589 | */ | |
590 | sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot)); | |
591 | ||
592 | /* | |
593 | * Change the mapping used by inb() outb() etc | |
594 | */ | |
595 | hd64465_port_map(io->start, | |
596 | io->stop - io->start + 1, | |
597 | (unsigned long)sp->io_base + io->start, 0); | |
598 | } else { | |
599 | hd64465_port_unmap(sio->start, sio->stop - sio->start + 1); | |
600 | p3_iounmap(sp->io_base); | |
601 | } | |
602 | ||
603 | *sio = *io; | |
604 | return 0; | |
605 | } | |
606 | ||
607 | /*============================================================*/ | |
608 | ||
609 | static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) | |
610 | { | |
611 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | |
612 | struct pccard_mem_map *smem; | |
613 | int map = mem->map; | |
614 | unsigned long paddr; | |
615 | ||
616 | #if 0 | |
617 | DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n", | |
618 | sock, map, mem->flags, mem->card_start); | |
619 | #endif | |
620 | ||
621 | if (map >= MAX_WIN) | |
622 | return -EINVAL; | |
623 | smem = &sp->mem_maps[map]; | |
624 | ||
625 | paddr = sp->mem_base; /* base of Attribute mapping */ | |
626 | if (!(mem->flags & MAP_ATTRIB)) | |
627 | paddr += HD64465_PCC_WINDOW; /* base of Common mapping */ | |
628 | paddr += mem->card_start; | |
629 | ||
630 | /* Because we specified SS_CAP_STATIC_MAP, we are obliged | |
631 | * at this time to report the system address corresponding | |
632 | * to the card address requested. This is how Socket Services | |
633 | * queries our fixed mapping. I wish this fact had been | |
634 | * documented - Greg Banks. | |
635 | */ | |
636 | mem->static_start = paddr; | |
637 | ||
638 | *smem = *mem; | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
643 | /* TODO: do we need to use the MMU to access Common memory ??? */ | |
644 | ||
645 | /*============================================================*/ | |
646 | ||
647 | /* | |
648 | * This function is registered with the HD64465 glue code to do a | |
649 | * secondary demux step on the PCMCIA interrupts. It handles | |
650 | * mapping the IREQ request from the card to a standard Linux | |
651 | * IRQ, as requested by SocketServices. | |
652 | */ | |
653 | static int hs_irq_demux(int irq, void *dev) | |
654 | { | |
c7bec5ab | 655 | hs_socket_t *sp = dev; |
1da177e4 LT |
656 | u_int cscr; |
657 | ||
658 | DPRINTK("hs_irq_demux(irq=%d)\n", irq); | |
659 | ||
660 | if (sp->state.io_irq && | |
661 | (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) { | |
662 | cscr &= ~HD64465_PCCCSCR_PIREQ; | |
663 | hs_out(sp, cscr, CSCR); | |
664 | return sp->state.io_irq; | |
665 | } | |
666 | ||
667 | return irq; | |
668 | } | |
669 | ||
670 | /*============================================================*/ | |
671 | ||
672 | /* | |
673 | * Interrupt handling routine. | |
674 | */ | |
675 | ||
7d12e780 | 676 | static irqreturn_t hs_interrupt(int irq, void *dev) |
1da177e4 | 677 | { |
c7bec5ab | 678 | hs_socket_t *sp = dev; |
1da177e4 LT |
679 | u_int events = 0; |
680 | u_int cscr; | |
c7bec5ab | 681 | |
1da177e4 LT |
682 | cscr = hs_in(sp, CSCR); |
683 | ||
684 | DPRINTK("hs_interrupt, cscr=%04x\n", cscr); | |
685 | ||
686 | /* check for bus-related changes to be reported to Socket Services */ | |
687 | if (cscr & HD64465_PCCCSCR_PCDC) { | |
688 | /* double-check for a 16-bit card, as we don't support CardBus */ | |
689 | if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) { | |
690 | printk(KERN_NOTICE MODNAME | |
691 | ": socket %d, card not a supported card type or not inserted correctly\n", | |
692 | sp->number); | |
693 | /* Don't do the rest unless a card is present */ | |
694 | cscr &= ~(HD64465_PCCCSCR_PCDC| | |
695 | HD64465_PCCCSCR_PRC| | |
696 | HD64465_PCCCSCR_PBW| | |
697 | HD64465_PCCCSCR_PBD| | |
698 | HD64465_PCCCSCR_PSC); | |
699 | } else { | |
700 | cscr &= ~HD64465_PCCCSCR_PCDC; | |
701 | events |= SS_DETECT; /* card insertion or removal */ | |
702 | } | |
703 | } | |
704 | if (cscr & HD64465_PCCCSCR_PRC) { | |
705 | cscr &= ~HD64465_PCCCSCR_PRC; | |
706 | events |= SS_READY; /* ready signal changed */ | |
707 | } | |
708 | if (cscr & HD64465_PCCCSCR_PBW) { | |
709 | cscr &= ~HD64465_PCCCSCR_PSC; | |
710 | events |= SS_BATWARN; /* battery warning */ | |
711 | } | |
712 | if (cscr & HD64465_PCCCSCR_PBD) { | |
713 | cscr &= ~HD64465_PCCCSCR_PSC; | |
714 | events |= SS_BATDEAD; /* battery dead */ | |
715 | } | |
716 | if (cscr & HD64465_PCCCSCR_PSC) { | |
717 | cscr &= ~HD64465_PCCCSCR_PSC; | |
718 | events |= SS_STSCHG; /* STSCHG (status changed) signal */ | |
719 | } | |
720 | ||
721 | if (cscr & HD64465_PCCCSCR_PIREQ) { | |
722 | cscr &= ~HD64465_PCCCSCR_PIREQ; | |
723 | ||
724 | /* This should have been dealt with during irq demux */ | |
725 | printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n"); | |
726 | } | |
727 | ||
728 | hs_out(sp, cscr, CSCR); | |
729 | ||
730 | if (events) | |
731 | pcmcia_parse_events(&sp->socket, events); | |
732 | ||
733 | return IRQ_HANDLED; | |
734 | } | |
735 | ||
736 | /*============================================================*/ | |
737 | ||
738 | static struct pccard_operations hs_operations = { | |
739 | .init = hs_init, | |
740 | .get_status = hs_get_status, | |
1da177e4 LT |
741 | .set_socket = hs_set_socket, |
742 | .set_io_map = hs_set_io_map, | |
743 | .set_mem_map = hs_set_mem_map, | |
744 | }; | |
745 | ||
746 | static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base, | |
747 | unsigned int ctrl_base) | |
748 | { | |
749 | unsigned short v; | |
750 | int i, err; | |
751 | ||
752 | memset(sp, 0, sizeof(*sp)); | |
753 | sp->irq = irq; | |
754 | sp->mem_base = mem_base; | |
755 | sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */ | |
756 | sp->ctrl_base = ctrl_base; | |
757 | ||
758 | for (i=0 ; i<MAX_IO_WIN ; i++) | |
759 | sp->io_maps[i].map = i; | |
760 | for (i=0 ; i<MAX_WIN ; i++) | |
761 | sp->mem_maps[i].map = i; | |
762 | ||
763 | hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp); | |
764 | ||
dace1453 | 765 | if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0) |
1da177e4 LT |
766 | return err; |
767 | if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) { | |
768 | sp->mem_base = 0; | |
769 | return -ENOMEM; | |
770 | } | |
771 | ||
772 | ||
773 | /* According to section 3.2 of the PCMCIA standard, low-voltage | |
774 | * capable cards must implement cold insertion, i.e. Vpp and | |
775 | * Vcc set to 0 before card is inserted. | |
776 | */ | |
777 | /*hs_set_voltages(sp, 0, 0);*/ | |
778 | ||
779 | /* hi-Z the outputs to the card and set 16MB map mode */ | |
780 | v = hs_in(sp, GCR); | |
781 | v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */ | |
782 | hs_out(sp, v, GCR); | |
783 | ||
784 | v = hs_in(sp, GCR); | |
785 | v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */ | |
786 | hs_out(sp, v, GCR); | |
787 | ||
788 | v = hs_in(sp, GCR); | |
789 | v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */ | |
790 | hs_out(sp, v, GCR); | |
791 | ||
792 | v = hs_in(sp, GCR); | |
793 | /* lowest 16MB of Common */ | |
794 | v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24); | |
795 | hs_out(sp, v, GCR); | |
796 | ||
797 | hs_reset_socket(sp, 1); | |
798 | ||
799 | printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n", | |
800 | i, sp->mem_base, sp->irq); | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | static void hs_exit_socket(hs_socket_t *sp) | |
806 | { | |
807 | unsigned short cscier, gcr; | |
808 | unsigned long flags; | |
809 | ||
810 | local_irq_save(flags); | |
811 | ||
812 | /* turn off interrupts in hardware */ | |
813 | cscier = hs_in(sp, CSCIER); | |
814 | cscier = (cscier & IER_MASK) | IER_OFF; | |
815 | hs_out(sp, cscier, CSCIER); | |
816 | ||
817 | /* hi-Z the outputs to the card */ | |
818 | gcr = hs_in(sp, GCR); | |
819 | gcr &= HD64465_PCCGCR_PDRV; | |
820 | hs_out(sp, gcr, GCR); | |
821 | ||
822 | /* power the card down */ | |
823 | hs_set_voltages(sp, 0, 0); | |
824 | ||
825 | if (sp->mem_base != 0) | |
826 | release_mem_region(sp->mem_base, sp->mem_length); | |
827 | if (sp->irq != 0) { | |
828 | free_irq(sp->irq, hs_interrupt); | |
829 | hd64465_unregister_irq_demux(sp->irq); | |
830 | } | |
831 | ||
832 | local_irq_restore(flags); | |
833 | } | |
834 | ||
1da177e4 LT |
835 | static struct device_driver hd64465_driver = { |
836 | .name = "hd64465-pcmcia", | |
837 | .bus = &platform_bus_type, | |
9480e307 RK |
838 | .suspend = pcmcia_socket_dev_suspend, |
839 | .resume = pcmcia_socket_dev_resume, | |
1da177e4 LT |
840 | }; |
841 | ||
842 | static struct platform_device hd64465_device = { | |
843 | .name = "hd64465-pcmcia", | |
844 | .id = 0, | |
845 | }; | |
846 | ||
847 | static int __init init_hs(void) | |
848 | { | |
849 | int i; | |
850 | unsigned short v; | |
851 | ||
852 | /* hd64465_io_debug = 1; */ | |
853 | if (driver_register(&hd64465_driver)) | |
854 | return -EINVAL; | |
855 | ||
856 | /* Wake both sockets out of STANDBY mode */ | |
857 | /* TODO: wait 15ms */ | |
858 | v = inw(HD64465_REG_SMSCR); | |
859 | v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST); | |
860 | outw(v, HD64465_REG_SMSCR); | |
861 | ||
862 | /* keep power controller out of shutdown mode */ | |
863 | v = inb(HD64465_REG_PCC0SCR); | |
864 | v |= HD64465_PCCSCR_SHDN; | |
865 | outb(v, HD64465_REG_PCC0SCR); | |
866 | ||
867 | /* use serial (TPS2206) power controller */ | |
868 | v = inb(HD64465_REG_PCC0CSCR); | |
869 | v |= HD64465_PCCCSCR_PSWSEL; | |
870 | outb(v, HD64465_REG_PCC0CSCR); | |
871 | ||
872 | /* | |
873 | * Setup hs_sockets[] structures and request system resources. | |
874 | * TODO: on memory allocation failure, power down the socket | |
875 | * before quitting. | |
876 | */ | |
877 | for (i=0; i<HS_MAX_SOCKETS; i++) { | |
878 | hs_set_voltages(&hs_sockets[i], 0, 0); | |
879 | ||
880 | hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */ | |
881 | hs_sockets[i].socket.resource_ops = &pccard_static_ops; | |
882 | hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */ | |
883 | hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */ | |
884 | ||
885 | hs_sockets[i].socket.owner = THIS_MODULE; | |
886 | hs_sockets[i].socket.ss_entry = &hs_operations; | |
887 | } | |
888 | ||
889 | i = hs_init_socket(&hs_sockets[0], | |
890 | HD64465_IRQ_PCMCIA0, | |
891 | HD64465_PCC0_BASE, | |
892 | HD64465_REG_PCC0ISR); | |
893 | if (i < 0) { | |
894 | unregister_driver(&hd64465_driver); | |
895 | return i; | |
896 | } | |
897 | i = hs_init_socket(&hs_sockets[1], | |
898 | HD64465_IRQ_PCMCIA1, | |
899 | HD64465_PCC1_BASE, | |
900 | HD64465_REG_PCC1ISR); | |
901 | if (i < 0) { | |
902 | unregister_driver(&hd64465_driver); | |
903 | return i; | |
904 | } | |
905 | ||
906 | /* hd64465_io_debug = 0; */ | |
907 | ||
908 | platform_device_register(&hd64465_device); | |
909 | ||
910 | for (i=0; i<HS_MAX_SOCKETS; i++) { | |
911 | unsigned int ret; | |
dfe461ae | 912 | hs_sockets[i].socket.dev.parent = &hd64465_device.dev; |
1da177e4 LT |
913 | hs_sockets[i].number = i; |
914 | ret = pcmcia_register_socket(&hs_sockets[i].socket); | |
915 | if (ret && i) | |
916 | pcmcia_unregister_socket(&hs_sockets[0].socket); | |
917 | } | |
918 | ||
919 | return 0; | |
920 | } | |
921 | ||
922 | static void __exit exit_hs(void) | |
923 | { | |
924 | int i; | |
925 | ||
926 | for (i=0 ; i<HS_MAX_SOCKETS ; i++) { | |
927 | pcmcia_unregister_socket(&hs_sockets[i].socket); | |
928 | hs_exit_socket(&hs_sockets[i]); | |
929 | } | |
930 | ||
931 | platform_device_unregister(&hd64465_device); | |
932 | unregister_driver(&hd64465_driver); | |
933 | } | |
934 | ||
935 | module_init(init_hs); | |
936 | module_exit(exit_hs); | |
937 | ||
938 | /*============================================================*/ | |
939 | /*END*/ |