projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 1da177e4 LT |
2 | /* |
| 3 | * Copyright (C) 2001 by Hiroyuki Kondo | |
| 4 | */ | |
| 5 | ||
| 6 | #if !defined(CONFIG_M32R_CFC_NUM) | |
| 7 | #define M32R_MAX_PCC 2 | |
| 8 | #else | |
| 9 | #define M32R_MAX_PCC CONFIG_M32R_CFC_NUM | |
| 10 | #endif | |
| 11 | ||
| 12 | /* | |
| b595076a | 13 | * M32R PC Card Controller |
| 1da177e4 LT |
14 | */ |
| 15 | #define M32R_PCC0_BASE 0x00ef7000 | |
| 16 | #define M32R_PCC1_BASE 0x00ef7020 | |
| 17 | ||
| 18 | /* | |
| 19 | * Register offsets | |
| 20 | */ | |
| 21 | #define PCCR 0x00 | |
| 22 | #define PCADR 0x04 | |
| 23 | #define PCMOD 0x08 | |
| 24 | #define PCIRC 0x0c | |
| 25 | #define PCCSIGCR 0x10 | |
| 26 | #define PCATCR 0x14 | |
| 27 | ||
| 28 | /* | |
| 29 | * PCCR | |
| 30 | */ | |
| 31 | #define PCCR_PCEN (1UL<<(31-31)) | |
| 32 | ||
| 33 | /* | |
| 34 | * PCIRC | |
| 35 | */ | |
| 36 | #define PCIRC_BWERR (1UL<<(31-7)) | |
| 37 | #define PCIRC_CDIN1 (1UL<<(31-14)) | |
| 38 | #define PCIRC_CDIN2 (1UL<<(31-15)) | |
| 39 | #define PCIRC_BEIEN (1UL<<(31-23)) | |
| 40 | #define PCIRC_CIIEN (1UL<<(31-30)) | |
| 41 | #define PCIRC_COIEN (1UL<<(31-31)) | |
| 42 | ||
| 43 | /* | |
| 44 | * PCCSIGCR | |
| 45 | */ | |
| 46 | #define PCCSIGCR_SEN (1UL<<(31-3)) | |
| 47 | #define PCCSIGCR_VEN (1UL<<(31-7)) | |
| 48 | #define PCCSIGCR_CRST (1UL<<(31-15)) | |
| 49 | #define PCCSIGCR_COCR (1UL<<(31-31)) | |
| 50 | ||
| 51 | /* | |
| 52 | * | |
| 53 | */ | |
| 54 | #define PCMOD_AS_ATTRIB (1UL<<(31-19)) | |
| 55 | #define PCMOD_AS_IO (1UL<<(31-18)) | |
| 56 | ||
| 57 | #define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */ | |
| 58 | ||
| 59 | #define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */ | |
| 60 | ||
| 61 | /* | |
| 62 | * M32R PCC Map addr | |
| 63 | */ | |
| 64 | ||
| 65 | #define M32R_PCC0_MAPBASE 0x14000000 | |
| 66 | #define M32R_PCC1_MAPBASE 0x16000000 | |
| 67 | ||
| 68 | #define M32R_PCC_MAPMAX 0x02000000 | |
| 69 | ||
| 70 | #define M32R_PCC_MAPSIZE 0x00001000 /* XXX */ | |
| 71 | #define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1)) | |
| 72 | ||
| 73 | #define CFC_IOPORT_BASE 0x1000 | |
| 74 | ||
| 934bb7f8 HT |
75 | #if defined(CONFIG_PLAT_MAPPI3) |
| 76 | #define CFC_ATTR_MAPBASE 0x14014000 | |
| 77 | #define CFC_IO_MAPBASE_BYTE 0xb4012000 | |
| 78 | #define CFC_IO_MAPBASE_WORD 0xb4002000 | |
| 79 | #elif !defined(CONFIG_PLAT_USRV) | |
| 1da177e4 LT |
80 | #define CFC_ATTR_MAPBASE 0x0c014000 |
| 81 | #define CFC_IO_MAPBASE_BYTE 0xac012000 | |
| 82 | #define CFC_IO_MAPBASE_WORD 0xac002000 | |
| 934bb7f8 | 83 | #else |
| 1da177e4 LT |
84 | #define CFC_ATTR_MAPBASE 0x04014000 |
| 85 | #define CFC_IO_MAPBASE_BYTE 0xa4012000 | |
| 86 | #define CFC_IO_MAPBASE_WORD 0xa4002000 | |
| 87 | #endif /* CONFIG_PLAT_USRV */ | |
| 88 |