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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
f74e48a5 DB |
2 | /* |
3 | * omap_cf.c -- OMAP 16xx CompactFlash controller driver | |
4 | * | |
5 | * Copyright (c) 2005 David Brownell | |
f74e48a5 DB |
6 | */ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/kernel.h> | |
d052d1be | 10 | #include <linux/platform_device.h> |
f74e48a5 DB |
11 | #include <linux/errno.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/interrupt.h> | |
5a0e3ad6 | 15 | #include <linux/slab.h> |
f74e48a5 DB |
16 | |
17 | #include <pcmcia/ss.h> | |
18 | ||
a09e64fb | 19 | #include <mach/hardware.h> |
f74e48a5 | 20 | #include <asm/io.h> |
87dfb311 | 21 | #include <linux/sizes.h> |
f74e48a5 | 22 | |
70c494c3 | 23 | #include <mach/mux.h> |
54b693d4 | 24 | #include <mach/tc.h> |
f74e48a5 DB |
25 | |
26 | ||
27 | /* NOTE: don't expect this to support many I/O cards. The 16xx chips have | |
28 | * hard-wired timings to support Compact Flash memory cards; they won't work | |
29 | * with various other devices (like WLAN adapters) without some external | |
30 | * logic to help out. | |
31 | * | |
32 | * NOTE: CF controller docs disagree with address space docs as to where | |
33 | * CF_BASE really lives; this is a doc erratum. | |
34 | */ | |
35 | #define CF_BASE 0xfffe2800 | |
36 | ||
37 | /* status; read after IRQ */ | |
030b1545 | 38 | #define CF_STATUS (CF_BASE + 0x00) |
f74e48a5 DB |
39 | # define CF_STATUS_BAD_READ (1 << 2) |
40 | # define CF_STATUS_BAD_WRITE (1 << 1) | |
41 | # define CF_STATUS_CARD_DETECT (1 << 0) | |
42 | ||
43 | /* which chipselect (CS0..CS3) is used for CF (active low) */ | |
030b1545 | 44 | #define CF_CFG (CF_BASE + 0x02) |
f74e48a5 DB |
45 | |
46 | /* card reset */ | |
030b1545 | 47 | #define CF_CONTROL (CF_BASE + 0x04) |
f74e48a5 DB |
48 | # define CF_CONTROL_RESET (1 << 0) |
49 | ||
030b1545 | 50 | #define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT)) |
f74e48a5 DB |
51 | |
52 | /*--------------------------------------------------------------------------*/ | |
53 | ||
54 | static const char driver_name[] = "omap_cf"; | |
55 | ||
56 | struct omap_cf_socket { | |
57 | struct pcmcia_socket socket; | |
58 | ||
59 | struct timer_list timer; | |
60 | unsigned present:1; | |
61 | unsigned active:1; | |
62 | ||
63 | struct platform_device *pdev; | |
64 | unsigned long phys_cf; | |
65 | u_int irq; | |
dcb9c392 | 66 | struct resource iomem; |
f74e48a5 DB |
67 | }; |
68 | ||
69 | #define POLL_INTERVAL (2 * HZ) | |
70 | ||
f74e48a5 DB |
71 | /*--------------------------------------------------------------------------*/ |
72 | ||
73 | static int omap_cf_ss_init(struct pcmcia_socket *s) | |
74 | { | |
75 | return 0; | |
76 | } | |
77 | ||
78 | /* the timer is primarily to kick this socket's pccardd */ | |
41760d0e | 79 | static void omap_cf_timer(struct timer_list *t) |
f74e48a5 | 80 | { |
41760d0e | 81 | struct omap_cf_socket *cf = from_timer(cf, t, timer); |
f74e48a5 DB |
82 | unsigned present = omap_cf_present(); |
83 | ||
84 | if (present != cf->present) { | |
85 | cf->present = present; | |
86 | pr_debug("%s: card %s\n", driver_name, | |
87 | present ? "present" : "gone"); | |
88 | pcmcia_parse_events(&cf->socket, SS_DETECT); | |
89 | } | |
90 | ||
91 | if (cf->active) | |
92 | mod_timer(&cf->timer, jiffies + POLL_INTERVAL); | |
93 | } | |
94 | ||
95 | /* This irq handler prevents "irqNNN: nobody cared" messages as drivers | |
96 | * claim the card's IRQ. It may also detect some card insertions, but | |
97 | * not removals; it can't always eliminate timer irqs. | |
98 | */ | |
7d12e780 | 99 | static irqreturn_t omap_cf_irq(int irq, void *_cf) |
f74e48a5 | 100 | { |
439dc05f KC |
101 | struct omap_cf_socket *cf = (struct omap_cf_socket *)_cf; |
102 | ||
103 | omap_cf_timer(&cf->timer); | |
f74e48a5 DB |
104 | return IRQ_HANDLED; |
105 | } | |
106 | ||
107 | static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp) | |
108 | { | |
109 | if (!sp) | |
110 | return -EINVAL; | |
111 | ||
dcb9c392 | 112 | /* NOTE CF is always 3VCARD */ |
f74e48a5 DB |
113 | if (omap_cf_present()) { |
114 | struct omap_cf_socket *cf; | |
115 | ||
116 | *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD; | |
117 | cf = container_of(s, struct omap_cf_socket, socket); | |
6f840afb | 118 | s->pcmcia_irq = 0; |
dcb9c392 | 119 | s->pci_irq = cf->irq; |
f74e48a5 DB |
120 | } else |
121 | *sp = 0; | |
122 | return 0; | |
123 | } | |
124 | ||
125 | static int | |
126 | omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) | |
127 | { | |
128 | u16 control; | |
129 | ||
dcb9c392 | 130 | /* REVISIT some non-OSK boards may support power switching */ |
f74e48a5 DB |
131 | switch (s->Vcc) { |
132 | case 0: | |
133 | case 33: | |
134 | break; | |
135 | default: | |
136 | return -EINVAL; | |
137 | } | |
138 | ||
030b1545 | 139 | control = omap_readw(CF_CONTROL); |
f74e48a5 | 140 | if (s->flags & SS_RESET) |
030b1545 | 141 | omap_writew(CF_CONTROL_RESET, CF_CONTROL); |
f74e48a5 | 142 | else |
030b1545 | 143 | omap_writew(0, CF_CONTROL); |
f74e48a5 DB |
144 | |
145 | pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", | |
146 | driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static int omap_cf_ss_suspend(struct pcmcia_socket *s) | |
152 | { | |
2e11cb4c | 153 | pr_debug("%s: %s\n", driver_name, __func__); |
f74e48a5 DB |
154 | return omap_cf_set_socket(s, &dead_socket); |
155 | } | |
156 | ||
157 | /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */ | |
158 | ||
159 | static int | |
160 | omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) | |
161 | { | |
162 | struct omap_cf_socket *cf; | |
163 | ||
164 | cf = container_of(s, struct omap_cf_socket, socket); | |
165 | io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; | |
166 | io->start = cf->phys_cf + SZ_4K; | |
167 | io->stop = io->start + SZ_2K - 1; | |
168 | return 0; | |
169 | } | |
170 | ||
171 | static int | |
172 | omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map) | |
173 | { | |
174 | struct omap_cf_socket *cf; | |
175 | ||
176 | if (map->card_start) | |
177 | return -EINVAL; | |
178 | cf = container_of(s, struct omap_cf_socket, socket); | |
179 | map->static_start = cf->phys_cf; | |
180 | map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; | |
181 | if (map->flags & MAP_ATTRIB) | |
182 | map->static_start += SZ_2K; | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static struct pccard_operations omap_cf_ops = { | |
187 | .init = omap_cf_ss_init, | |
188 | .suspend = omap_cf_ss_suspend, | |
189 | .get_status = omap_cf_get_status, | |
190 | .set_socket = omap_cf_set_socket, | |
191 | .set_io_map = omap_cf_set_io_map, | |
192 | .set_mem_map = omap_cf_set_mem_map, | |
193 | }; | |
194 | ||
195 | /*--------------------------------------------------------------------------*/ | |
196 | ||
197 | /* | |
198 | * NOTE: right now the only board-specific platform_data is | |
199 | * "what chipselect is used". Boards could want more. | |
200 | */ | |
201 | ||
b6d2cccb | 202 | static int __init omap_cf_probe(struct platform_device *pdev) |
f74e48a5 DB |
203 | { |
204 | unsigned seg; | |
205 | struct omap_cf_socket *cf; | |
f74e48a5 DB |
206 | int irq; |
207 | int status; | |
208 | ||
b6d2cccb | 209 | seg = (int) pdev->dev.platform_data; |
f74e48a5 DB |
210 | if (seg == 0 || seg > 3) |
211 | return -ENODEV; | |
212 | ||
213 | /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */ | |
214 | irq = platform_get_irq(pdev, 0); | |
48944738 | 215 | if (irq < 0) |
f74e48a5 DB |
216 | return -EINVAL; |
217 | ||
cd861280 | 218 | cf = kzalloc(sizeof *cf, GFP_KERNEL); |
f74e48a5 DB |
219 | if (!cf) |
220 | return -ENOMEM; | |
41760d0e | 221 | timer_setup(&cf->timer, omap_cf_timer, 0); |
f74e48a5 DB |
222 | |
223 | cf->pdev = pdev; | |
b6d2cccb | 224 | platform_set_drvdata(pdev, cf); |
f74e48a5 DB |
225 | |
226 | /* this primarily just shuts up irq handling noise */ | |
dace1453 | 227 | status = request_irq(irq, omap_cf_irq, IRQF_SHARED, |
f74e48a5 DB |
228 | driver_name, cf); |
229 | if (status < 0) | |
230 | goto fail0; | |
231 | cf->irq = irq; | |
232 | cf->socket.pci_irq = irq; | |
233 | ||
234 | switch (seg) { | |
235 | /* NOTE: CS0 could be configured too ... */ | |
236 | case 1: | |
237 | cf->phys_cf = OMAP_CS1_PHYS; | |
238 | break; | |
239 | case 2: | |
240 | cf->phys_cf = OMAP_CS2_PHYS; | |
241 | break; | |
242 | case 3: | |
243 | cf->phys_cf = omap_cs3_phys(); | |
244 | break; | |
245 | default: | |
246 | goto fail1; | |
247 | } | |
dcb9c392 DB |
248 | cf->iomem.start = cf->phys_cf; |
249 | cf->iomem.end = cf->iomem.end + SZ_8K - 1; | |
250 | cf->iomem.flags = IORESOURCE_MEM; | |
f74e48a5 DB |
251 | |
252 | /* pcmcia layer only remaps "real" memory */ | |
253 | cf->socket.io_offset = (unsigned long) | |
254 | ioremap(cf->phys_cf + SZ_4K, SZ_2K); | |
255 | if (!cf->socket.io_offset) | |
256 | goto fail1; | |
257 | ||
258 | if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) | |
259 | goto fail1; | |
260 | ||
261 | /* NOTE: CF conflicts with MMC1 */ | |
262 | omap_cfg_reg(W11_1610_CF_CD1); | |
263 | omap_cfg_reg(P11_1610_CF_CD2); | |
264 | omap_cfg_reg(R11_1610_CF_IOIS16); | |
265 | omap_cfg_reg(V10_1610_CF_IREQ); | |
266 | omap_cfg_reg(W10_1610_CF_RESET); | |
267 | ||
030b1545 | 268 | omap_writew(~(1 << seg), CF_CFG); |
f74e48a5 DB |
269 | |
270 | pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); | |
271 | ||
272 | /* NOTE: better EMIFS setup might support more cards; but the | |
273 | * TRM only shows how to affect regular flash signals, not their | |
274 | * CF/PCMCIA variants... | |
275 | */ | |
276 | pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, | |
030b1545 TL |
277 | seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); |
278 | omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ | |
279 | omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ | |
f74e48a5 DB |
280 | |
281 | /* CF uses armxor_ck, which is "always" available */ | |
282 | ||
283 | pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, | |
030b1545 TL |
284 | omap_readw(CF_STATUS), omap_readw(CF_CFG), |
285 | omap_readw(CF_CONTROL), | |
f74e48a5 DB |
286 | omap_cf_present() ? "present" : "(not present)"); |
287 | ||
288 | cf->socket.owner = THIS_MODULE; | |
b6d2cccb | 289 | cf->socket.dev.parent = &pdev->dev; |
f74e48a5 DB |
290 | cf->socket.ops = &omap_cf_ops; |
291 | cf->socket.resource_ops = &pccard_static_ops; | |
292 | cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP | |
293 | | SS_CAP_MEM_ALIGN; | |
294 | cf->socket.map_size = SZ_2K; | |
dcb9c392 | 295 | cf->socket.io[0].res = &cf->iomem; |
f74e48a5 DB |
296 | |
297 | status = pcmcia_register_socket(&cf->socket); | |
298 | if (status < 0) | |
299 | goto fail2; | |
300 | ||
301 | cf->active = 1; | |
302 | mod_timer(&cf->timer, jiffies + POLL_INTERVAL); | |
303 | return 0; | |
304 | ||
305 | fail2: | |
f74e48a5 DB |
306 | release_mem_region(cf->phys_cf, SZ_8K); |
307 | fail1: | |
3efa9970 AL |
308 | if (cf->socket.io_offset) |
309 | iounmap((void __iomem *) cf->socket.io_offset); | |
f74e48a5 DB |
310 | free_irq(irq, cf); |
311 | fail0: | |
312 | kfree(cf); | |
313 | return status; | |
314 | } | |
315 | ||
b6d2cccb | 316 | static int __exit omap_cf_remove(struct platform_device *pdev) |
f74e48a5 | 317 | { |
b6d2cccb | 318 | struct omap_cf_socket *cf = platform_get_drvdata(pdev); |
f74e48a5 DB |
319 | |
320 | cf->active = 0; | |
321 | pcmcia_unregister_socket(&cf->socket); | |
322 | del_timer_sync(&cf->timer); | |
323 | iounmap((void __iomem *) cf->socket.io_offset); | |
324 | release_mem_region(cf->phys_cf, SZ_8K); | |
325 | free_irq(cf->irq, cf); | |
326 | kfree(cf); | |
327 | return 0; | |
328 | } | |
329 | ||
b6d2cccb DB |
330 | static struct platform_driver omap_cf_driver = { |
331 | .driver = { | |
332 | .name = (char *) driver_name, | |
333 | }, | |
334 | .remove = __exit_p(omap_cf_remove), | |
f74e48a5 DB |
335 | }; |
336 | ||
337 | static int __init omap_cf_init(void) | |
338 | { | |
339 | if (cpu_is_omap16xx()) | |
b6d2cccb | 340 | return platform_driver_probe(&omap_cf_driver, omap_cf_probe); |
dcb9c392 | 341 | return -ENODEV; |
f74e48a5 DB |
342 | } |
343 | ||
344 | static void __exit omap_cf_exit(void) | |
345 | { | |
346 | if (cpu_is_omap16xx()) | |
b6d2cccb | 347 | platform_driver_unregister(&omap_cf_driver); |
f74e48a5 DB |
348 | } |
349 | ||
350 | module_init(omap_cf_init); | |
351 | module_exit(omap_cf_exit); | |
352 | ||
353 | MODULE_DESCRIPTION("OMAP CF Driver"); | |
354 | MODULE_LICENSE("GPL"); | |
12c2c019 | 355 | MODULE_ALIAS("platform:omap_cf"); |