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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. | |
3 | * | |
4 | * Based on the i82092.c driver. | |
5 | * | |
6 | * This software may be used and distributed according to the terms of | |
7 | * the GNU General Public License, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
1da177e4 | 11 | #include <linux/module.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
1da177e4 LT |
13 | #include <linux/pci.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/workqueue.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/device.h> | |
5cbb2b94 | 18 | #include <linux/io.h> |
1da177e4 LT |
19 | |
20 | #include <pcmcia/cs_types.h> | |
21 | #include <pcmcia/ss.h> | |
22 | #include <pcmcia/cs.h> | |
23 | ||
24 | #include <asm/system.h> | |
1da177e4 LT |
25 | |
26 | #include "pd6729.h" | |
27 | #include "i82365.h" | |
28 | #include "cirrus.h" | |
29 | ||
30 | MODULE_LICENSE("GPL"); | |
31 | MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); | |
32 | MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); | |
33 | ||
34 | #define MAX_SOCKETS 2 | |
35 | ||
36 | /* | |
37 | * simple helper functions | |
38 | * External clock time, in nanoseconds. 120 ns = 8.33 MHz | |
39 | */ | |
40 | #define to_cycles(ns) ((ns)/120) | |
41 | ||
42 | #ifndef NO_IRQ | |
43 | #define NO_IRQ ((unsigned int)(0)) | |
44 | #endif | |
45 | ||
46 | /* | |
47 | * PARAMETERS | |
48 | * irq_mode=n | |
49 | * Specifies the interrupt delivery mode. The default (1) is to use PCI | |
50 | * interrupts; a value of 0 selects ISA interrupts. This must be set for | |
51 | * correct operation of PCI card readers. | |
1da177e4 LT |
52 | */ |
53 | ||
54 | static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ | |
1da177e4 LT |
55 | |
56 | module_param(irq_mode, int, 0444); | |
1da177e4 LT |
57 | MODULE_PARM_DESC(irq_mode, |
58 | "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); | |
1da177e4 LT |
59 | |
60 | static DEFINE_SPINLOCK(port_lock); | |
61 | ||
62 | /* basic value read/write functions */ | |
63 | ||
64 | static unsigned char indirect_read(struct pd6729_socket *socket, | |
65 | unsigned short reg) | |
66 | { | |
67 | unsigned long port; | |
68 | unsigned char val; | |
69 | unsigned long flags; | |
70 | ||
71 | spin_lock_irqsave(&port_lock, flags); | |
72 | reg += socket->number * 0x40; | |
73 | port = socket->io_base; | |
74 | outb(reg, port); | |
75 | val = inb(port + 1); | |
76 | spin_unlock_irqrestore(&port_lock, flags); | |
77 | ||
78 | return val; | |
79 | } | |
80 | ||
81 | static unsigned short indirect_read16(struct pd6729_socket *socket, | |
82 | unsigned short reg) | |
83 | { | |
84 | unsigned long port; | |
85 | unsigned short tmp; | |
86 | unsigned long flags; | |
87 | ||
88 | spin_lock_irqsave(&port_lock, flags); | |
89 | reg = reg + socket->number * 0x40; | |
90 | port = socket->io_base; | |
91 | outb(reg, port); | |
92 | tmp = inb(port + 1); | |
93 | reg++; | |
94 | outb(reg, port); | |
95 | tmp = tmp | (inb(port + 1) << 8); | |
96 | spin_unlock_irqrestore(&port_lock, flags); | |
97 | ||
98 | return tmp; | |
99 | } | |
100 | ||
101 | static void indirect_write(struct pd6729_socket *socket, unsigned short reg, | |
102 | unsigned char value) | |
103 | { | |
104 | unsigned long port; | |
105 | unsigned long flags; | |
106 | ||
107 | spin_lock_irqsave(&port_lock, flags); | |
108 | reg = reg + socket->number * 0x40; | |
109 | port = socket->io_base; | |
110 | outb(reg, port); | |
111 | outb(value, port + 1); | |
112 | spin_unlock_irqrestore(&port_lock, flags); | |
113 | } | |
114 | ||
115 | static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg, | |
116 | unsigned char mask) | |
117 | { | |
118 | unsigned long port; | |
119 | unsigned char val; | |
120 | unsigned long flags; | |
121 | ||
122 | spin_lock_irqsave(&port_lock, flags); | |
123 | reg = reg + socket->number * 0x40; | |
124 | port = socket->io_base; | |
125 | outb(reg, port); | |
126 | val = inb(port + 1); | |
127 | val |= mask; | |
128 | outb(reg, port); | |
129 | outb(val, port + 1); | |
130 | spin_unlock_irqrestore(&port_lock, flags); | |
131 | } | |
132 | ||
133 | static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg, | |
134 | unsigned char mask) | |
135 | { | |
136 | unsigned long port; | |
137 | unsigned char val; | |
138 | unsigned long flags; | |
139 | ||
140 | spin_lock_irqsave(&port_lock, flags); | |
141 | reg = reg + socket->number * 0x40; | |
142 | port = socket->io_base; | |
143 | outb(reg, port); | |
144 | val = inb(port + 1); | |
145 | val &= ~mask; | |
146 | outb(reg, port); | |
147 | outb(val, port + 1); | |
148 | spin_unlock_irqrestore(&port_lock, flags); | |
149 | } | |
150 | ||
151 | static void indirect_write16(struct pd6729_socket *socket, unsigned short reg, | |
152 | unsigned short value) | |
153 | { | |
154 | unsigned long port; | |
155 | unsigned char val; | |
156 | unsigned long flags; | |
157 | ||
158 | spin_lock_irqsave(&port_lock, flags); | |
159 | reg = reg + socket->number * 0x40; | |
160 | port = socket->io_base; | |
161 | ||
162 | outb(reg, port); | |
163 | val = value & 255; | |
164 | outb(val, port + 1); | |
165 | ||
166 | reg++; | |
167 | ||
168 | outb(reg, port); | |
169 | val = value >> 8; | |
170 | outb(val, port + 1); | |
171 | spin_unlock_irqrestore(&port_lock, flags); | |
172 | } | |
173 | ||
174 | /* Interrupt handler functionality */ | |
175 | ||
7d12e780 | 176 | static irqreturn_t pd6729_interrupt(int irq, void *dev) |
1da177e4 LT |
177 | { |
178 | struct pd6729_socket *socket = (struct pd6729_socket *)dev; | |
179 | int i; | |
180 | int loopcount = 0; | |
181 | int handled = 0; | |
182 | unsigned int events, active = 0; | |
183 | ||
184 | while (1) { | |
185 | loopcount++; | |
186 | if (loopcount > 20) { | |
187 | printk(KERN_ERR "pd6729: infinite eventloop " | |
188 | "in interrupt\n"); | |
189 | break; | |
190 | } | |
191 | ||
192 | active = 0; | |
193 | ||
194 | for (i = 0; i < MAX_SOCKETS; i++) { | |
195 | unsigned int csc; | |
196 | ||
197 | /* card status change register */ | |
198 | csc = indirect_read(&socket[i], I365_CSC); | |
199 | if (csc == 0) /* no events on this socket */ | |
200 | continue; | |
201 | ||
202 | handled = 1; | |
203 | events = 0; | |
204 | ||
205 | if (csc & I365_CSC_DETECT) { | |
206 | events |= SS_DETECT; | |
a7149f9a DB |
207 | dev_vdbg(&socket[i].socket.dev, |
208 | "Card detected in socket %i!\n", i); | |
1da177e4 LT |
209 | } |
210 | ||
211 | if (indirect_read(&socket[i], I365_INTCTL) | |
212 | & I365_PC_IOCARD) { | |
213 | /* For IO/CARDS, bit 0 means "read the card" */ | |
214 | events |= (csc & I365_CSC_STSCHG) | |
215 | ? SS_STSCHG : 0; | |
216 | } else { | |
217 | /* Check for battery/ready events */ | |
218 | events |= (csc & I365_CSC_BVD1) | |
219 | ? SS_BATDEAD : 0; | |
220 | events |= (csc & I365_CSC_BVD2) | |
221 | ? SS_BATWARN : 0; | |
222 | events |= (csc & I365_CSC_READY) | |
223 | ? SS_READY : 0; | |
224 | } | |
225 | ||
5cbb2b94 | 226 | if (events) |
1da177e4 | 227 | pcmcia_parse_events(&socket[i].socket, events); |
5cbb2b94 | 228 | |
1da177e4 LT |
229 | active |= events; |
230 | } | |
231 | ||
232 | if (active == 0) /* no more events to handle */ | |
233 | break; | |
234 | } | |
235 | return IRQ_RETVAL(handled); | |
236 | } | |
237 | ||
238 | /* socket functions */ | |
239 | ||
240 | static void pd6729_interrupt_wrapper(unsigned long data) | |
241 | { | |
242 | struct pd6729_socket *socket = (struct pd6729_socket *) data; | |
243 | ||
7d12e780 | 244 | pd6729_interrupt(0, (void *)socket); |
1da177e4 LT |
245 | mod_timer(&socket->poll_timer, jiffies + HZ); |
246 | } | |
247 | ||
248 | static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value) | |
249 | { | |
250 | struct pd6729_socket *socket | |
251 | = container_of(sock, struct pd6729_socket, socket); | |
252 | unsigned int status; | |
253 | unsigned int data; | |
254 | struct pd6729_socket *t; | |
255 | ||
256 | /* Interface Status Register */ | |
257 | status = indirect_read(socket, I365_STATUS); | |
258 | *value = 0; | |
259 | ||
5cbb2b94 | 260 | if ((status & I365_CS_DETECT) == I365_CS_DETECT) |
1da177e4 | 261 | *value |= SS_DETECT; |
1da177e4 LT |
262 | |
263 | /* | |
264 | * IO cards have a different meaning of bits 0,1 | |
265 | * Also notice the inverse-logic on the bits | |
266 | */ | |
267 | if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
268 | /* IO card */ | |
269 | if (!(status & I365_CS_STSCHG)) | |
270 | *value |= SS_STSCHG; | |
271 | } else { | |
272 | /* non I/O card */ | |
273 | if (!(status & I365_CS_BVD1)) | |
274 | *value |= SS_BATDEAD; | |
275 | if (!(status & I365_CS_BVD2)) | |
276 | *value |= SS_BATWARN; | |
277 | } | |
278 | ||
279 | if (status & I365_CS_WRPROT) | |
280 | *value |= SS_WRPROT; /* card is write protected */ | |
281 | ||
282 | if (status & I365_CS_READY) | |
283 | *value |= SS_READY; /* card is not busy */ | |
284 | ||
285 | if (status & I365_CS_POWERON) | |
286 | *value |= SS_POWERON; /* power is applied to the card */ | |
287 | ||
288 | t = (socket->number) ? socket : socket + 1; | |
289 | indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA); | |
290 | data = indirect_read16(t, PD67_EXT_DATA); | |
291 | *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD; | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
296 | ||
1da177e4 LT |
297 | static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state) |
298 | { | |
299 | struct pd6729_socket *socket | |
300 | = container_of(sock, struct pd6729_socket, socket); | |
301 | unsigned char reg, data; | |
302 | ||
303 | /* First, set the global controller options */ | |
304 | indirect_write(socket, I365_GBLCTL, 0x00); | |
305 | indirect_write(socket, I365_GENCTL, 0x00); | |
306 | ||
307 | /* Values for the IGENC register */ | |
308 | socket->card_irq = state->io_irq; | |
309 | ||
310 | reg = 0; | |
5cbb2b94 | 311 | /* The reset bit has "inverse" logic */ |
1da177e4 LT |
312 | if (!(state->flags & SS_RESET)) |
313 | reg |= I365_PC_RESET; | |
314 | if (state->flags & SS_IOCARD) | |
315 | reg |= I365_PC_IOCARD; | |
316 | ||
317 | /* IGENC, Interrupt and General Control Register */ | |
318 | indirect_write(socket, I365_INTCTL, reg); | |
319 | ||
320 | /* Power registers */ | |
321 | ||
322 | reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ | |
323 | ||
324 | if (state->flags & SS_PWR_AUTO) { | |
a7149f9a | 325 | dev_dbg(&sock->dev, "Auto power\n"); |
1da177e4 LT |
326 | reg |= I365_PWR_AUTO; /* automatic power mngmnt */ |
327 | } | |
328 | if (state->flags & SS_OUTPUT_ENA) { | |
a7149f9a | 329 | dev_dbg(&sock->dev, "Power Enabled\n"); |
1da177e4 LT |
330 | reg |= I365_PWR_OUT; /* enable power */ |
331 | } | |
332 | ||
333 | switch (state->Vcc) { | |
334 | case 0: | |
335 | break; | |
336 | case 33: | |
a7149f9a DB |
337 | dev_dbg(&sock->dev, |
338 | "setting voltage to Vcc to 3.3V on socket %i\n", | |
1da177e4 LT |
339 | socket->number); |
340 | reg |= I365_VCC_5V; | |
341 | indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
342 | break; | |
343 | case 50: | |
a7149f9a DB |
344 | dev_dbg(&sock->dev, |
345 | "setting voltage to Vcc to 5V on socket %i\n", | |
1da177e4 LT |
346 | socket->number); |
347 | reg |= I365_VCC_5V; | |
348 | indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
349 | break; | |
350 | default: | |
a7149f9a DB |
351 | dev_dbg(&sock->dev, |
352 | "pd6729_set_socket called with invalid VCC power " | |
353 | "value: %i\n", state->Vcc); | |
1da177e4 LT |
354 | return -EINVAL; |
355 | } | |
356 | ||
357 | switch (state->Vpp) { | |
358 | case 0: | |
a7149f9a DB |
359 | dev_dbg(&sock->dev, "not setting Vpp on socket %i\n", |
360 | socket->number); | |
1da177e4 LT |
361 | break; |
362 | case 33: | |
363 | case 50: | |
a7149f9a DB |
364 | dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n", |
365 | socket->number); | |
1da177e4 LT |
366 | reg |= I365_VPP1_5V; |
367 | break; | |
368 | case 120: | |
a7149f9a | 369 | dev_dbg(&sock->dev, "setting Vpp to 12.0\n"); |
1da177e4 LT |
370 | reg |= I365_VPP1_12V; |
371 | break; | |
372 | default: | |
a7149f9a DB |
373 | dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with " |
374 | "invalid VPP power value: %i\n", state->Vpp); | |
1da177e4 LT |
375 | return -EINVAL; |
376 | } | |
377 | ||
378 | /* only write if changed */ | |
379 | if (reg != indirect_read(socket, I365_POWER)) | |
380 | indirect_write(socket, I365_POWER, reg); | |
381 | ||
382 | if (irq_mode == 1) { | |
5cbb2b94 | 383 | /* all interrupts are to be done as PCI interrupts */ |
1da177e4 LT |
384 | data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ; |
385 | } else | |
386 | data = 0; | |
387 | ||
388 | indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1); | |
389 | indirect_write(socket, PD67_EXT_DATA, data); | |
390 | ||
391 | /* Enable specific interrupt events */ | |
392 | ||
393 | reg = 0x00; | |
5cbb2b94 | 394 | if (state->csc_mask & SS_DETECT) |
1da177e4 | 395 | reg |= I365_CSC_DETECT; |
5cbb2b94 | 396 | |
1da177e4 LT |
397 | if (state->flags & SS_IOCARD) { |
398 | if (state->csc_mask & SS_STSCHG) | |
399 | reg |= I365_CSC_STSCHG; | |
400 | } else { | |
401 | if (state->csc_mask & SS_BATDEAD) | |
402 | reg |= I365_CSC_BVD1; | |
403 | if (state->csc_mask & SS_BATWARN) | |
404 | reg |= I365_CSC_BVD2; | |
405 | if (state->csc_mask & SS_READY) | |
406 | reg |= I365_CSC_READY; | |
407 | } | |
408 | if (irq_mode == 1) | |
409 | reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */ | |
410 | indirect_write(socket, I365_CSCINT, reg); | |
411 | ||
412 | reg = indirect_read(socket, I365_INTCTL); | |
413 | if (irq_mode == 1) | |
414 | reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */ | |
415 | else | |
416 | reg |= socket->card_irq; | |
417 | indirect_write(socket, I365_INTCTL, reg); | |
418 | ||
419 | /* now clear the (probably bogus) pending stuff by doing a dummy read */ | |
420 | (void)indirect_read(socket, I365_CSC); | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
425 | static int pd6729_set_io_map(struct pcmcia_socket *sock, | |
426 | struct pccard_io_map *io) | |
427 | { | |
428 | struct pd6729_socket *socket | |
429 | = container_of(sock, struct pd6729_socket, socket); | |
430 | unsigned char map, ioctl; | |
431 | ||
432 | map = io->map; | |
433 | ||
434 | /* Check error conditions */ | |
435 | if (map > 1) { | |
a7149f9a | 436 | dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n"); |
1da177e4 LT |
437 | return -EINVAL; |
438 | } | |
439 | ||
440 | /* Turn off the window before changing anything */ | |
441 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map)) | |
442 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
443 | ||
a7149f9a | 444 | /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n", |
1da177e4 LT |
445 | io->start, io->stop);*/ |
446 | ||
447 | /* write the new values */ | |
448 | indirect_write16(socket, I365_IO(map)+I365_W_START, io->start); | |
449 | indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
450 | ||
451 | ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
452 | ||
5cbb2b94 K |
453 | if (io->flags & MAP_0WS) |
454 | ioctl |= I365_IOCTL_0WS(map); | |
455 | if (io->flags & MAP_16BIT) | |
456 | ioctl |= I365_IOCTL_16BIT(map); | |
457 | if (io->flags & MAP_AUTOSZ) | |
458 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
459 | |
460 | indirect_write(socket, I365_IOCTL, ioctl); | |
461 | ||
462 | /* Turn the window back on if needed */ | |
463 | if (io->flags & MAP_ACTIVE) | |
464 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
469 | static int pd6729_set_mem_map(struct pcmcia_socket *sock, | |
470 | struct pccard_mem_map *mem) | |
471 | { | |
472 | struct pd6729_socket *socket | |
473 | = container_of(sock, struct pd6729_socket, socket); | |
474 | unsigned short base, i; | |
475 | unsigned char map; | |
476 | ||
477 | map = mem->map; | |
478 | if (map > 4) { | |
a7149f9a | 479 | dev_warn(&sock->dev, "invalid map requested\n"); |
1da177e4 LT |
480 | return -EINVAL; |
481 | } | |
482 | ||
483 | if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) { | |
a7149f9a | 484 | dev_warn(&sock->dev, "invalid invalid address / speed\n"); |
1da177e4 LT |
485 | return -EINVAL; |
486 | } | |
487 | ||
488 | /* Turn off the window before changing anything */ | |
489 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map)) | |
490 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
491 | ||
492 | /* write the start address */ | |
493 | base = I365_MEM(map); | |
494 | i = (mem->res->start >> 12) & 0x0fff; | |
495 | if (mem->flags & MAP_16BIT) | |
496 | i |= I365_MEM_16BIT; | |
497 | if (mem->flags & MAP_0WS) | |
498 | i |= I365_MEM_0WS; | |
499 | indirect_write16(socket, base + I365_W_START, i); | |
500 | ||
501 | /* write the stop address */ | |
502 | ||
5cbb2b94 | 503 | i = (mem->res->end >> 12) & 0x0fff; |
1da177e4 LT |
504 | switch (to_cycles(mem->speed)) { |
505 | case 0: | |
506 | break; | |
507 | case 1: | |
508 | i |= I365_MEM_WS0; | |
509 | break; | |
510 | case 2: | |
511 | i |= I365_MEM_WS1; | |
512 | break; | |
513 | default: | |
514 | i |= I365_MEM_WS1 | I365_MEM_WS0; | |
515 | break; | |
516 | } | |
517 | ||
518 | indirect_write16(socket, base + I365_W_STOP, i); | |
519 | ||
520 | /* Take care of high byte */ | |
521 | indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map)); | |
522 | indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24); | |
523 | ||
524 | /* card start */ | |
525 | ||
526 | i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; | |
527 | if (mem->flags & MAP_WRPROT) | |
528 | i |= I365_MEM_WRPROT; | |
529 | if (mem->flags & MAP_ATTRIB) { | |
a7149f9a DB |
530 | /* dev_dbg(&sock->dev, "requesting attribute memory for " |
531 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
532 | i |= I365_MEM_REG; |
533 | } else { | |
a7149f9a DB |
534 | /* dev_dbg(&sock->dev, "requesting normal memory for " |
535 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
536 | } |
537 | indirect_write16(socket, base + I365_W_OFF, i); | |
538 | ||
539 | /* Enable the window if necessary */ | |
540 | if (mem->flags & MAP_ACTIVE) | |
541 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
542 | ||
543 | return 0; | |
544 | } | |
545 | ||
546 | static int pd6729_init(struct pcmcia_socket *sock) | |
547 | { | |
548 | int i; | |
549 | struct resource res = { .end = 0x0fff }; | |
550 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
551 | pccard_mem_map mem = { .res = &res, }; | |
552 | ||
553 | pd6729_set_socket(sock, &dead_socket); | |
554 | for (i = 0; i < 2; i++) { | |
555 | io.map = i; | |
556 | pd6729_set_io_map(sock, &io); | |
557 | } | |
558 | for (i = 0; i < 5; i++) { | |
559 | mem.map = i; | |
560 | pd6729_set_mem_map(sock, &mem); | |
561 | } | |
562 | ||
563 | return 0; | |
564 | } | |
565 | ||
566 | ||
567 | /* the pccard structure and its functions */ | |
568 | static struct pccard_operations pd6729_operations = { | |
5cbb2b94 | 569 | .init = pd6729_init, |
1da177e4 | 570 | .get_status = pd6729_get_status, |
1da177e4 LT |
571 | .set_socket = pd6729_set_socket, |
572 | .set_io_map = pd6729_set_io_map, | |
573 | .set_mem_map = pd6729_set_mem_map, | |
574 | }; | |
575 | ||
7d12e780 | 576 | static irqreturn_t pd6729_test(int irq, void *dev) |
1da177e4 | 577 | { |
a7149f9a | 578 | pr_devel("-> hit on irq %d\n", irq); |
1da177e4 LT |
579 | return IRQ_HANDLED; |
580 | } | |
581 | ||
3e022d0c | 582 | static int pd6729_check_irq(int irq) |
1da177e4 | 583 | { |
5cbb2b94 K |
584 | int ret; |
585 | ||
586 | ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", | |
587 | pd6729_test); | |
588 | if (ret) | |
589 | return -1; | |
590 | ||
1da177e4 LT |
591 | free_irq(irq, pd6729_test); |
592 | return 0; | |
593 | } | |
594 | ||
9781b8b0 | 595 | static u_int __devinit pd6729_isa_scan(void) |
1da177e4 LT |
596 | { |
597 | u_int mask0, mask = 0; | |
598 | int i; | |
599 | ||
600 | if (irq_mode == 1) { | |
601 | printk(KERN_INFO "pd6729: PCI card interrupts, " | |
5cbb2b94 | 602 | "PCI status changes\n"); |
1da177e4 LT |
603 | return 0; |
604 | } | |
605 | ||
f9097dce | 606 | mask0 = PD67_MASK; |
1da177e4 LT |
607 | |
608 | /* just find interrupts that aren't in use */ | |
609 | for (i = 0; i < 16; i++) | |
3e022d0c | 610 | if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0)) |
1da177e4 LT |
611 | mask |= (1 << i); |
612 | ||
613 | printk(KERN_INFO "pd6729: ISA irqs = "); | |
614 | for (i = 0; i < 16; i++) | |
615 | if (mask & (1<<i)) | |
616 | printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i); | |
617 | ||
5cbb2b94 K |
618 | if (mask == 0) |
619 | printk("none!"); | |
620 | else | |
621 | printk(" polling status changes.\n"); | |
1da177e4 LT |
622 | |
623 | return mask; | |
624 | } | |
625 | ||
626 | static int __devinit pd6729_pci_probe(struct pci_dev *dev, | |
627 | const struct pci_device_id *id) | |
628 | { | |
629 | int i, j, ret; | |
630 | u_int mask; | |
631 | char configbyte; | |
632 | struct pd6729_socket *socket; | |
633 | ||
8084b372 | 634 | socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS, |
1da177e4 | 635 | GFP_KERNEL); |
5cbb2b94 K |
636 | if (!socket) { |
637 | dev_warn(&dev->dev, "failed to kzalloc socket.\n"); | |
1da177e4 | 638 | return -ENOMEM; |
5cbb2b94 | 639 | } |
1da177e4 | 640 | |
5cbb2b94 K |
641 | ret = pci_enable_device(dev); |
642 | if (ret) { | |
643 | dev_warn(&dev->dev, "failed to enable pci_device.\n"); | |
1da177e4 | 644 | goto err_out_free_mem; |
5cbb2b94 | 645 | } |
1da177e4 | 646 | |
94efb723 | 647 | if (!pci_resource_start(dev, 0)) { |
a7149f9a DB |
648 | dev_warn(&dev->dev, "refusing to load the driver as the " |
649 | "io_base is NULL.\n"); | |
94efb723 K |
650 | goto err_out_free_mem; |
651 | } | |
652 | ||
a7149f9a DB |
653 | dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " |
654 | "on irq %d\n", | |
490ab72a | 655 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); |
5cbb2b94 | 656 | /* |
1da177e4 LT |
657 | * Since we have no memory BARs some firmware may not |
658 | * have had PCI_COMMAND_MEMORY enabled, yet the device needs it. | |
659 | */ | |
660 | pci_read_config_byte(dev, PCI_COMMAND, &configbyte); | |
661 | if (!(configbyte & PCI_COMMAND_MEMORY)) { | |
a7149f9a | 662 | dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n"); |
1da177e4 LT |
663 | configbyte |= PCI_COMMAND_MEMORY; |
664 | pci_write_config_byte(dev, PCI_COMMAND, configbyte); | |
665 | } | |
666 | ||
667 | ret = pci_request_regions(dev, "pd6729"); | |
668 | if (ret) { | |
a7149f9a | 669 | dev_warn(&dev->dev, "pci request region failed.\n"); |
1da177e4 LT |
670 | goto err_out_disable; |
671 | } | |
672 | ||
673 | if (dev->irq == NO_IRQ) | |
674 | irq_mode = 0; /* fall back to ISA interrupt mode */ | |
675 | ||
676 | mask = pd6729_isa_scan(); | |
677 | if (irq_mode == 0 && mask == 0) { | |
a7149f9a | 678 | dev_warn(&dev->dev, "no ISA interrupt is available.\n"); |
1da177e4 LT |
679 | goto err_out_free_res; |
680 | } | |
681 | ||
682 | for (i = 0; i < MAX_SOCKETS; i++) { | |
683 | socket[i].io_base = pci_resource_start(dev, 0); | |
c35e66a4 | 684 | socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1da177e4 LT |
685 | socket[i].socket.map_size = 0x1000; |
686 | socket[i].socket.irq_mask = mask; | |
687 | socket[i].socket.pci_irq = dev->irq; | |
7a96e87d | 688 | socket[i].socket.cb_dev = dev; |
1da177e4 LT |
689 | socket[i].socket.owner = THIS_MODULE; |
690 | ||
691 | socket[i].number = i; | |
692 | ||
693 | socket[i].socket.ops = &pd6729_operations; | |
694 | socket[i].socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 695 | socket[i].socket.dev.parent = &dev->dev; |
1da177e4 LT |
696 | socket[i].socket.driver_data = &socket[i]; |
697 | } | |
698 | ||
699 | pci_set_drvdata(dev, socket); | |
700 | if (irq_mode == 1) { | |
701 | /* Register the interrupt handler */ | |
5cbb2b94 K |
702 | ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, |
703 | "pd6729", socket); | |
704 | if (ret) { | |
a7149f9a DB |
705 | dev_err(&dev->dev, "Failed to register irq %d\n", |
706 | dev->irq); | |
1da177e4 LT |
707 | goto err_out_free_res; |
708 | } | |
709 | } else { | |
710 | /* poll Card status change */ | |
711 | init_timer(&socket->poll_timer); | |
712 | socket->poll_timer.function = pd6729_interrupt_wrapper; | |
713 | socket->poll_timer.data = (unsigned long)socket; | |
714 | socket->poll_timer.expires = jiffies + HZ; | |
715 | add_timer(&socket->poll_timer); | |
716 | } | |
717 | ||
718 | for (i = 0; i < MAX_SOCKETS; i++) { | |
719 | ret = pcmcia_register_socket(&socket[i].socket); | |
720 | if (ret) { | |
a7149f9a | 721 | dev_warn(&dev->dev, "pcmcia_register_socket failed.\n"); |
1da177e4 LT |
722 | for (j = 0; j < i ; j++) |
723 | pcmcia_unregister_socket(&socket[j].socket); | |
724 | goto err_out_free_res2; | |
725 | } | |
726 | } | |
727 | ||
728 | return 0; | |
729 | ||
730 | err_out_free_res2: | |
731 | if (irq_mode == 1) | |
732 | free_irq(dev->irq, socket); | |
733 | else | |
734 | del_timer_sync(&socket->poll_timer); | |
735 | err_out_free_res: | |
736 | pci_release_regions(dev); | |
737 | err_out_disable: | |
738 | pci_disable_device(dev); | |
739 | ||
740 | err_out_free_mem: | |
741 | kfree(socket); | |
742 | return ret; | |
743 | } | |
744 | ||
745 | static void __devexit pd6729_pci_remove(struct pci_dev *dev) | |
746 | { | |
747 | int i; | |
748 | struct pd6729_socket *socket = pci_get_drvdata(dev); | |
749 | ||
750 | for (i = 0; i < MAX_SOCKETS; i++) { | |
751 | /* Turn off all interrupt sources */ | |
752 | indirect_write(&socket[i], I365_CSCINT, 0); | |
753 | indirect_write(&socket[i], I365_INTCTL, 0); | |
754 | ||
755 | pcmcia_unregister_socket(&socket[i].socket); | |
756 | } | |
757 | ||
758 | if (irq_mode == 1) | |
759 | free_irq(dev->irq, socket); | |
760 | else | |
761 | del_timer_sync(&socket->poll_timer); | |
762 | pci_release_regions(dev); | |
763 | pci_disable_device(dev); | |
764 | ||
765 | kfree(socket); | |
766 | } | |
767 | ||
1da177e4 LT |
768 | static struct pci_device_id pd6729_pci_ids[] = { |
769 | { | |
770 | .vendor = PCI_VENDOR_ID_CIRRUS, | |
771 | .device = PCI_DEVICE_ID_CIRRUS_6729, | |
772 | .subvendor = PCI_ANY_ID, | |
773 | .subdevice = PCI_ANY_ID, | |
774 | }, | |
775 | { } | |
776 | }; | |
777 | MODULE_DEVICE_TABLE(pci, pd6729_pci_ids); | |
778 | ||
ba66ddfa | 779 | static struct pci_driver pd6729_pci_driver = { |
1da177e4 LT |
780 | .name = "pd6729", |
781 | .id_table = pd6729_pci_ids, | |
782 | .probe = pd6729_pci_probe, | |
783 | .remove = __devexit_p(pd6729_pci_remove), | |
1da177e4 LT |
784 | }; |
785 | ||
786 | static int pd6729_module_init(void) | |
787 | { | |
ba66ddfa | 788 | return pci_register_driver(&pd6729_pci_driver); |
1da177e4 LT |
789 | } |
790 | ||
791 | static void pd6729_module_exit(void) | |
792 | { | |
ba66ddfa | 793 | pci_unregister_driver(&pd6729_pci_driver); |
1da177e4 LT |
794 | } |
795 | ||
796 | module_init(pd6729_module_init); | |
797 | module_exit(pd6729_module_exit); |