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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. | |
3 | * | |
4 | * Based on the i82092.c driver. | |
5 | * | |
6 | * This software may be used and distributed according to the terms of | |
7 | * the GNU General Public License, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
1da177e4 | 11 | #include <linux/module.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
1da177e4 LT |
13 | #include <linux/pci.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/workqueue.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/device.h> | |
5cbb2b94 | 18 | #include <linux/io.h> |
1da177e4 | 19 | |
1da177e4 | 20 | #include <pcmcia/ss.h> |
1da177e4 LT |
21 | |
22 | #include <asm/system.h> | |
1da177e4 LT |
23 | |
24 | #include "pd6729.h" | |
25 | #include "i82365.h" | |
26 | #include "cirrus.h" | |
27 | ||
28 | MODULE_LICENSE("GPL"); | |
29 | MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); | |
30 | MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); | |
31 | ||
32 | #define MAX_SOCKETS 2 | |
33 | ||
34 | /* | |
35 | * simple helper functions | |
36 | * External clock time, in nanoseconds. 120 ns = 8.33 MHz | |
37 | */ | |
38 | #define to_cycles(ns) ((ns)/120) | |
39 | ||
40 | #ifndef NO_IRQ | |
41 | #define NO_IRQ ((unsigned int)(0)) | |
42 | #endif | |
43 | ||
44 | /* | |
45 | * PARAMETERS | |
46 | * irq_mode=n | |
47 | * Specifies the interrupt delivery mode. The default (1) is to use PCI | |
48 | * interrupts; a value of 0 selects ISA interrupts. This must be set for | |
49 | * correct operation of PCI card readers. | |
1da177e4 LT |
50 | */ |
51 | ||
52 | static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ | |
1da177e4 LT |
53 | |
54 | module_param(irq_mode, int, 0444); | |
1da177e4 LT |
55 | MODULE_PARM_DESC(irq_mode, |
56 | "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); | |
1da177e4 LT |
57 | |
58 | static DEFINE_SPINLOCK(port_lock); | |
59 | ||
60 | /* basic value read/write functions */ | |
61 | ||
62 | static unsigned char indirect_read(struct pd6729_socket *socket, | |
63 | unsigned short reg) | |
64 | { | |
65 | unsigned long port; | |
66 | unsigned char val; | |
67 | unsigned long flags; | |
68 | ||
69 | spin_lock_irqsave(&port_lock, flags); | |
70 | reg += socket->number * 0x40; | |
71 | port = socket->io_base; | |
72 | outb(reg, port); | |
73 | val = inb(port + 1); | |
74 | spin_unlock_irqrestore(&port_lock, flags); | |
75 | ||
76 | return val; | |
77 | } | |
78 | ||
79 | static unsigned short indirect_read16(struct pd6729_socket *socket, | |
80 | unsigned short reg) | |
81 | { | |
82 | unsigned long port; | |
83 | unsigned short tmp; | |
84 | unsigned long flags; | |
85 | ||
86 | spin_lock_irqsave(&port_lock, flags); | |
87 | reg = reg + socket->number * 0x40; | |
88 | port = socket->io_base; | |
89 | outb(reg, port); | |
90 | tmp = inb(port + 1); | |
91 | reg++; | |
92 | outb(reg, port); | |
93 | tmp = tmp | (inb(port + 1) << 8); | |
94 | spin_unlock_irqrestore(&port_lock, flags); | |
95 | ||
96 | return tmp; | |
97 | } | |
98 | ||
99 | static void indirect_write(struct pd6729_socket *socket, unsigned short reg, | |
100 | unsigned char value) | |
101 | { | |
102 | unsigned long port; | |
103 | unsigned long flags; | |
104 | ||
105 | spin_lock_irqsave(&port_lock, flags); | |
106 | reg = reg + socket->number * 0x40; | |
107 | port = socket->io_base; | |
108 | outb(reg, port); | |
109 | outb(value, port + 1); | |
110 | spin_unlock_irqrestore(&port_lock, flags); | |
111 | } | |
112 | ||
113 | static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg, | |
114 | unsigned char mask) | |
115 | { | |
116 | unsigned long port; | |
117 | unsigned char val; | |
118 | unsigned long flags; | |
119 | ||
120 | spin_lock_irqsave(&port_lock, flags); | |
121 | reg = reg + socket->number * 0x40; | |
122 | port = socket->io_base; | |
123 | outb(reg, port); | |
124 | val = inb(port + 1); | |
125 | val |= mask; | |
126 | outb(reg, port); | |
127 | outb(val, port + 1); | |
128 | spin_unlock_irqrestore(&port_lock, flags); | |
129 | } | |
130 | ||
131 | static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg, | |
132 | unsigned char mask) | |
133 | { | |
134 | unsigned long port; | |
135 | unsigned char val; | |
136 | unsigned long flags; | |
137 | ||
138 | spin_lock_irqsave(&port_lock, flags); | |
139 | reg = reg + socket->number * 0x40; | |
140 | port = socket->io_base; | |
141 | outb(reg, port); | |
142 | val = inb(port + 1); | |
143 | val &= ~mask; | |
144 | outb(reg, port); | |
145 | outb(val, port + 1); | |
146 | spin_unlock_irqrestore(&port_lock, flags); | |
147 | } | |
148 | ||
149 | static void indirect_write16(struct pd6729_socket *socket, unsigned short reg, | |
150 | unsigned short value) | |
151 | { | |
152 | unsigned long port; | |
153 | unsigned char val; | |
154 | unsigned long flags; | |
155 | ||
156 | spin_lock_irqsave(&port_lock, flags); | |
157 | reg = reg + socket->number * 0x40; | |
158 | port = socket->io_base; | |
159 | ||
160 | outb(reg, port); | |
161 | val = value & 255; | |
162 | outb(val, port + 1); | |
163 | ||
164 | reg++; | |
165 | ||
166 | outb(reg, port); | |
167 | val = value >> 8; | |
168 | outb(val, port + 1); | |
169 | spin_unlock_irqrestore(&port_lock, flags); | |
170 | } | |
171 | ||
172 | /* Interrupt handler functionality */ | |
173 | ||
7d12e780 | 174 | static irqreturn_t pd6729_interrupt(int irq, void *dev) |
1da177e4 LT |
175 | { |
176 | struct pd6729_socket *socket = (struct pd6729_socket *)dev; | |
177 | int i; | |
178 | int loopcount = 0; | |
179 | int handled = 0; | |
180 | unsigned int events, active = 0; | |
181 | ||
182 | while (1) { | |
183 | loopcount++; | |
184 | if (loopcount > 20) { | |
185 | printk(KERN_ERR "pd6729: infinite eventloop " | |
186 | "in interrupt\n"); | |
187 | break; | |
188 | } | |
189 | ||
190 | active = 0; | |
191 | ||
192 | for (i = 0; i < MAX_SOCKETS; i++) { | |
193 | unsigned int csc; | |
194 | ||
195 | /* card status change register */ | |
196 | csc = indirect_read(&socket[i], I365_CSC); | |
197 | if (csc == 0) /* no events on this socket */ | |
198 | continue; | |
199 | ||
200 | handled = 1; | |
201 | events = 0; | |
202 | ||
203 | if (csc & I365_CSC_DETECT) { | |
204 | events |= SS_DETECT; | |
a7149f9a DB |
205 | dev_vdbg(&socket[i].socket.dev, |
206 | "Card detected in socket %i!\n", i); | |
1da177e4 LT |
207 | } |
208 | ||
209 | if (indirect_read(&socket[i], I365_INTCTL) | |
210 | & I365_PC_IOCARD) { | |
211 | /* For IO/CARDS, bit 0 means "read the card" */ | |
212 | events |= (csc & I365_CSC_STSCHG) | |
213 | ? SS_STSCHG : 0; | |
214 | } else { | |
215 | /* Check for battery/ready events */ | |
216 | events |= (csc & I365_CSC_BVD1) | |
217 | ? SS_BATDEAD : 0; | |
218 | events |= (csc & I365_CSC_BVD2) | |
219 | ? SS_BATWARN : 0; | |
220 | events |= (csc & I365_CSC_READY) | |
221 | ? SS_READY : 0; | |
222 | } | |
223 | ||
5cbb2b94 | 224 | if (events) |
1da177e4 | 225 | pcmcia_parse_events(&socket[i].socket, events); |
5cbb2b94 | 226 | |
1da177e4 LT |
227 | active |= events; |
228 | } | |
229 | ||
230 | if (active == 0) /* no more events to handle */ | |
231 | break; | |
232 | } | |
233 | return IRQ_RETVAL(handled); | |
234 | } | |
235 | ||
236 | /* socket functions */ | |
237 | ||
238 | static void pd6729_interrupt_wrapper(unsigned long data) | |
239 | { | |
240 | struct pd6729_socket *socket = (struct pd6729_socket *) data; | |
241 | ||
7d12e780 | 242 | pd6729_interrupt(0, (void *)socket); |
1da177e4 LT |
243 | mod_timer(&socket->poll_timer, jiffies + HZ); |
244 | } | |
245 | ||
246 | static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value) | |
247 | { | |
248 | struct pd6729_socket *socket | |
249 | = container_of(sock, struct pd6729_socket, socket); | |
250 | unsigned int status; | |
251 | unsigned int data; | |
252 | struct pd6729_socket *t; | |
253 | ||
254 | /* Interface Status Register */ | |
255 | status = indirect_read(socket, I365_STATUS); | |
256 | *value = 0; | |
257 | ||
5cbb2b94 | 258 | if ((status & I365_CS_DETECT) == I365_CS_DETECT) |
1da177e4 | 259 | *value |= SS_DETECT; |
1da177e4 LT |
260 | |
261 | /* | |
262 | * IO cards have a different meaning of bits 0,1 | |
263 | * Also notice the inverse-logic on the bits | |
264 | */ | |
265 | if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
266 | /* IO card */ | |
267 | if (!(status & I365_CS_STSCHG)) | |
268 | *value |= SS_STSCHG; | |
269 | } else { | |
270 | /* non I/O card */ | |
271 | if (!(status & I365_CS_BVD1)) | |
272 | *value |= SS_BATDEAD; | |
273 | if (!(status & I365_CS_BVD2)) | |
274 | *value |= SS_BATWARN; | |
275 | } | |
276 | ||
277 | if (status & I365_CS_WRPROT) | |
278 | *value |= SS_WRPROT; /* card is write protected */ | |
279 | ||
280 | if (status & I365_CS_READY) | |
281 | *value |= SS_READY; /* card is not busy */ | |
282 | ||
283 | if (status & I365_CS_POWERON) | |
284 | *value |= SS_POWERON; /* power is applied to the card */ | |
285 | ||
286 | t = (socket->number) ? socket : socket + 1; | |
287 | indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA); | |
288 | data = indirect_read16(t, PD67_EXT_DATA); | |
289 | *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD; | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | ||
1da177e4 LT |
295 | static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state) |
296 | { | |
297 | struct pd6729_socket *socket | |
298 | = container_of(sock, struct pd6729_socket, socket); | |
299 | unsigned char reg, data; | |
300 | ||
301 | /* First, set the global controller options */ | |
302 | indirect_write(socket, I365_GBLCTL, 0x00); | |
303 | indirect_write(socket, I365_GENCTL, 0x00); | |
304 | ||
305 | /* Values for the IGENC register */ | |
306 | socket->card_irq = state->io_irq; | |
307 | ||
308 | reg = 0; | |
5cbb2b94 | 309 | /* The reset bit has "inverse" logic */ |
1da177e4 LT |
310 | if (!(state->flags & SS_RESET)) |
311 | reg |= I365_PC_RESET; | |
312 | if (state->flags & SS_IOCARD) | |
313 | reg |= I365_PC_IOCARD; | |
314 | ||
315 | /* IGENC, Interrupt and General Control Register */ | |
316 | indirect_write(socket, I365_INTCTL, reg); | |
317 | ||
318 | /* Power registers */ | |
319 | ||
320 | reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ | |
321 | ||
322 | if (state->flags & SS_PWR_AUTO) { | |
a7149f9a | 323 | dev_dbg(&sock->dev, "Auto power\n"); |
1da177e4 LT |
324 | reg |= I365_PWR_AUTO; /* automatic power mngmnt */ |
325 | } | |
326 | if (state->flags & SS_OUTPUT_ENA) { | |
a7149f9a | 327 | dev_dbg(&sock->dev, "Power Enabled\n"); |
1da177e4 LT |
328 | reg |= I365_PWR_OUT; /* enable power */ |
329 | } | |
330 | ||
331 | switch (state->Vcc) { | |
332 | case 0: | |
333 | break; | |
334 | case 33: | |
a7149f9a DB |
335 | dev_dbg(&sock->dev, |
336 | "setting voltage to Vcc to 3.3V on socket %i\n", | |
1da177e4 LT |
337 | socket->number); |
338 | reg |= I365_VCC_5V; | |
339 | indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
340 | break; | |
341 | case 50: | |
a7149f9a DB |
342 | dev_dbg(&sock->dev, |
343 | "setting voltage to Vcc to 5V on socket %i\n", | |
1da177e4 LT |
344 | socket->number); |
345 | reg |= I365_VCC_5V; | |
346 | indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
347 | break; | |
348 | default: | |
a7149f9a DB |
349 | dev_dbg(&sock->dev, |
350 | "pd6729_set_socket called with invalid VCC power " | |
351 | "value: %i\n", state->Vcc); | |
1da177e4 LT |
352 | return -EINVAL; |
353 | } | |
354 | ||
355 | switch (state->Vpp) { | |
356 | case 0: | |
a7149f9a DB |
357 | dev_dbg(&sock->dev, "not setting Vpp on socket %i\n", |
358 | socket->number); | |
1da177e4 LT |
359 | break; |
360 | case 33: | |
361 | case 50: | |
a7149f9a DB |
362 | dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n", |
363 | socket->number); | |
1da177e4 LT |
364 | reg |= I365_VPP1_5V; |
365 | break; | |
366 | case 120: | |
a7149f9a | 367 | dev_dbg(&sock->dev, "setting Vpp to 12.0\n"); |
1da177e4 LT |
368 | reg |= I365_VPP1_12V; |
369 | break; | |
370 | default: | |
a7149f9a DB |
371 | dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with " |
372 | "invalid VPP power value: %i\n", state->Vpp); | |
1da177e4 LT |
373 | return -EINVAL; |
374 | } | |
375 | ||
376 | /* only write if changed */ | |
377 | if (reg != indirect_read(socket, I365_POWER)) | |
378 | indirect_write(socket, I365_POWER, reg); | |
379 | ||
380 | if (irq_mode == 1) { | |
5cbb2b94 | 381 | /* all interrupts are to be done as PCI interrupts */ |
1da177e4 LT |
382 | data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ; |
383 | } else | |
384 | data = 0; | |
385 | ||
386 | indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1); | |
387 | indirect_write(socket, PD67_EXT_DATA, data); | |
388 | ||
389 | /* Enable specific interrupt events */ | |
390 | ||
391 | reg = 0x00; | |
5cbb2b94 | 392 | if (state->csc_mask & SS_DETECT) |
1da177e4 | 393 | reg |= I365_CSC_DETECT; |
5cbb2b94 | 394 | |
1da177e4 LT |
395 | if (state->flags & SS_IOCARD) { |
396 | if (state->csc_mask & SS_STSCHG) | |
397 | reg |= I365_CSC_STSCHG; | |
398 | } else { | |
399 | if (state->csc_mask & SS_BATDEAD) | |
400 | reg |= I365_CSC_BVD1; | |
401 | if (state->csc_mask & SS_BATWARN) | |
402 | reg |= I365_CSC_BVD2; | |
403 | if (state->csc_mask & SS_READY) | |
404 | reg |= I365_CSC_READY; | |
405 | } | |
406 | if (irq_mode == 1) | |
407 | reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */ | |
408 | indirect_write(socket, I365_CSCINT, reg); | |
409 | ||
410 | reg = indirect_read(socket, I365_INTCTL); | |
411 | if (irq_mode == 1) | |
412 | reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */ | |
413 | else | |
414 | reg |= socket->card_irq; | |
415 | indirect_write(socket, I365_INTCTL, reg); | |
416 | ||
417 | /* now clear the (probably bogus) pending stuff by doing a dummy read */ | |
418 | (void)indirect_read(socket, I365_CSC); | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | static int pd6729_set_io_map(struct pcmcia_socket *sock, | |
424 | struct pccard_io_map *io) | |
425 | { | |
426 | struct pd6729_socket *socket | |
427 | = container_of(sock, struct pd6729_socket, socket); | |
428 | unsigned char map, ioctl; | |
429 | ||
430 | map = io->map; | |
431 | ||
432 | /* Check error conditions */ | |
433 | if (map > 1) { | |
a7149f9a | 434 | dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n"); |
1da177e4 LT |
435 | return -EINVAL; |
436 | } | |
437 | ||
438 | /* Turn off the window before changing anything */ | |
439 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map)) | |
440 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
441 | ||
a7149f9a | 442 | /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n", |
1da177e4 LT |
443 | io->start, io->stop);*/ |
444 | ||
445 | /* write the new values */ | |
446 | indirect_write16(socket, I365_IO(map)+I365_W_START, io->start); | |
447 | indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
448 | ||
449 | ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
450 | ||
5cbb2b94 K |
451 | if (io->flags & MAP_0WS) |
452 | ioctl |= I365_IOCTL_0WS(map); | |
453 | if (io->flags & MAP_16BIT) | |
454 | ioctl |= I365_IOCTL_16BIT(map); | |
455 | if (io->flags & MAP_AUTOSZ) | |
456 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
457 | |
458 | indirect_write(socket, I365_IOCTL, ioctl); | |
459 | ||
460 | /* Turn the window back on if needed */ | |
461 | if (io->flags & MAP_ACTIVE) | |
462 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
467 | static int pd6729_set_mem_map(struct pcmcia_socket *sock, | |
468 | struct pccard_mem_map *mem) | |
469 | { | |
470 | struct pd6729_socket *socket | |
471 | = container_of(sock, struct pd6729_socket, socket); | |
472 | unsigned short base, i; | |
473 | unsigned char map; | |
474 | ||
475 | map = mem->map; | |
476 | if (map > 4) { | |
a7149f9a | 477 | dev_warn(&sock->dev, "invalid map requested\n"); |
1da177e4 LT |
478 | return -EINVAL; |
479 | } | |
480 | ||
481 | if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) { | |
a7149f9a | 482 | dev_warn(&sock->dev, "invalid invalid address / speed\n"); |
1da177e4 LT |
483 | return -EINVAL; |
484 | } | |
485 | ||
486 | /* Turn off the window before changing anything */ | |
487 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map)) | |
488 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
489 | ||
490 | /* write the start address */ | |
491 | base = I365_MEM(map); | |
492 | i = (mem->res->start >> 12) & 0x0fff; | |
493 | if (mem->flags & MAP_16BIT) | |
494 | i |= I365_MEM_16BIT; | |
495 | if (mem->flags & MAP_0WS) | |
496 | i |= I365_MEM_0WS; | |
497 | indirect_write16(socket, base + I365_W_START, i); | |
498 | ||
499 | /* write the stop address */ | |
500 | ||
5cbb2b94 | 501 | i = (mem->res->end >> 12) & 0x0fff; |
1da177e4 LT |
502 | switch (to_cycles(mem->speed)) { |
503 | case 0: | |
504 | break; | |
505 | case 1: | |
506 | i |= I365_MEM_WS0; | |
507 | break; | |
508 | case 2: | |
509 | i |= I365_MEM_WS1; | |
510 | break; | |
511 | default: | |
512 | i |= I365_MEM_WS1 | I365_MEM_WS0; | |
513 | break; | |
514 | } | |
515 | ||
516 | indirect_write16(socket, base + I365_W_STOP, i); | |
517 | ||
518 | /* Take care of high byte */ | |
519 | indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map)); | |
520 | indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24); | |
521 | ||
522 | /* card start */ | |
523 | ||
524 | i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; | |
525 | if (mem->flags & MAP_WRPROT) | |
526 | i |= I365_MEM_WRPROT; | |
527 | if (mem->flags & MAP_ATTRIB) { | |
a7149f9a DB |
528 | /* dev_dbg(&sock->dev, "requesting attribute memory for " |
529 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
530 | i |= I365_MEM_REG; |
531 | } else { | |
a7149f9a DB |
532 | /* dev_dbg(&sock->dev, "requesting normal memory for " |
533 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
534 | } |
535 | indirect_write16(socket, base + I365_W_OFF, i); | |
536 | ||
537 | /* Enable the window if necessary */ | |
538 | if (mem->flags & MAP_ACTIVE) | |
539 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
544 | static int pd6729_init(struct pcmcia_socket *sock) | |
545 | { | |
546 | int i; | |
547 | struct resource res = { .end = 0x0fff }; | |
548 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
549 | pccard_mem_map mem = { .res = &res, }; | |
550 | ||
551 | pd6729_set_socket(sock, &dead_socket); | |
552 | for (i = 0; i < 2; i++) { | |
553 | io.map = i; | |
554 | pd6729_set_io_map(sock, &io); | |
555 | } | |
556 | for (i = 0; i < 5; i++) { | |
557 | mem.map = i; | |
558 | pd6729_set_mem_map(sock, &mem); | |
559 | } | |
560 | ||
561 | return 0; | |
562 | } | |
563 | ||
564 | ||
565 | /* the pccard structure and its functions */ | |
566 | static struct pccard_operations pd6729_operations = { | |
5cbb2b94 | 567 | .init = pd6729_init, |
1da177e4 | 568 | .get_status = pd6729_get_status, |
1da177e4 LT |
569 | .set_socket = pd6729_set_socket, |
570 | .set_io_map = pd6729_set_io_map, | |
571 | .set_mem_map = pd6729_set_mem_map, | |
572 | }; | |
573 | ||
7d12e780 | 574 | static irqreturn_t pd6729_test(int irq, void *dev) |
1da177e4 | 575 | { |
a7149f9a | 576 | pr_devel("-> hit on irq %d\n", irq); |
1da177e4 LT |
577 | return IRQ_HANDLED; |
578 | } | |
579 | ||
3e022d0c | 580 | static int pd6729_check_irq(int irq) |
1da177e4 | 581 | { |
5cbb2b94 K |
582 | int ret; |
583 | ||
584 | ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", | |
585 | pd6729_test); | |
586 | if (ret) | |
587 | return -1; | |
588 | ||
1da177e4 LT |
589 | free_irq(irq, pd6729_test); |
590 | return 0; | |
591 | } | |
592 | ||
9781b8b0 | 593 | static u_int __devinit pd6729_isa_scan(void) |
1da177e4 LT |
594 | { |
595 | u_int mask0, mask = 0; | |
596 | int i; | |
597 | ||
598 | if (irq_mode == 1) { | |
599 | printk(KERN_INFO "pd6729: PCI card interrupts, " | |
5cbb2b94 | 600 | "PCI status changes\n"); |
1da177e4 LT |
601 | return 0; |
602 | } | |
603 | ||
f9097dce | 604 | mask0 = PD67_MASK; |
1da177e4 LT |
605 | |
606 | /* just find interrupts that aren't in use */ | |
607 | for (i = 0; i < 16; i++) | |
3e022d0c | 608 | if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0)) |
1da177e4 LT |
609 | mask |= (1 << i); |
610 | ||
611 | printk(KERN_INFO "pd6729: ISA irqs = "); | |
612 | for (i = 0; i < 16; i++) | |
613 | if (mask & (1<<i)) | |
614 | printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i); | |
615 | ||
5cbb2b94 K |
616 | if (mask == 0) |
617 | printk("none!"); | |
618 | else | |
619 | printk(" polling status changes.\n"); | |
1da177e4 LT |
620 | |
621 | return mask; | |
622 | } | |
623 | ||
624 | static int __devinit pd6729_pci_probe(struct pci_dev *dev, | |
625 | const struct pci_device_id *id) | |
626 | { | |
627 | int i, j, ret; | |
628 | u_int mask; | |
629 | char configbyte; | |
630 | struct pd6729_socket *socket; | |
631 | ||
8084b372 | 632 | socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS, |
1da177e4 | 633 | GFP_KERNEL); |
5cbb2b94 K |
634 | if (!socket) { |
635 | dev_warn(&dev->dev, "failed to kzalloc socket.\n"); | |
1da177e4 | 636 | return -ENOMEM; |
5cbb2b94 | 637 | } |
1da177e4 | 638 | |
5cbb2b94 K |
639 | ret = pci_enable_device(dev); |
640 | if (ret) { | |
641 | dev_warn(&dev->dev, "failed to enable pci_device.\n"); | |
1da177e4 | 642 | goto err_out_free_mem; |
5cbb2b94 | 643 | } |
1da177e4 | 644 | |
94efb723 | 645 | if (!pci_resource_start(dev, 0)) { |
a7149f9a DB |
646 | dev_warn(&dev->dev, "refusing to load the driver as the " |
647 | "io_base is NULL.\n"); | |
40d24ff9 | 648 | goto err_out_disable; |
94efb723 K |
649 | } |
650 | ||
a7149f9a DB |
651 | dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " |
652 | "on irq %d\n", | |
490ab72a | 653 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); |
5cbb2b94 | 654 | /* |
1da177e4 LT |
655 | * Since we have no memory BARs some firmware may not |
656 | * have had PCI_COMMAND_MEMORY enabled, yet the device needs it. | |
657 | */ | |
658 | pci_read_config_byte(dev, PCI_COMMAND, &configbyte); | |
659 | if (!(configbyte & PCI_COMMAND_MEMORY)) { | |
a7149f9a | 660 | dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n"); |
1da177e4 LT |
661 | configbyte |= PCI_COMMAND_MEMORY; |
662 | pci_write_config_byte(dev, PCI_COMMAND, configbyte); | |
663 | } | |
664 | ||
665 | ret = pci_request_regions(dev, "pd6729"); | |
666 | if (ret) { | |
a7149f9a | 667 | dev_warn(&dev->dev, "pci request region failed.\n"); |
1da177e4 LT |
668 | goto err_out_disable; |
669 | } | |
670 | ||
671 | if (dev->irq == NO_IRQ) | |
672 | irq_mode = 0; /* fall back to ISA interrupt mode */ | |
673 | ||
674 | mask = pd6729_isa_scan(); | |
675 | if (irq_mode == 0 && mask == 0) { | |
a7149f9a | 676 | dev_warn(&dev->dev, "no ISA interrupt is available.\n"); |
1da177e4 LT |
677 | goto err_out_free_res; |
678 | } | |
679 | ||
680 | for (i = 0; i < MAX_SOCKETS; i++) { | |
681 | socket[i].io_base = pci_resource_start(dev, 0); | |
c35e66a4 | 682 | socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1da177e4 LT |
683 | socket[i].socket.map_size = 0x1000; |
684 | socket[i].socket.irq_mask = mask; | |
685 | socket[i].socket.pci_irq = dev->irq; | |
7a96e87d | 686 | socket[i].socket.cb_dev = dev; |
1da177e4 LT |
687 | socket[i].socket.owner = THIS_MODULE; |
688 | ||
689 | socket[i].number = i; | |
690 | ||
691 | socket[i].socket.ops = &pd6729_operations; | |
692 | socket[i].socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 693 | socket[i].socket.dev.parent = &dev->dev; |
1da177e4 LT |
694 | socket[i].socket.driver_data = &socket[i]; |
695 | } | |
696 | ||
697 | pci_set_drvdata(dev, socket); | |
698 | if (irq_mode == 1) { | |
699 | /* Register the interrupt handler */ | |
5cbb2b94 K |
700 | ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, |
701 | "pd6729", socket); | |
702 | if (ret) { | |
a7149f9a DB |
703 | dev_err(&dev->dev, "Failed to register irq %d\n", |
704 | dev->irq); | |
1da177e4 LT |
705 | goto err_out_free_res; |
706 | } | |
707 | } else { | |
708 | /* poll Card status change */ | |
709 | init_timer(&socket->poll_timer); | |
710 | socket->poll_timer.function = pd6729_interrupt_wrapper; | |
711 | socket->poll_timer.data = (unsigned long)socket; | |
712 | socket->poll_timer.expires = jiffies + HZ; | |
713 | add_timer(&socket->poll_timer); | |
714 | } | |
715 | ||
716 | for (i = 0; i < MAX_SOCKETS; i++) { | |
717 | ret = pcmcia_register_socket(&socket[i].socket); | |
718 | if (ret) { | |
a7149f9a | 719 | dev_warn(&dev->dev, "pcmcia_register_socket failed.\n"); |
1da177e4 LT |
720 | for (j = 0; j < i ; j++) |
721 | pcmcia_unregister_socket(&socket[j].socket); | |
722 | goto err_out_free_res2; | |
723 | } | |
724 | } | |
725 | ||
726 | return 0; | |
727 | ||
006839f1 | 728 | err_out_free_res2: |
1da177e4 LT |
729 | if (irq_mode == 1) |
730 | free_irq(dev->irq, socket); | |
731 | else | |
732 | del_timer_sync(&socket->poll_timer); | |
006839f1 | 733 | err_out_free_res: |
1da177e4 | 734 | pci_release_regions(dev); |
006839f1 | 735 | err_out_disable: |
1da177e4 LT |
736 | pci_disable_device(dev); |
737 | ||
006839f1 | 738 | err_out_free_mem: |
1da177e4 LT |
739 | kfree(socket); |
740 | return ret; | |
741 | } | |
742 | ||
743 | static void __devexit pd6729_pci_remove(struct pci_dev *dev) | |
744 | { | |
745 | int i; | |
746 | struct pd6729_socket *socket = pci_get_drvdata(dev); | |
747 | ||
748 | for (i = 0; i < MAX_SOCKETS; i++) { | |
749 | /* Turn off all interrupt sources */ | |
750 | indirect_write(&socket[i], I365_CSCINT, 0); | |
751 | indirect_write(&socket[i], I365_INTCTL, 0); | |
752 | ||
753 | pcmcia_unregister_socket(&socket[i].socket); | |
754 | } | |
755 | ||
756 | if (irq_mode == 1) | |
757 | free_irq(dev->irq, socket); | |
758 | else | |
759 | del_timer_sync(&socket->poll_timer); | |
760 | pci_release_regions(dev); | |
761 | pci_disable_device(dev); | |
762 | ||
763 | kfree(socket); | |
764 | } | |
765 | ||
2b2c5d8c AL |
766 | static DEFINE_PCI_DEVICE_TABLE(pd6729_pci_ids) = { |
767 | { PCI_DEVICE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729) }, | |
1da177e4 LT |
768 | { } |
769 | }; | |
770 | MODULE_DEVICE_TABLE(pci, pd6729_pci_ids); | |
771 | ||
ba66ddfa | 772 | static struct pci_driver pd6729_pci_driver = { |
1da177e4 LT |
773 | .name = "pd6729", |
774 | .id_table = pd6729_pci_ids, | |
775 | .probe = pd6729_pci_probe, | |
776 | .remove = __devexit_p(pd6729_pci_remove), | |
1da177e4 LT |
777 | }; |
778 | ||
779 | static int pd6729_module_init(void) | |
780 | { | |
ba66ddfa | 781 | return pci_register_driver(&pd6729_pci_driver); |
1da177e4 LT |
782 | } |
783 | ||
784 | static void pd6729_module_exit(void) | |
785 | { | |
ba66ddfa | 786 | pci_unregister_driver(&pd6729_pci_driver); |
1da177e4 LT |
787 | } |
788 | ||
789 | module_init(pd6729_module_init); | |
790 | module_exit(pd6729_module_exit); |