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1da177e4 LT |
1 | /* |
2 | * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. | |
3 | * | |
4 | * Based on the i82092.c driver. | |
5 | * | |
6 | * This software may be used and distributed according to the terms of | |
7 | * the GNU General Public License, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
1da177e4 LT |
11 | #include <linux/module.h> |
12 | #include <linux/pci.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/workqueue.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/device.h> | |
17 | ||
18 | #include <pcmcia/cs_types.h> | |
19 | #include <pcmcia/ss.h> | |
20 | #include <pcmcia/cs.h> | |
21 | ||
22 | #include <asm/system.h> | |
23 | #include <asm/io.h> | |
24 | ||
25 | #include "pd6729.h" | |
26 | #include "i82365.h" | |
27 | #include "cirrus.h" | |
28 | ||
29 | MODULE_LICENSE("GPL"); | |
30 | MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); | |
31 | MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); | |
32 | ||
33 | #define MAX_SOCKETS 2 | |
34 | ||
35 | /* | |
36 | * simple helper functions | |
37 | * External clock time, in nanoseconds. 120 ns = 8.33 MHz | |
38 | */ | |
39 | #define to_cycles(ns) ((ns)/120) | |
40 | ||
41 | #ifndef NO_IRQ | |
42 | #define NO_IRQ ((unsigned int)(0)) | |
43 | #endif | |
44 | ||
45 | /* | |
46 | * PARAMETERS | |
47 | * irq_mode=n | |
48 | * Specifies the interrupt delivery mode. The default (1) is to use PCI | |
49 | * interrupts; a value of 0 selects ISA interrupts. This must be set for | |
50 | * correct operation of PCI card readers. | |
51 | * | |
52 | * irq_list=i,j,... | |
53 | * This list limits the set of interrupts that can be used by PCMCIA | |
54 | * cards. | |
55 | * The default list is 3,4,5,7,9,10,11. | |
56 | * (irq_list parameter is not used, if irq_mode = 1) | |
57 | */ | |
58 | ||
59 | static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ | |
60 | static int irq_list[16]; | |
64a6f950 | 61 | static unsigned int irq_list_count = 0; |
1da177e4 LT |
62 | |
63 | module_param(irq_mode, int, 0444); | |
64 | module_param_array(irq_list, int, &irq_list_count, 0444); | |
65 | MODULE_PARM_DESC(irq_mode, | |
66 | "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); | |
67 | MODULE_PARM_DESC(irq_list, "interrupts that can be used by PCMCIA cards"); | |
68 | ||
69 | static DEFINE_SPINLOCK(port_lock); | |
70 | ||
71 | /* basic value read/write functions */ | |
72 | ||
73 | static unsigned char indirect_read(struct pd6729_socket *socket, | |
74 | unsigned short reg) | |
75 | { | |
76 | unsigned long port; | |
77 | unsigned char val; | |
78 | unsigned long flags; | |
79 | ||
80 | spin_lock_irqsave(&port_lock, flags); | |
81 | reg += socket->number * 0x40; | |
82 | port = socket->io_base; | |
83 | outb(reg, port); | |
84 | val = inb(port + 1); | |
85 | spin_unlock_irqrestore(&port_lock, flags); | |
86 | ||
87 | return val; | |
88 | } | |
89 | ||
90 | static unsigned short indirect_read16(struct pd6729_socket *socket, | |
91 | unsigned short reg) | |
92 | { | |
93 | unsigned long port; | |
94 | unsigned short tmp; | |
95 | unsigned long flags; | |
96 | ||
97 | spin_lock_irqsave(&port_lock, flags); | |
98 | reg = reg + socket->number * 0x40; | |
99 | port = socket->io_base; | |
100 | outb(reg, port); | |
101 | tmp = inb(port + 1); | |
102 | reg++; | |
103 | outb(reg, port); | |
104 | tmp = tmp | (inb(port + 1) << 8); | |
105 | spin_unlock_irqrestore(&port_lock, flags); | |
106 | ||
107 | return tmp; | |
108 | } | |
109 | ||
110 | static void indirect_write(struct pd6729_socket *socket, unsigned short reg, | |
111 | unsigned char value) | |
112 | { | |
113 | unsigned long port; | |
114 | unsigned long flags; | |
115 | ||
116 | spin_lock_irqsave(&port_lock, flags); | |
117 | reg = reg + socket->number * 0x40; | |
118 | port = socket->io_base; | |
119 | outb(reg, port); | |
120 | outb(value, port + 1); | |
121 | spin_unlock_irqrestore(&port_lock, flags); | |
122 | } | |
123 | ||
124 | static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg, | |
125 | unsigned char mask) | |
126 | { | |
127 | unsigned long port; | |
128 | unsigned char val; | |
129 | unsigned long flags; | |
130 | ||
131 | spin_lock_irqsave(&port_lock, flags); | |
132 | reg = reg + socket->number * 0x40; | |
133 | port = socket->io_base; | |
134 | outb(reg, port); | |
135 | val = inb(port + 1); | |
136 | val |= mask; | |
137 | outb(reg, port); | |
138 | outb(val, port + 1); | |
139 | spin_unlock_irqrestore(&port_lock, flags); | |
140 | } | |
141 | ||
142 | static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg, | |
143 | unsigned char mask) | |
144 | { | |
145 | unsigned long port; | |
146 | unsigned char val; | |
147 | unsigned long flags; | |
148 | ||
149 | spin_lock_irqsave(&port_lock, flags); | |
150 | reg = reg + socket->number * 0x40; | |
151 | port = socket->io_base; | |
152 | outb(reg, port); | |
153 | val = inb(port + 1); | |
154 | val &= ~mask; | |
155 | outb(reg, port); | |
156 | outb(val, port + 1); | |
157 | spin_unlock_irqrestore(&port_lock, flags); | |
158 | } | |
159 | ||
160 | static void indirect_write16(struct pd6729_socket *socket, unsigned short reg, | |
161 | unsigned short value) | |
162 | { | |
163 | unsigned long port; | |
164 | unsigned char val; | |
165 | unsigned long flags; | |
166 | ||
167 | spin_lock_irqsave(&port_lock, flags); | |
168 | reg = reg + socket->number * 0x40; | |
169 | port = socket->io_base; | |
170 | ||
171 | outb(reg, port); | |
172 | val = value & 255; | |
173 | outb(val, port + 1); | |
174 | ||
175 | reg++; | |
176 | ||
177 | outb(reg, port); | |
178 | val = value >> 8; | |
179 | outb(val, port + 1); | |
180 | spin_unlock_irqrestore(&port_lock, flags); | |
181 | } | |
182 | ||
183 | /* Interrupt handler functionality */ | |
184 | ||
7d12e780 | 185 | static irqreturn_t pd6729_interrupt(int irq, void *dev) |
1da177e4 LT |
186 | { |
187 | struct pd6729_socket *socket = (struct pd6729_socket *)dev; | |
188 | int i; | |
189 | int loopcount = 0; | |
190 | int handled = 0; | |
191 | unsigned int events, active = 0; | |
192 | ||
193 | while (1) { | |
194 | loopcount++; | |
195 | if (loopcount > 20) { | |
196 | printk(KERN_ERR "pd6729: infinite eventloop " | |
197 | "in interrupt\n"); | |
198 | break; | |
199 | } | |
200 | ||
201 | active = 0; | |
202 | ||
203 | for (i = 0; i < MAX_SOCKETS; i++) { | |
204 | unsigned int csc; | |
205 | ||
206 | /* card status change register */ | |
207 | csc = indirect_read(&socket[i], I365_CSC); | |
208 | if (csc == 0) /* no events on this socket */ | |
209 | continue; | |
210 | ||
211 | handled = 1; | |
212 | events = 0; | |
213 | ||
214 | if (csc & I365_CSC_DETECT) { | |
215 | events |= SS_DETECT; | |
a7149f9a DB |
216 | dev_vdbg(&socket[i].socket.dev, |
217 | "Card detected in socket %i!\n", i); | |
1da177e4 LT |
218 | } |
219 | ||
220 | if (indirect_read(&socket[i], I365_INTCTL) | |
221 | & I365_PC_IOCARD) { | |
222 | /* For IO/CARDS, bit 0 means "read the card" */ | |
223 | events |= (csc & I365_CSC_STSCHG) | |
224 | ? SS_STSCHG : 0; | |
225 | } else { | |
226 | /* Check for battery/ready events */ | |
227 | events |= (csc & I365_CSC_BVD1) | |
228 | ? SS_BATDEAD : 0; | |
229 | events |= (csc & I365_CSC_BVD2) | |
230 | ? SS_BATWARN : 0; | |
231 | events |= (csc & I365_CSC_READY) | |
232 | ? SS_READY : 0; | |
233 | } | |
234 | ||
235 | if (events) { | |
236 | pcmcia_parse_events(&socket[i].socket, events); | |
237 | } | |
238 | active |= events; | |
239 | } | |
240 | ||
241 | if (active == 0) /* no more events to handle */ | |
242 | break; | |
243 | } | |
244 | return IRQ_RETVAL(handled); | |
245 | } | |
246 | ||
247 | /* socket functions */ | |
248 | ||
249 | static void pd6729_interrupt_wrapper(unsigned long data) | |
250 | { | |
251 | struct pd6729_socket *socket = (struct pd6729_socket *) data; | |
252 | ||
7d12e780 | 253 | pd6729_interrupt(0, (void *)socket); |
1da177e4 LT |
254 | mod_timer(&socket->poll_timer, jiffies + HZ); |
255 | } | |
256 | ||
257 | static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value) | |
258 | { | |
259 | struct pd6729_socket *socket | |
260 | = container_of(sock, struct pd6729_socket, socket); | |
261 | unsigned int status; | |
262 | unsigned int data; | |
263 | struct pd6729_socket *t; | |
264 | ||
265 | /* Interface Status Register */ | |
266 | status = indirect_read(socket, I365_STATUS); | |
267 | *value = 0; | |
268 | ||
269 | if ((status & I365_CS_DETECT) == I365_CS_DETECT) { | |
270 | *value |= SS_DETECT; | |
271 | } | |
272 | ||
273 | /* | |
274 | * IO cards have a different meaning of bits 0,1 | |
275 | * Also notice the inverse-logic on the bits | |
276 | */ | |
277 | if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
278 | /* IO card */ | |
279 | if (!(status & I365_CS_STSCHG)) | |
280 | *value |= SS_STSCHG; | |
281 | } else { | |
282 | /* non I/O card */ | |
283 | if (!(status & I365_CS_BVD1)) | |
284 | *value |= SS_BATDEAD; | |
285 | if (!(status & I365_CS_BVD2)) | |
286 | *value |= SS_BATWARN; | |
287 | } | |
288 | ||
289 | if (status & I365_CS_WRPROT) | |
290 | *value |= SS_WRPROT; /* card is write protected */ | |
291 | ||
292 | if (status & I365_CS_READY) | |
293 | *value |= SS_READY; /* card is not busy */ | |
294 | ||
295 | if (status & I365_CS_POWERON) | |
296 | *value |= SS_POWERON; /* power is applied to the card */ | |
297 | ||
298 | t = (socket->number) ? socket : socket + 1; | |
299 | indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA); | |
300 | data = indirect_read16(t, PD67_EXT_DATA); | |
301 | *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD; | |
302 | ||
303 | return 0; | |
304 | } | |
305 | ||
306 | ||
1da177e4 LT |
307 | static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state) |
308 | { | |
309 | struct pd6729_socket *socket | |
310 | = container_of(sock, struct pd6729_socket, socket); | |
311 | unsigned char reg, data; | |
312 | ||
313 | /* First, set the global controller options */ | |
314 | indirect_write(socket, I365_GBLCTL, 0x00); | |
315 | indirect_write(socket, I365_GENCTL, 0x00); | |
316 | ||
317 | /* Values for the IGENC register */ | |
318 | socket->card_irq = state->io_irq; | |
319 | ||
320 | reg = 0; | |
321 | /* The reset bit has "inverse" logic */ | |
322 | if (!(state->flags & SS_RESET)) | |
323 | reg |= I365_PC_RESET; | |
324 | if (state->flags & SS_IOCARD) | |
325 | reg |= I365_PC_IOCARD; | |
326 | ||
327 | /* IGENC, Interrupt and General Control Register */ | |
328 | indirect_write(socket, I365_INTCTL, reg); | |
329 | ||
330 | /* Power registers */ | |
331 | ||
332 | reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ | |
333 | ||
334 | if (state->flags & SS_PWR_AUTO) { | |
a7149f9a | 335 | dev_dbg(&sock->dev, "Auto power\n"); |
1da177e4 LT |
336 | reg |= I365_PWR_AUTO; /* automatic power mngmnt */ |
337 | } | |
338 | if (state->flags & SS_OUTPUT_ENA) { | |
a7149f9a | 339 | dev_dbg(&sock->dev, "Power Enabled\n"); |
1da177e4 LT |
340 | reg |= I365_PWR_OUT; /* enable power */ |
341 | } | |
342 | ||
343 | switch (state->Vcc) { | |
344 | case 0: | |
345 | break; | |
346 | case 33: | |
a7149f9a DB |
347 | dev_dbg(&sock->dev, |
348 | "setting voltage to Vcc to 3.3V on socket %i\n", | |
1da177e4 LT |
349 | socket->number); |
350 | reg |= I365_VCC_5V; | |
351 | indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
352 | break; | |
353 | case 50: | |
a7149f9a DB |
354 | dev_dbg(&sock->dev, |
355 | "setting voltage to Vcc to 5V on socket %i\n", | |
1da177e4 LT |
356 | socket->number); |
357 | reg |= I365_VCC_5V; | |
358 | indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
359 | break; | |
360 | default: | |
a7149f9a DB |
361 | dev_dbg(&sock->dev, |
362 | "pd6729_set_socket called with invalid VCC power " | |
363 | "value: %i\n", state->Vcc); | |
1da177e4 LT |
364 | return -EINVAL; |
365 | } | |
366 | ||
367 | switch (state->Vpp) { | |
368 | case 0: | |
a7149f9a DB |
369 | dev_dbg(&sock->dev, "not setting Vpp on socket %i\n", |
370 | socket->number); | |
1da177e4 LT |
371 | break; |
372 | case 33: | |
373 | case 50: | |
a7149f9a DB |
374 | dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n", |
375 | socket->number); | |
1da177e4 LT |
376 | reg |= I365_VPP1_5V; |
377 | break; | |
378 | case 120: | |
a7149f9a | 379 | dev_dbg(&sock->dev, "setting Vpp to 12.0\n"); |
1da177e4 LT |
380 | reg |= I365_VPP1_12V; |
381 | break; | |
382 | default: | |
a7149f9a DB |
383 | dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with " |
384 | "invalid VPP power value: %i\n", state->Vpp); | |
1da177e4 LT |
385 | return -EINVAL; |
386 | } | |
387 | ||
388 | /* only write if changed */ | |
389 | if (reg != indirect_read(socket, I365_POWER)) | |
390 | indirect_write(socket, I365_POWER, reg); | |
391 | ||
392 | if (irq_mode == 1) { | |
393 | /* all interrupts are to be done as PCI interrupts */ | |
394 | data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ; | |
395 | } else | |
396 | data = 0; | |
397 | ||
398 | indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1); | |
399 | indirect_write(socket, PD67_EXT_DATA, data); | |
400 | ||
401 | /* Enable specific interrupt events */ | |
402 | ||
403 | reg = 0x00; | |
404 | if (state->csc_mask & SS_DETECT) { | |
405 | reg |= I365_CSC_DETECT; | |
406 | } | |
407 | if (state->flags & SS_IOCARD) { | |
408 | if (state->csc_mask & SS_STSCHG) | |
409 | reg |= I365_CSC_STSCHG; | |
410 | } else { | |
411 | if (state->csc_mask & SS_BATDEAD) | |
412 | reg |= I365_CSC_BVD1; | |
413 | if (state->csc_mask & SS_BATWARN) | |
414 | reg |= I365_CSC_BVD2; | |
415 | if (state->csc_mask & SS_READY) | |
416 | reg |= I365_CSC_READY; | |
417 | } | |
418 | if (irq_mode == 1) | |
419 | reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */ | |
420 | indirect_write(socket, I365_CSCINT, reg); | |
421 | ||
422 | reg = indirect_read(socket, I365_INTCTL); | |
423 | if (irq_mode == 1) | |
424 | reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */ | |
425 | else | |
426 | reg |= socket->card_irq; | |
427 | indirect_write(socket, I365_INTCTL, reg); | |
428 | ||
429 | /* now clear the (probably bogus) pending stuff by doing a dummy read */ | |
430 | (void)indirect_read(socket, I365_CSC); | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | static int pd6729_set_io_map(struct pcmcia_socket *sock, | |
436 | struct pccard_io_map *io) | |
437 | { | |
438 | struct pd6729_socket *socket | |
439 | = container_of(sock, struct pd6729_socket, socket); | |
440 | unsigned char map, ioctl; | |
441 | ||
442 | map = io->map; | |
443 | ||
444 | /* Check error conditions */ | |
445 | if (map > 1) { | |
a7149f9a | 446 | dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n"); |
1da177e4 LT |
447 | return -EINVAL; |
448 | } | |
449 | ||
450 | /* Turn off the window before changing anything */ | |
451 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map)) | |
452 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
453 | ||
a7149f9a | 454 | /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n", |
1da177e4 LT |
455 | io->start, io->stop);*/ |
456 | ||
457 | /* write the new values */ | |
458 | indirect_write16(socket, I365_IO(map)+I365_W_START, io->start); | |
459 | indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
460 | ||
461 | ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
462 | ||
463 | if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); | |
464 | if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); | |
465 | if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); | |
466 | ||
467 | indirect_write(socket, I365_IOCTL, ioctl); | |
468 | ||
469 | /* Turn the window back on if needed */ | |
470 | if (io->flags & MAP_ACTIVE) | |
471 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
472 | ||
473 | return 0; | |
474 | } | |
475 | ||
476 | static int pd6729_set_mem_map(struct pcmcia_socket *sock, | |
477 | struct pccard_mem_map *mem) | |
478 | { | |
479 | struct pd6729_socket *socket | |
480 | = container_of(sock, struct pd6729_socket, socket); | |
481 | unsigned short base, i; | |
482 | unsigned char map; | |
483 | ||
484 | map = mem->map; | |
485 | if (map > 4) { | |
a7149f9a | 486 | dev_warn(&sock->dev, "invalid map requested\n"); |
1da177e4 LT |
487 | return -EINVAL; |
488 | } | |
489 | ||
490 | if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) { | |
a7149f9a | 491 | dev_warn(&sock->dev, "invalid invalid address / speed\n"); |
1da177e4 LT |
492 | return -EINVAL; |
493 | } | |
494 | ||
495 | /* Turn off the window before changing anything */ | |
496 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map)) | |
497 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
498 | ||
499 | /* write the start address */ | |
500 | base = I365_MEM(map); | |
501 | i = (mem->res->start >> 12) & 0x0fff; | |
502 | if (mem->flags & MAP_16BIT) | |
503 | i |= I365_MEM_16BIT; | |
504 | if (mem->flags & MAP_0WS) | |
505 | i |= I365_MEM_0WS; | |
506 | indirect_write16(socket, base + I365_W_START, i); | |
507 | ||
508 | /* write the stop address */ | |
509 | ||
510 | i= (mem->res->end >> 12) & 0x0fff; | |
511 | switch (to_cycles(mem->speed)) { | |
512 | case 0: | |
513 | break; | |
514 | case 1: | |
515 | i |= I365_MEM_WS0; | |
516 | break; | |
517 | case 2: | |
518 | i |= I365_MEM_WS1; | |
519 | break; | |
520 | default: | |
521 | i |= I365_MEM_WS1 | I365_MEM_WS0; | |
522 | break; | |
523 | } | |
524 | ||
525 | indirect_write16(socket, base + I365_W_STOP, i); | |
526 | ||
527 | /* Take care of high byte */ | |
528 | indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map)); | |
529 | indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24); | |
530 | ||
531 | /* card start */ | |
532 | ||
533 | i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; | |
534 | if (mem->flags & MAP_WRPROT) | |
535 | i |= I365_MEM_WRPROT; | |
536 | if (mem->flags & MAP_ATTRIB) { | |
a7149f9a DB |
537 | /* dev_dbg(&sock->dev, "requesting attribute memory for " |
538 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
539 | i |= I365_MEM_REG; |
540 | } else { | |
a7149f9a DB |
541 | /* dev_dbg(&sock->dev, "requesting normal memory for " |
542 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
543 | } |
544 | indirect_write16(socket, base + I365_W_OFF, i); | |
545 | ||
546 | /* Enable the window if necessary */ | |
547 | if (mem->flags & MAP_ACTIVE) | |
548 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static int pd6729_init(struct pcmcia_socket *sock) | |
554 | { | |
555 | int i; | |
556 | struct resource res = { .end = 0x0fff }; | |
557 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
558 | pccard_mem_map mem = { .res = &res, }; | |
559 | ||
560 | pd6729_set_socket(sock, &dead_socket); | |
561 | for (i = 0; i < 2; i++) { | |
562 | io.map = i; | |
563 | pd6729_set_io_map(sock, &io); | |
564 | } | |
565 | for (i = 0; i < 5; i++) { | |
566 | mem.map = i; | |
567 | pd6729_set_mem_map(sock, &mem); | |
568 | } | |
569 | ||
570 | return 0; | |
571 | } | |
572 | ||
573 | ||
574 | /* the pccard structure and its functions */ | |
575 | static struct pccard_operations pd6729_operations = { | |
576 | .init = pd6729_init, | |
577 | .get_status = pd6729_get_status, | |
1da177e4 LT |
578 | .set_socket = pd6729_set_socket, |
579 | .set_io_map = pd6729_set_io_map, | |
580 | .set_mem_map = pd6729_set_mem_map, | |
581 | }; | |
582 | ||
7d12e780 | 583 | static irqreturn_t pd6729_test(int irq, void *dev) |
1da177e4 | 584 | { |
a7149f9a | 585 | pr_devel("-> hit on irq %d\n", irq); |
1da177e4 LT |
586 | return IRQ_HANDLED; |
587 | } | |
588 | ||
3e022d0c | 589 | static int pd6729_check_irq(int irq) |
1da177e4 | 590 | { |
3e022d0c K |
591 | if (request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", pd6729_test) |
592 | != 0) return -1; | |
1da177e4 LT |
593 | free_irq(irq, pd6729_test); |
594 | return 0; | |
595 | } | |
596 | ||
9781b8b0 | 597 | static u_int __devinit pd6729_isa_scan(void) |
1da177e4 LT |
598 | { |
599 | u_int mask0, mask = 0; | |
600 | int i; | |
601 | ||
602 | if (irq_mode == 1) { | |
603 | printk(KERN_INFO "pd6729: PCI card interrupts, " | |
604 | "PCI status changes\n"); | |
605 | return 0; | |
606 | } | |
607 | ||
608 | if (irq_list_count == 0) | |
609 | mask0 = 0xffff; | |
610 | else | |
611 | for (i = mask0 = 0; i < irq_list_count; i++) | |
612 | mask0 |= (1<<irq_list[i]); | |
613 | ||
614 | mask0 &= PD67_MASK; | |
615 | ||
616 | /* just find interrupts that aren't in use */ | |
617 | for (i = 0; i < 16; i++) | |
3e022d0c | 618 | if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0)) |
1da177e4 LT |
619 | mask |= (1 << i); |
620 | ||
621 | printk(KERN_INFO "pd6729: ISA irqs = "); | |
622 | for (i = 0; i < 16; i++) | |
623 | if (mask & (1<<i)) | |
624 | printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i); | |
625 | ||
626 | if (mask == 0) printk("none!"); | |
627 | ||
628 | printk(" polling status changes.\n"); | |
629 | ||
630 | return mask; | |
631 | } | |
632 | ||
633 | static int __devinit pd6729_pci_probe(struct pci_dev *dev, | |
634 | const struct pci_device_id *id) | |
635 | { | |
636 | int i, j, ret; | |
637 | u_int mask; | |
638 | char configbyte; | |
639 | struct pd6729_socket *socket; | |
640 | ||
8084b372 | 641 | socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS, |
1da177e4 LT |
642 | GFP_KERNEL); |
643 | if (!socket) | |
644 | return -ENOMEM; | |
645 | ||
1da177e4 LT |
646 | if ((ret = pci_enable_device(dev))) |
647 | goto err_out_free_mem; | |
648 | ||
94efb723 | 649 | if (!pci_resource_start(dev, 0)) { |
a7149f9a DB |
650 | dev_warn(&dev->dev, "refusing to load the driver as the " |
651 | "io_base is NULL.\n"); | |
94efb723 K |
652 | goto err_out_free_mem; |
653 | } | |
654 | ||
a7149f9a DB |
655 | dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " |
656 | "on irq %d\n", | |
490ab72a | 657 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); |
1da177e4 LT |
658 | /* |
659 | * Since we have no memory BARs some firmware may not | |
660 | * have had PCI_COMMAND_MEMORY enabled, yet the device needs it. | |
661 | */ | |
662 | pci_read_config_byte(dev, PCI_COMMAND, &configbyte); | |
663 | if (!(configbyte & PCI_COMMAND_MEMORY)) { | |
a7149f9a | 664 | dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n"); |
1da177e4 LT |
665 | configbyte |= PCI_COMMAND_MEMORY; |
666 | pci_write_config_byte(dev, PCI_COMMAND, configbyte); | |
667 | } | |
668 | ||
669 | ret = pci_request_regions(dev, "pd6729"); | |
670 | if (ret) { | |
a7149f9a | 671 | dev_warn(&dev->dev, "pci request region failed.\n"); |
1da177e4 LT |
672 | goto err_out_disable; |
673 | } | |
674 | ||
675 | if (dev->irq == NO_IRQ) | |
676 | irq_mode = 0; /* fall back to ISA interrupt mode */ | |
677 | ||
678 | mask = pd6729_isa_scan(); | |
679 | if (irq_mode == 0 && mask == 0) { | |
a7149f9a | 680 | dev_warn(&dev->dev, "no ISA interrupt is available.\n"); |
1da177e4 LT |
681 | goto err_out_free_res; |
682 | } | |
683 | ||
684 | for (i = 0; i < MAX_SOCKETS; i++) { | |
685 | socket[i].io_base = pci_resource_start(dev, 0); | |
c35e66a4 | 686 | socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1da177e4 LT |
687 | socket[i].socket.map_size = 0x1000; |
688 | socket[i].socket.irq_mask = mask; | |
689 | socket[i].socket.pci_irq = dev->irq; | |
690 | socket[i].socket.owner = THIS_MODULE; | |
691 | ||
692 | socket[i].number = i; | |
693 | ||
694 | socket[i].socket.ops = &pd6729_operations; | |
695 | socket[i].socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 696 | socket[i].socket.dev.parent = &dev->dev; |
1da177e4 LT |
697 | socket[i].socket.driver_data = &socket[i]; |
698 | } | |
699 | ||
700 | pci_set_drvdata(dev, socket); | |
701 | if (irq_mode == 1) { | |
702 | /* Register the interrupt handler */ | |
dace1453 | 703 | if ((ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, |
1da177e4 | 704 | "pd6729", socket))) { |
a7149f9a DB |
705 | dev_err(&dev->dev, "Failed to register irq %d\n", |
706 | dev->irq); | |
1da177e4 LT |
707 | goto err_out_free_res; |
708 | } | |
709 | } else { | |
710 | /* poll Card status change */ | |
711 | init_timer(&socket->poll_timer); | |
712 | socket->poll_timer.function = pd6729_interrupt_wrapper; | |
713 | socket->poll_timer.data = (unsigned long)socket; | |
714 | socket->poll_timer.expires = jiffies + HZ; | |
715 | add_timer(&socket->poll_timer); | |
716 | } | |
717 | ||
718 | for (i = 0; i < MAX_SOCKETS; i++) { | |
719 | ret = pcmcia_register_socket(&socket[i].socket); | |
720 | if (ret) { | |
a7149f9a | 721 | dev_warn(&dev->dev, "pcmcia_register_socket failed.\n"); |
1da177e4 LT |
722 | for (j = 0; j < i ; j++) |
723 | pcmcia_unregister_socket(&socket[j].socket); | |
724 | goto err_out_free_res2; | |
725 | } | |
726 | } | |
727 | ||
728 | return 0; | |
729 | ||
730 | err_out_free_res2: | |
731 | if (irq_mode == 1) | |
732 | free_irq(dev->irq, socket); | |
733 | else | |
734 | del_timer_sync(&socket->poll_timer); | |
735 | err_out_free_res: | |
736 | pci_release_regions(dev); | |
737 | err_out_disable: | |
738 | pci_disable_device(dev); | |
739 | ||
740 | err_out_free_mem: | |
741 | kfree(socket); | |
742 | return ret; | |
743 | } | |
744 | ||
745 | static void __devexit pd6729_pci_remove(struct pci_dev *dev) | |
746 | { | |
747 | int i; | |
748 | struct pd6729_socket *socket = pci_get_drvdata(dev); | |
749 | ||
750 | for (i = 0; i < MAX_SOCKETS; i++) { | |
751 | /* Turn off all interrupt sources */ | |
752 | indirect_write(&socket[i], I365_CSCINT, 0); | |
753 | indirect_write(&socket[i], I365_INTCTL, 0); | |
754 | ||
755 | pcmcia_unregister_socket(&socket[i].socket); | |
756 | } | |
757 | ||
758 | if (irq_mode == 1) | |
759 | free_irq(dev->irq, socket); | |
760 | else | |
761 | del_timer_sync(&socket->poll_timer); | |
762 | pci_release_regions(dev); | |
763 | pci_disable_device(dev); | |
764 | ||
765 | kfree(socket); | |
766 | } | |
767 | ||
f237de58 | 768 | #ifdef CONFIG_PM |
1da177e4 LT |
769 | static int pd6729_socket_suspend(struct pci_dev *dev, pm_message_t state) |
770 | { | |
827b4649 | 771 | return pcmcia_socket_dev_suspend(&dev->dev); |
1da177e4 LT |
772 | } |
773 | ||
774 | static int pd6729_socket_resume(struct pci_dev *dev) | |
775 | { | |
776 | return pcmcia_socket_dev_resume(&dev->dev); | |
777 | } | |
f237de58 | 778 | #endif |
1da177e4 LT |
779 | |
780 | static struct pci_device_id pd6729_pci_ids[] = { | |
781 | { | |
782 | .vendor = PCI_VENDOR_ID_CIRRUS, | |
783 | .device = PCI_DEVICE_ID_CIRRUS_6729, | |
784 | .subvendor = PCI_ANY_ID, | |
785 | .subdevice = PCI_ANY_ID, | |
786 | }, | |
787 | { } | |
788 | }; | |
789 | MODULE_DEVICE_TABLE(pci, pd6729_pci_ids); | |
790 | ||
ba66ddfa | 791 | static struct pci_driver pd6729_pci_driver = { |
1da177e4 LT |
792 | .name = "pd6729", |
793 | .id_table = pd6729_pci_ids, | |
794 | .probe = pd6729_pci_probe, | |
795 | .remove = __devexit_p(pd6729_pci_remove), | |
f237de58 | 796 | #ifdef CONFIG_PM |
1da177e4 LT |
797 | .suspend = pd6729_socket_suspend, |
798 | .resume = pd6729_socket_resume, | |
f237de58 | 799 | #endif |
1da177e4 LT |
800 | }; |
801 | ||
802 | static int pd6729_module_init(void) | |
803 | { | |
ba66ddfa | 804 | return pci_register_driver(&pd6729_pci_driver); |
1da177e4 LT |
805 | } |
806 | ||
807 | static void pd6729_module_exit(void) | |
808 | { | |
ba66ddfa | 809 | pci_unregister_driver(&pd6729_pci_driver); |
1da177e4 LT |
810 | } |
811 | ||
812 | module_init(pd6729_module_init); | |
813 | module_exit(pd6729_module_exit); |