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Commit | Line | Data |
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09c434b8 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * Regular cardbus driver ("yenta_socket") | |
4 | * | |
5 | * (C) Copyright 1999, 2000 Linus Torvalds | |
6 | * | |
7 | * Changelog: | |
8 | * Aug 2002: Manfred Spraul <manfred@colorfullife.com> | |
9 | * Dynamically adjust the size of the bridge resource | |
9fea84f4 | 10 | * |
1da177e4 LT |
11 | * May 2003: Dominik Brodowski <linux@brodo.de> |
12 | * Merge pci_socket.c and yenta.c into one file | |
13 | */ | |
14 | #include <linux/init.h> | |
15 | #include <linux/pci.h> | |
1da177e4 LT |
16 | #include <linux/workqueue.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/module.h> | |
9fea84f4 | 20 | #include <linux/io.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1da177e4 | 22 | |
1da177e4 | 23 | #include <pcmcia/ss.h> |
1da177e4 | 24 | |
1da177e4 LT |
25 | #include "yenta_socket.h" |
26 | #include "i82365.h" | |
27 | ||
90ab5ee9 | 28 | static bool disable_clkrun; |
1da177e4 | 29 | module_param(disable_clkrun, bool, 0444); |
95691e3e MS |
30 | MODULE_PARM_DESC(disable_clkrun, |
31 | "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)"); | |
1da177e4 | 32 | |
90ab5ee9 | 33 | static bool isa_probe = 1; |
fa912bcb DR |
34 | module_param(isa_probe, bool, 0444); |
35 | MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); | |
36 | ||
90ab5ee9 | 37 | static bool pwr_irqs_off; |
fa912bcb DR |
38 | module_param(pwr_irqs_off, bool, 0644); |
39 | MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); | |
40 | ||
35169529 WS |
41 | static char o2_speedup[] = "default"; |
42 | module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444); | |
43 | MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' " | |
44 | "or 'default' (uses recommended behaviour for the detected bridge)"); | |
45 | ||
0d3a940d JK |
46 | /* |
47 | * Only probe "regular" interrupts, don't | |
48 | * touch dangerous spots like the mouse irq, | |
49 | * because there are mice that apparently | |
50 | * get really confused if they get fondled | |
51 | * too intimately. | |
52 | * | |
53 | * Default to 11, 10, 9, 7, 6, 5, 4, 3. | |
54 | */ | |
55 | static u32 isa_interrupts = 0x0ef8; | |
56 | ||
57 | ||
dd797d81 | 58 | #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) |
1da177e4 LT |
59 | |
60 | /* Don't ask.. */ | |
61 | #define to_cycles(ns) ((ns)/120) | |
62 | #define to_ns(cycles) ((cycles)*120) | |
63 | ||
78187865 | 64 | /* |
63e7ebd0 DR |
65 | * yenta PCI irq probing. |
66 | * currently only used in the TI/EnE initialization code | |
67 | */ | |
68 | #ifdef CONFIG_YENTA_TI | |
1da177e4 | 69 | static int yenta_probe_cb_irq(struct yenta_socket *socket); |
0d3a940d JK |
70 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, |
71 | u32 isa_irq_mask); | |
63e7ebd0 | 72 | #endif |
1da177e4 LT |
73 | |
74 | ||
75 | static unsigned int override_bios; | |
76 | module_param(override_bios, uint, 0000); | |
9fea84f4 | 77 | MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation"); |
1da177e4 LT |
78 | |
79 | /* | |
80 | * Generate easy-to-use ways of reading a cardbus sockets | |
81 | * regular memory space ("cb_xxx"), configuration space | |
82 | * ("config_xxx") and compatibility space ("exca_xxxx") | |
83 | */ | |
84 | static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) | |
85 | { | |
86 | u32 val = readl(socket->base + reg); | |
dd797d81 | 87 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 LT |
88 | return val; |
89 | } | |
90 | ||
91 | static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) | |
92 | { | |
dd797d81 | 93 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 | 94 | writel(val, socket->base + reg); |
c8751e4c | 95 | readl(socket->base + reg); /* avoid problems with PCI write posting */ |
1da177e4 LT |
96 | } |
97 | ||
98 | static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) | |
99 | { | |
100 | u8 val; | |
101 | pci_read_config_byte(socket->dev, offset, &val); | |
dd797d81 | 102 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
103 | return val; |
104 | } | |
105 | ||
106 | static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) | |
107 | { | |
108 | u16 val; | |
109 | pci_read_config_word(socket->dev, offset, &val); | |
dd797d81 | 110 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
111 | return val; |
112 | } | |
113 | ||
114 | static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) | |
115 | { | |
116 | u32 val; | |
117 | pci_read_config_dword(socket->dev, offset, &val); | |
dd797d81 | 118 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
119 | return val; |
120 | } | |
121 | ||
122 | static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) | |
123 | { | |
dd797d81 | 124 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
125 | pci_write_config_byte(socket->dev, offset, val); |
126 | } | |
127 | ||
128 | static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) | |
129 | { | |
dd797d81 | 130 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
131 | pci_write_config_word(socket->dev, offset, val); |
132 | } | |
133 | ||
134 | static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) | |
135 | { | |
dd797d81 | 136 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
137 | pci_write_config_dword(socket->dev, offset, val); |
138 | } | |
139 | ||
140 | static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) | |
141 | { | |
142 | u8 val = readb(socket->base + 0x800 + reg); | |
dd797d81 | 143 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 LT |
144 | return val; |
145 | } | |
146 | ||
147 | static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) | |
148 | { | |
149 | u16 val; | |
150 | val = readb(socket->base + 0x800 + reg); | |
151 | val |= readb(socket->base + 0x800 + reg + 1) << 8; | |
dd797d81 | 152 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
153 | return val; |
154 | } | |
155 | ||
156 | static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) | |
157 | { | |
dd797d81 | 158 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 | 159 | writeb(val, socket->base + 0x800 + reg); |
c8751e4c | 160 | readb(socket->base + 0x800 + reg); /* PCI write posting... */ |
1da177e4 LT |
161 | } |
162 | ||
163 | static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) | |
164 | { | |
dd797d81 | 165 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
166 | writeb(val, socket->base + 0x800 + reg); |
167 | writeb(val >> 8, socket->base + 0x800 + reg + 1); | |
c8751e4c DR |
168 | |
169 | /* PCI write posting... */ | |
170 | readb(socket->base + 0x800 + reg); | |
171 | readb(socket->base + 0x800 + reg + 1); | |
1da177e4 LT |
172 | } |
173 | ||
030ee39c LT |
174 | static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) |
175 | { | |
176 | struct pci_dev *dev = to_pci_dev(yentadev); | |
177 | struct yenta_socket *socket = pci_get_drvdata(dev); | |
178 | int offset = 0, i; | |
179 | ||
180 | offset = snprintf(buf, PAGE_SIZE, "CB registers:"); | |
181 | for (i = 0; i < 0x24; i += 4) { | |
182 | unsigned val; | |
183 | if (!(i & 15)) | |
184 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
185 | val = cb_readl(socket, i); | |
186 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); | |
187 | } | |
188 | ||
189 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); | |
190 | for (i = 0; i < 0x45; i++) { | |
191 | unsigned char val; | |
192 | if (!(i & 7)) { | |
193 | if (i & 8) { | |
194 | memcpy(buf + offset, " -", 2); | |
195 | offset += 2; | |
196 | } else | |
197 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
198 | } | |
199 | val = exca_readb(socket, i); | |
200 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); | |
201 | } | |
202 | buf[offset++] = '\n'; | |
203 | return offset; | |
204 | } | |
205 | ||
206 | static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); | |
207 | ||
1da177e4 LT |
208 | /* |
209 | * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend | |
210 | * on what kind of card is inserted.. | |
211 | */ | |
212 | static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) | |
213 | { | |
214 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
215 | unsigned int val; | |
216 | u32 state = cb_readl(socket, CB_SOCKET_STATE); | |
217 | ||
218 | val = (state & CB_3VCARD) ? SS_3VCARD : 0; | |
219 | val |= (state & CB_XVCARD) ? SS_XVCARD : 0; | |
fa912bcb DR |
220 | val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; |
221 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; | |
222 | ||
1da177e4 LT |
223 | |
224 | if (state & CB_CBCARD) { | |
dd797d81 | 225 | val |= SS_CARDBUS; |
1da177e4 LT |
226 | val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; |
227 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; | |
228 | val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; | |
fa912bcb | 229 | } else if (state & CB_16BITCARD) { |
1da177e4 LT |
230 | u8 status = exca_readb(socket, I365_STATUS); |
231 | val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; | |
232 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
233 | val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; | |
234 | } else { | |
235 | val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; | |
236 | val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; | |
237 | } | |
238 | val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; | |
239 | val |= (status & I365_CS_READY) ? SS_READY : 0; | |
240 | val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; | |
241 | } | |
242 | ||
243 | *value = val; | |
244 | return 0; | |
245 | } | |
246 | ||
1da177e4 LT |
247 | static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) |
248 | { | |
ea2f1590 DR |
249 | /* some birdges require to use the ExCA registers to power 16bit cards */ |
250 | if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && | |
251 | (socket->flags & YENTA_16BIT_POWER_EXCA)) { | |
252 | u8 reg, old; | |
253 | reg = old = exca_readb(socket, I365_POWER); | |
254 | reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); | |
255 | ||
256 | /* i82365SL-DF style */ | |
257 | if (socket->flags & YENTA_16BIT_POWER_DF) { | |
258 | switch (state->Vcc) { | |
9fea84f4 DB |
259 | case 33: |
260 | reg |= I365_VCC_3V; | |
261 | break; | |
262 | case 50: | |
263 | reg |= I365_VCC_5V; | |
264 | break; | |
265 | default: | |
266 | reg = 0; | |
267 | break; | |
ea2f1590 DR |
268 | } |
269 | switch (state->Vpp) { | |
270 | case 33: | |
9fea84f4 DB |
271 | case 50: |
272 | reg |= I365_VPP1_5V; | |
273 | break; | |
274 | case 120: | |
275 | reg |= I365_VPP1_12V; | |
276 | break; | |
ea2f1590 DR |
277 | } |
278 | } else { | |
279 | /* i82365SL-B style */ | |
280 | switch (state->Vcc) { | |
9fea84f4 DB |
281 | case 50: |
282 | reg |= I365_VCC_5V; | |
283 | break; | |
284 | default: | |
285 | reg = 0; | |
286 | break; | |
ea2f1590 DR |
287 | } |
288 | switch (state->Vpp) { | |
9fea84f4 DB |
289 | case 50: |
290 | reg |= I365_VPP1_5V | I365_VPP2_5V; | |
291 | break; | |
292 | case 120: | |
293 | reg |= I365_VPP1_12V | I365_VPP2_12V; | |
294 | break; | |
ea2f1590 DR |
295 | } |
296 | } | |
297 | ||
298 | if (reg != old) | |
299 | exca_writeb(socket, I365_POWER, reg); | |
300 | } else { | |
301 | u32 reg = 0; /* CB_SC_STPCLK? */ | |
302 | switch (state->Vcc) { | |
9fea84f4 DB |
303 | case 33: |
304 | reg = CB_SC_VCC_3V; | |
305 | break; | |
306 | case 50: | |
307 | reg = CB_SC_VCC_5V; | |
308 | break; | |
309 | default: | |
310 | reg = 0; | |
311 | break; | |
ea2f1590 DR |
312 | } |
313 | switch (state->Vpp) { | |
9fea84f4 DB |
314 | case 33: |
315 | reg |= CB_SC_VPP_3V; | |
316 | break; | |
317 | case 50: | |
318 | reg |= CB_SC_VPP_5V; | |
319 | break; | |
320 | case 120: | |
321 | reg |= CB_SC_VPP_12V; | |
322 | break; | |
ea2f1590 DR |
323 | } |
324 | if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) | |
325 | cb_writel(socket, CB_SOCKET_CONTROL, reg); | |
1da177e4 | 326 | } |
1da177e4 LT |
327 | } |
328 | ||
329 | static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) | |
330 | { | |
331 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
332 | u16 bridge; | |
333 | ||
d250a481 DR |
334 | /* if powering down: do it immediately */ |
335 | if (state->Vcc == 0) | |
336 | yenta_set_power(socket, state); | |
337 | ||
1da177e4 LT |
338 | socket->io_irq = state->io_irq; |
339 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); | |
340 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { | |
341 | u8 intr; | |
342 | bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; | |
343 | ||
344 | /* ISA interrupt control? */ | |
345 | intr = exca_readb(socket, I365_INTCTL); | |
346 | intr = (intr & ~0xf); | |
ba8819e9 JK |
347 | if (!socket->dev->irq) { |
348 | intr |= socket->cb_irq ? socket->cb_irq : state->io_irq; | |
1da177e4 LT |
349 | bridge |= CB_BRIDGE_INTR; |
350 | } | |
351 | exca_writeb(socket, I365_INTCTL, intr); | |
352 | } else { | |
353 | u8 reg; | |
354 | ||
355 | reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); | |
356 | reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; | |
357 | reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; | |
ba8819e9 | 358 | if (state->io_irq != socket->dev->irq) { |
1da177e4 LT |
359 | reg |= state->io_irq; |
360 | bridge |= CB_BRIDGE_INTR; | |
361 | } | |
362 | exca_writeb(socket, I365_INTCTL, reg); | |
363 | ||
364 | reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); | |
365 | reg |= I365_PWR_NORESET; | |
9fea84f4 DB |
366 | if (state->flags & SS_PWR_AUTO) |
367 | reg |= I365_PWR_AUTO; | |
368 | if (state->flags & SS_OUTPUT_ENA) | |
369 | reg |= I365_PWR_OUT; | |
1da177e4 LT |
370 | if (exca_readb(socket, I365_POWER) != reg) |
371 | exca_writeb(socket, I365_POWER, reg); | |
372 | ||
373 | /* CSC interrupt: no ISA irq for CSC */ | |
28ca8dd7 JK |
374 | reg = exca_readb(socket, I365_CSCINT); |
375 | reg &= I365_CSC_IRQ_MASK; | |
376 | reg |= I365_CSC_DETECT; | |
1da177e4 | 377 | if (state->flags & SS_IOCARD) { |
9fea84f4 DB |
378 | if (state->csc_mask & SS_STSCHG) |
379 | reg |= I365_CSC_STSCHG; | |
1da177e4 | 380 | } else { |
9fea84f4 DB |
381 | if (state->csc_mask & SS_BATDEAD) |
382 | reg |= I365_CSC_BVD1; | |
383 | if (state->csc_mask & SS_BATWARN) | |
384 | reg |= I365_CSC_BVD2; | |
385 | if (state->csc_mask & SS_READY) | |
386 | reg |= I365_CSC_READY; | |
1da177e4 LT |
387 | } |
388 | exca_writeb(socket, I365_CSCINT, reg); | |
389 | exca_readb(socket, I365_CSC); | |
9fea84f4 | 390 | if (sock->zoom_video) |
1da177e4 LT |
391 | sock->zoom_video(sock, state->flags & SS_ZVCARD); |
392 | } | |
393 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
394 | /* Socket event mask: get card insert/remove events.. */ | |
395 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
396 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
d250a481 DR |
397 | |
398 | /* if powering up: do it as the last step when the socket is configured */ | |
399 | if (state->Vcc != 0) | |
400 | yenta_set_power(socket, state); | |
1da177e4 LT |
401 | return 0; |
402 | } | |
403 | ||
404 | static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |
405 | { | |
406 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
407 | int map; | |
408 | unsigned char ioctl, addr, enable; | |
409 | ||
410 | map = io->map; | |
411 | ||
412 | if (map > 1) | |
413 | return -EINVAL; | |
414 | ||
415 | enable = I365_ENA_IO(map); | |
416 | addr = exca_readb(socket, I365_ADDRWIN); | |
417 | ||
418 | /* Disable the window before changing it.. */ | |
419 | if (addr & enable) { | |
420 | addr &= ~enable; | |
421 | exca_writeb(socket, I365_ADDRWIN, addr); | |
422 | } | |
423 | ||
424 | exca_writew(socket, I365_IO(map)+I365_W_START, io->start); | |
425 | exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
426 | ||
427 | ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
9fea84f4 DB |
428 | if (io->flags & MAP_0WS) |
429 | ioctl |= I365_IOCTL_0WS(map); | |
430 | if (io->flags & MAP_16BIT) | |
431 | ioctl |= I365_IOCTL_16BIT(map); | |
432 | if (io->flags & MAP_AUTOSZ) | |
433 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
434 | exca_writeb(socket, I365_IOCTL, ioctl); |
435 | ||
436 | if (io->flags & MAP_ACTIVE) | |
437 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
438 | return 0; | |
439 | } | |
440 | ||
441 | static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) | |
442 | { | |
443 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
444 | struct pci_bus_region region; | |
445 | int map; | |
446 | unsigned char addr, enable; | |
447 | unsigned int start, stop, card_start; | |
448 | unsigned short word; | |
449 | ||
fc279850 | 450 | pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res); |
1da177e4 LT |
451 | |
452 | map = mem->map; | |
453 | start = region.start; | |
454 | stop = region.end; | |
455 | card_start = mem->card_start; | |
456 | ||
457 | if (map > 4 || start > stop || ((start ^ stop) >> 24) || | |
458 | (card_start >> 26) || mem->speed > 1000) | |
459 | return -EINVAL; | |
460 | ||
461 | enable = I365_ENA_MEM(map); | |
462 | addr = exca_readb(socket, I365_ADDRWIN); | |
463 | if (addr & enable) { | |
464 | addr &= ~enable; | |
465 | exca_writeb(socket, I365_ADDRWIN, addr); | |
466 | } | |
467 | ||
468 | exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); | |
469 | ||
470 | word = (start >> 12) & 0x0fff; | |
471 | if (mem->flags & MAP_16BIT) | |
472 | word |= I365_MEM_16BIT; | |
473 | if (mem->flags & MAP_0WS) | |
474 | word |= I365_MEM_0WS; | |
475 | exca_writew(socket, I365_MEM(map) + I365_W_START, word); | |
476 | ||
477 | word = (stop >> 12) & 0x0fff; | |
478 | switch (to_cycles(mem->speed)) { | |
9fea84f4 DB |
479 | case 0: |
480 | break; | |
481 | case 1: | |
482 | word |= I365_MEM_WS0; | |
483 | break; | |
484 | case 2: | |
485 | word |= I365_MEM_WS1; | |
486 | break; | |
487 | default: | |
488 | word |= I365_MEM_WS1 | I365_MEM_WS0; | |
489 | break; | |
1da177e4 LT |
490 | } |
491 | exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); | |
492 | ||
493 | word = ((card_start - start) >> 12) & 0x3fff; | |
494 | if (mem->flags & MAP_WRPROT) | |
495 | word |= I365_MEM_WRPROT; | |
496 | if (mem->flags & MAP_ATTRIB) | |
497 | word |= I365_MEM_REG; | |
498 | exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); | |
499 | ||
500 | if (mem->flags & MAP_ACTIVE) | |
501 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
502 | return 0; | |
503 | } | |
504 | ||
505 | ||
fa912bcb | 506 | |
7d12e780 | 507 | static irqreturn_t yenta_interrupt(int irq, void *dev_id) |
1da177e4 | 508 | { |
fa912bcb DR |
509 | unsigned int events; |
510 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
1da177e4 LT |
511 | u8 csc; |
512 | u32 cb_event; | |
1da177e4 LT |
513 | |
514 | /* Clear interrupt status for the event */ | |
515 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
516 | cb_writel(socket, CB_SOCKET_EVENT, cb_event); | |
517 | ||
518 | csc = exca_readb(socket, I365_CSC); | |
519 | ||
e4115805 DR |
520 | if (!(cb_event || csc)) |
521 | return IRQ_NONE; | |
522 | ||
1da177e4 LT |
523 | events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; |
524 | events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; | |
525 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
526 | events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; | |
527 | } else { | |
528 | events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; | |
529 | events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; | |
530 | events |= (csc & I365_CSC_READY) ? SS_READY : 0; | |
531 | } | |
1da177e4 | 532 | |
fa912bcb | 533 | if (events) |
1da177e4 | 534 | pcmcia_parse_events(&socket->socket, events); |
fa912bcb | 535 | |
e4115805 | 536 | return IRQ_HANDLED; |
1da177e4 LT |
537 | } |
538 | ||
41760d0e | 539 | static void yenta_interrupt_wrapper(struct timer_list *t) |
1da177e4 | 540 | { |
41760d0e | 541 | struct yenta_socket *socket = from_timer(socket, t, poll_timer); |
1da177e4 | 542 | |
7d12e780 | 543 | yenta_interrupt(0, (void *)socket); |
1da177e4 LT |
544 | socket->poll_timer.expires = jiffies + HZ; |
545 | add_timer(&socket->poll_timer); | |
546 | } | |
547 | ||
548 | static void yenta_clear_maps(struct yenta_socket *socket) | |
549 | { | |
550 | int i; | |
551 | struct resource res = { .start = 0, .end = 0x0fff }; | |
552 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
553 | pccard_mem_map mem = { .res = &res, }; | |
554 | ||
555 | yenta_set_socket(&socket->socket, &dead_socket); | |
556 | for (i = 0; i < 2; i++) { | |
557 | io.map = i; | |
558 | yenta_set_io_map(&socket->socket, &io); | |
559 | } | |
560 | for (i = 0; i < 5; i++) { | |
561 | mem.map = i; | |
562 | yenta_set_mem_map(&socket->socket, &mem); | |
563 | } | |
564 | } | |
565 | ||
fa912bcb DR |
566 | /* redoes voltage interrogation if required */ |
567 | static void yenta_interrogate(struct yenta_socket *socket) | |
568 | { | |
569 | u32 state; | |
570 | ||
571 | state = cb_readl(socket, CB_SOCKET_STATE); | |
572 | if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || | |
573 | (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || | |
574 | ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) | |
575 | cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); | |
576 | } | |
577 | ||
1da177e4 LT |
578 | /* Called at resume and initialization events */ |
579 | static int yenta_sock_init(struct pcmcia_socket *sock) | |
580 | { | |
581 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
1da177e4 LT |
582 | |
583 | exca_writeb(socket, I365_GBLCTL, 0x00); | |
584 | exca_writeb(socket, I365_GENCTL, 0x00); | |
585 | ||
586 | /* Redo card voltage interrogation */ | |
fa912bcb | 587 | yenta_interrogate(socket); |
1da177e4 LT |
588 | |
589 | yenta_clear_maps(socket); | |
590 | ||
591 | if (socket->type && socket->type->sock_init) | |
592 | socket->type->sock_init(socket); | |
593 | ||
594 | /* Re-enable CSC interrupts */ | |
595 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
596 | ||
597 | return 0; | |
598 | } | |
599 | ||
600 | static int yenta_sock_suspend(struct pcmcia_socket *sock) | |
601 | { | |
602 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
603 | ||
604 | /* Disable CSC interrupts */ | |
605 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
606 | ||
607 | return 0; | |
608 | } | |
609 | ||
610 | /* | |
611 | * Use an adaptive allocation for the memory resource, | |
612 | * sometimes the memory behind pci bridges is limited: | |
613 | * 1/8 of the size of the io window of the parent. | |
eb0a90b4 DB |
614 | * max 4 MB, min 16 kB. We try very hard to not get below |
615 | * the "ACC" values, though. | |
1da177e4 | 616 | */ |
9fea84f4 DB |
617 | #define BRIDGE_MEM_MAX (4*1024*1024) |
618 | #define BRIDGE_MEM_ACC (128*1024) | |
619 | #define BRIDGE_MEM_MIN (16*1024) | |
1da177e4 | 620 | |
eb0a90b4 DB |
621 | #define BRIDGE_IO_MAX 512 |
622 | #define BRIDGE_IO_ACC 256 | |
1da177e4 LT |
623 | #define BRIDGE_IO_MIN 32 |
624 | ||
625 | #ifndef PCIBIOS_MIN_CARDBUS_IO | |
626 | #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO | |
627 | #endif | |
628 | ||
eb0a90b4 DB |
629 | static int yenta_search_one_res(struct resource *root, struct resource *res, |
630 | u32 min) | |
631 | { | |
632 | u32 align, size, start, end; | |
633 | ||
634 | if (res->flags & IORESOURCE_IO) { | |
635 | align = 1024; | |
636 | size = BRIDGE_IO_MAX; | |
637 | start = PCIBIOS_MIN_CARDBUS_IO; | |
638 | end = ~0U; | |
639 | } else { | |
640 | unsigned long avail = root->end - root->start; | |
641 | int i; | |
642 | size = BRIDGE_MEM_MAX; | |
643 | if (size > avail/8) { | |
9fea84f4 | 644 | size = (avail+1)/8; |
eb0a90b4 DB |
645 | /* round size down to next power of 2 */ |
646 | i = 0; | |
647 | while ((size /= 2) != 0) | |
648 | i++; | |
649 | size = 1 << i; | |
650 | } | |
651 | if (size < min) | |
652 | size = min; | |
653 | align = size; | |
654 | start = PCIBIOS_MIN_MEM; | |
655 | end = ~0U; | |
656 | } | |
657 | ||
658 | do { | |
659 | if (allocate_resource(root, res, size, start, end, align, | |
9fea84f4 | 660 | NULL, NULL) == 0) { |
eb0a90b4 DB |
661 | return 1; |
662 | } | |
663 | size = size/2; | |
664 | align = size; | |
665 | } while (size >= min); | |
666 | ||
667 | return 0; | |
668 | } | |
669 | ||
670 | ||
671 | static int yenta_search_res(struct yenta_socket *socket, struct resource *res, | |
672 | u32 min) | |
673 | { | |
89a74ecc | 674 | struct resource *root; |
eb0a90b4 | 675 | int i; |
89a74ecc BH |
676 | |
677 | pci_bus_for_each_resource(socket->dev->bus, root, i) { | |
eb0a90b4 DB |
678 | if (!root) |
679 | continue; | |
680 | ||
681 | if ((res->flags ^ root->flags) & | |
682 | (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) | |
683 | continue; /* Wrong type */ | |
684 | ||
685 | if (yenta_search_one_res(root, res, min)) | |
686 | return 1; | |
687 | } | |
688 | return 0; | |
689 | } | |
690 | ||
b3743fa4 | 691 | static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) |
1da177e4 | 692 | { |
852710d9 MW |
693 | struct pci_dev *dev = socket->dev; |
694 | struct resource *res; | |
43c34735 | 695 | struct pci_bus_region region; |
1da177e4 LT |
696 | unsigned mask; |
697 | ||
852710d9 | 698 | res = dev->resource + PCI_BRIDGE_RESOURCES + nr; |
7925407a IK |
699 | /* Already allocated? */ |
700 | if (res->parent) | |
b3743fa4 | 701 | return 0; |
7925407a | 702 | |
1da177e4 LT |
703 | /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ |
704 | mask = ~0xfff; | |
705 | if (type & IORESOURCE_IO) | |
706 | mask = ~3; | |
707 | ||
852710d9 | 708 | res->name = dev->subordinate->name; |
1da177e4 | 709 | res->flags = type; |
1da177e4 | 710 | |
43c34735 DB |
711 | region.start = config_readl(socket, addr_start) & mask; |
712 | region.end = config_readl(socket, addr_end) | ~mask; | |
713 | if (region.start && region.end > region.start && !override_bios) { | |
fc279850 | 714 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
852710d9 | 715 | if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0) |
b3743fa4 | 716 | return 0; |
f2e6cf76 JP |
717 | dev_info(&dev->dev, |
718 | "Preassigned resource %d busy or not available, reconfiguring...\n", | |
719 | nr); | |
1da177e4 LT |
720 | } |
721 | ||
722 | if (type & IORESOURCE_IO) { | |
eb0a90b4 DB |
723 | if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || |
724 | (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || | |
b3743fa4 DB |
725 | (yenta_search_res(socket, res, BRIDGE_IO_MIN))) |
726 | return 1; | |
1da177e4 | 727 | } else { |
eb0a90b4 DB |
728 | if (type & IORESOURCE_PREFETCH) { |
729 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || | |
730 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
731 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
732 | return 1; | |
eb0a90b4 DB |
733 | /* Approximating prefetchable by non-prefetchable */ |
734 | res->flags = IORESOURCE_MEM; | |
1da177e4 | 735 | } |
eb0a90b4 DB |
736 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || |
737 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
738 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
739 | return 1; | |
eb0a90b4 DB |
740 | } |
741 | ||
f2e6cf76 JP |
742 | dev_info(&dev->dev, |
743 | "no resource of type %x available, trying to continue...\n", | |
744 | type); | |
eb0a90b4 | 745 | res->start = res->end = res->flags = 0; |
b3743fa4 | 746 | return 0; |
1da177e4 LT |
747 | } |
748 | ||
749 | /* | |
750 | * Allocate the bridge mappings for the device.. | |
751 | */ | |
752 | static void yenta_allocate_resources(struct yenta_socket *socket) | |
753 | { | |
b3743fa4 DB |
754 | int program = 0; |
755 | program += yenta_allocate_res(socket, 0, IORESOURCE_IO, | |
27879835 | 756 | PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); |
b3743fa4 | 757 | program += yenta_allocate_res(socket, 1, IORESOURCE_IO, |
27879835 | 758 | PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); |
b3743fa4 | 759 | program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, |
27879835 | 760 | PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); |
b3743fa4 | 761 | program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, |
27879835 | 762 | PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); |
b3743fa4 DB |
763 | if (program) |
764 | pci_setup_cardbus(socket->dev->subordinate); | |
1da177e4 LT |
765 | } |
766 | ||
767 | ||
768 | /* | |
769 | * Free the bridge mappings for the device.. | |
770 | */ | |
771 | static void yenta_free_resources(struct yenta_socket *socket) | |
772 | { | |
773 | int i; | |
9fea84f4 | 774 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
775 | struct resource *res; |
776 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; | |
777 | if (res->start != 0 && res->end != 0) | |
778 | release_resource(res); | |
b3743fa4 | 779 | res->start = res->end = res->flags = 0; |
1da177e4 LT |
780 | } |
781 | } | |
782 | ||
783 | ||
784 | /* | |
785 | * Close it down - release our resources and go home.. | |
786 | */ | |
e765a02c | 787 | static void yenta_close(struct pci_dev *dev) |
1da177e4 LT |
788 | { |
789 | struct yenta_socket *sock = pci_get_drvdata(dev); | |
790 | ||
030ee39c LT |
791 | /* Remove the register attributes */ |
792 | device_remove_file(&dev->dev, &dev_attr_yenta_registers); | |
793 | ||
1da177e4 LT |
794 | /* we don't want a dying socket registered */ |
795 | pcmcia_unregister_socket(&sock->socket); | |
9fea84f4 | 796 | |
1da177e4 LT |
797 | /* Disable all events so we don't die in an IRQ storm */ |
798 | cb_writel(sock, CB_SOCKET_MASK, 0x0); | |
799 | exca_writeb(sock, I365_CSCINT, 0); | |
800 | ||
801 | if (sock->cb_irq) | |
802 | free_irq(sock->cb_irq, sock); | |
803 | else | |
804 | del_timer_sync(&sock->poll_timer); | |
805 | ||
d19319af | 806 | iounmap(sock->base); |
1da177e4 LT |
807 | yenta_free_resources(sock); |
808 | ||
809 | pci_release_regions(dev); | |
810 | pci_disable_device(dev); | |
811 | pci_set_drvdata(dev, NULL); | |
d19319af | 812 | kfree(sock); |
1da177e4 LT |
813 | } |
814 | ||
815 | ||
816 | static struct pccard_operations yenta_socket_operations = { | |
817 | .init = yenta_sock_init, | |
818 | .suspend = yenta_sock_suspend, | |
819 | .get_status = yenta_get_status, | |
1da177e4 LT |
820 | .set_socket = yenta_set_socket, |
821 | .set_io_map = yenta_set_io_map, | |
822 | .set_mem_map = yenta_set_mem_map, | |
823 | }; | |
824 | ||
825 | ||
63e7ebd0 | 826 | #ifdef CONFIG_YENTA_TI |
1da177e4 | 827 | #include "ti113x.h" |
63e7ebd0 DR |
828 | #endif |
829 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 | 830 | #include "ricoh.h" |
63e7ebd0 DR |
831 | #endif |
832 | #ifdef CONFIG_YENTA_TOSHIBA | |
1da177e4 | 833 | #include "topic.h" |
63e7ebd0 DR |
834 | #endif |
835 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 | 836 | #include "o2micro.h" |
63e7ebd0 | 837 | #endif |
1da177e4 LT |
838 | |
839 | enum { | |
840 | CARDBUS_TYPE_DEFAULT = -1, | |
841 | CARDBUS_TYPE_TI, | |
842 | CARDBUS_TYPE_TI113X, | |
843 | CARDBUS_TYPE_TI12XX, | |
844 | CARDBUS_TYPE_TI1250, | |
845 | CARDBUS_TYPE_RICOH, | |
ea2f1590 | 846 | CARDBUS_TYPE_TOPIC95, |
1da177e4 LT |
847 | CARDBUS_TYPE_TOPIC97, |
848 | CARDBUS_TYPE_O2MICRO, | |
8c3520d4 | 849 | CARDBUS_TYPE_ENE, |
1da177e4 LT |
850 | }; |
851 | ||
852 | /* | |
853 | * Different cardbus controllers have slightly different | |
854 | * initialization sequences etc details. List them here.. | |
855 | */ | |
856 | static struct cardbus_type cardbus_type[] = { | |
63e7ebd0 | 857 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
858 | [CARDBUS_TYPE_TI] = { |
859 | .override = ti_override, | |
860 | .save_state = ti_save_state, | |
861 | .restore_state = ti_restore_state, | |
862 | .sock_init = ti_init, | |
863 | }, | |
864 | [CARDBUS_TYPE_TI113X] = { | |
865 | .override = ti113x_override, | |
866 | .save_state = ti_save_state, | |
867 | .restore_state = ti_restore_state, | |
868 | .sock_init = ti_init, | |
869 | }, | |
870 | [CARDBUS_TYPE_TI12XX] = { | |
871 | .override = ti12xx_override, | |
872 | .save_state = ti_save_state, | |
873 | .restore_state = ti_restore_state, | |
874 | .sock_init = ti_init, | |
875 | }, | |
876 | [CARDBUS_TYPE_TI1250] = { | |
877 | .override = ti1250_override, | |
878 | .save_state = ti_save_state, | |
879 | .restore_state = ti_restore_state, | |
880 | .sock_init = ti_init, | |
881 | }, | |
4f2d364b JM |
882 | [CARDBUS_TYPE_ENE] = { |
883 | .override = ene_override, | |
884 | .save_state = ti_save_state, | |
885 | .restore_state = ti_restore_state, | |
886 | .sock_init = ti_init, | |
887 | }, | |
63e7ebd0 DR |
888 | #endif |
889 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 LT |
890 | [CARDBUS_TYPE_RICOH] = { |
891 | .override = ricoh_override, | |
892 | .save_state = ricoh_save_state, | |
893 | .restore_state = ricoh_restore_state, | |
894 | }, | |
63e7ebd0 DR |
895 | #endif |
896 | #ifdef CONFIG_YENTA_TOSHIBA | |
ea2f1590 DR |
897 | [CARDBUS_TYPE_TOPIC95] = { |
898 | .override = topic95_override, | |
899 | }, | |
1da177e4 LT |
900 | [CARDBUS_TYPE_TOPIC97] = { |
901 | .override = topic97_override, | |
902 | }, | |
63e7ebd0 DR |
903 | #endif |
904 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 LT |
905 | [CARDBUS_TYPE_O2MICRO] = { |
906 | .override = o2micro_override, | |
907 | .restore_state = o2micro_restore_state, | |
908 | }, | |
63e7ebd0 | 909 | #endif |
1da177e4 LT |
910 | }; |
911 | ||
912 | ||
1da177e4 LT |
913 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) |
914 | { | |
915 | int i; | |
916 | unsigned long val; | |
1da177e4 | 917 | u32 mask; |
28ca8dd7 | 918 | u8 reg; |
1da177e4 | 919 | |
1da177e4 LT |
920 | /* |
921 | * Probe for usable interrupts using the force | |
922 | * register to generate bogus card status events. | |
923 | */ | |
924 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
925 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
28ca8dd7 | 926 | reg = exca_readb(socket, I365_CSCINT); |
1da177e4 LT |
927 | exca_writeb(socket, I365_CSCINT, 0); |
928 | val = probe_irq_on() & isa_irq_mask; | |
929 | for (i = 1; i < 16; i++) { | |
930 | if (!((val >> i) & 1)) | |
931 | continue; | |
932 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); | |
933 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
934 | udelay(100); | |
935 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
936 | } | |
937 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
28ca8dd7 | 938 | exca_writeb(socket, I365_CSCINT, reg); |
1da177e4 LT |
939 | |
940 | mask = probe_irq_mask(val) & 0xffff; | |
941 | ||
1da177e4 LT |
942 | return mask; |
943 | } | |
944 | ||
945 | ||
78187865 | 946 | /* |
63e7ebd0 DR |
947 | * yenta PCI irq probing. |
948 | * currently only used in the TI/EnE initialization code | |
949 | */ | |
950 | #ifdef CONFIG_YENTA_TI | |
951 | ||
1da177e4 | 952 | /* interrupt handler, only used during probing */ |
7d12e780 | 953 | static irqreturn_t yenta_probe_handler(int irq, void *dev_id) |
1da177e4 LT |
954 | { |
955 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
956 | u8 csc; | |
9fea84f4 | 957 | u32 cb_event; |
1da177e4 LT |
958 | |
959 | /* Clear interrupt status for the event */ | |
960 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
961 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
962 | csc = exca_readb(socket, I365_CSC); | |
963 | ||
964 | if (cb_event || csc) { | |
965 | socket->probe_status = 1; | |
966 | return IRQ_HANDLED; | |
967 | } | |
968 | ||
969 | return IRQ_NONE; | |
970 | } | |
971 | ||
972 | /* probes the PCI interrupt, use only on override functions */ | |
973 | static int yenta_probe_cb_irq(struct yenta_socket *socket) | |
974 | { | |
02caa56e | 975 | u8 reg = 0; |
28ca8dd7 | 976 | |
1da177e4 LT |
977 | if (!socket->cb_irq) |
978 | return -1; | |
979 | ||
980 | socket->probe_status = 0; | |
981 | ||
dace1453 | 982 | if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) { |
f2e6cf76 JP |
983 | dev_warn(&socket->dev->dev, |
984 | "request_irq() in yenta_probe_cb_irq() failed!\n"); | |
1da177e4 LT |
985 | return -1; |
986 | } | |
987 | ||
988 | /* generate interrupt, wait */ | |
02caa56e DB |
989 | if (!socket->dev->irq) |
990 | reg = exca_readb(socket, I365_CSCINT); | |
28ca8dd7 | 991 | exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG); |
1da177e4 LT |
992 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
993 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
994 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
a413c090 | 995 | |
1da177e4 LT |
996 | msleep(100); |
997 | ||
998 | /* disable interrupts */ | |
999 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
28ca8dd7 | 1000 | exca_writeb(socket, I365_CSCINT, reg); |
1da177e4 LT |
1001 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
1002 | exca_readb(socket, I365_CSC); | |
1003 | ||
1004 | free_irq(socket->cb_irq, socket); | |
1005 | ||
1006 | return (int) socket->probe_status; | |
1007 | } | |
1008 | ||
63e7ebd0 | 1009 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 LT |
1010 | |
1011 | ||
1012 | /* | |
1013 | * Set static data that doesn't need re-initializing.. | |
1014 | */ | |
1015 | static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) | |
1016 | { | |
1da177e4 | 1017 | socket->socket.pci_irq = socket->cb_irq; |
fa912bcb DR |
1018 | if (isa_probe) |
1019 | socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); | |
1020 | else | |
1021 | socket->socket.irq_mask = 0; | |
1da177e4 | 1022 | |
f2e6cf76 JP |
1023 | dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n", |
1024 | socket->socket.irq_mask, socket->cb_irq); | |
1da177e4 LT |
1025 | } |
1026 | ||
1027 | /* | |
1028 | * Initialize the standard cardbus registers | |
1029 | */ | |
1030 | static void yenta_config_init(struct yenta_socket *socket) | |
1031 | { | |
1032 | u16 bridge; | |
1033 | struct pci_dev *dev = socket->dev; | |
8e5d17eb | 1034 | struct pci_bus_region region; |
1da177e4 | 1035 | |
fc279850 | 1036 | pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]); |
1da177e4 LT |
1037 | |
1038 | config_writel(socket, CB_LEGACY_MODE_BASE, 0); | |
8e5d17eb | 1039 | config_writel(socket, PCI_BASE_ADDRESS_0, region.start); |
1da177e4 LT |
1040 | config_writew(socket, PCI_COMMAND, |
1041 | PCI_COMMAND_IO | | |
1042 | PCI_COMMAND_MEMORY | | |
1043 | PCI_COMMAND_MASTER | | |
1044 | PCI_COMMAND_WAIT); | |
1045 | ||
1046 | /* MAGIC NUMBERS! Fixme */ | |
1047 | config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); | |
1048 | config_writeb(socket, PCI_LATENCY_TIMER, 168); | |
1049 | config_writel(socket, PCI_PRIMARY_BUS, | |
1050 | (176 << 24) | /* sec. latency timer */ | |
b918c62e YL |
1051 | ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */ |
1052 | ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */ | |
1da177e4 LT |
1053 | dev->subordinate->primary); /* primary bus */ |
1054 | ||
1055 | /* | |
1056 | * Set up the bridging state: | |
1057 | * - enable write posting. | |
1058 | * - memory window 0 prefetchable, window 1 non-prefetchable | |
1059 | * - PCI interrupts enabled if a PCI interrupt exists.. | |
1060 | */ | |
1061 | bridge = config_readw(socket, CB_BRIDGE_CONTROL); | |
a413c090 DR |
1062 | bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); |
1063 | bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; | |
1da177e4 LT |
1064 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); |
1065 | } | |
1066 | ||
b435261b | 1067 | /** |
66005216 | 1068 | * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge |
b435261b BK |
1069 | * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to |
1070 | * | |
1071 | * Checks if devices on the bus which the CardBus bridge bridges to would be | |
1072 | * invisible during PCI scans because of a misconfigured subordinate number | |
1073 | * of the parent brige - some BIOSes seem to be too lazy to set it right. | |
1074 | * Does the fixup carefully by checking how far it can go without conflicts. | |
631dd1a8 | 1075 | * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information. |
b435261b BK |
1076 | */ |
1077 | static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) | |
1078 | { | |
560698e9 | 1079 | struct pci_bus *sibling; |
b435261b | 1080 | unsigned char upper_limit; |
9fea84f4 | 1081 | /* |
b435261b BK |
1082 | * We only check and fix the parent bridge: All systems which need |
1083 | * this fixup that have been reviewed are laptops and the only bridge | |
1084 | * which needed fixing was the parent bridge of the CardBus bridge: | |
1085 | */ | |
1086 | struct pci_bus *bridge_to_fix = cardbus_bridge->parent; | |
1087 | ||
1088 | /* Check bus numbers are already set up correctly: */ | |
b918c62e | 1089 | if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end) |
b435261b BK |
1090 | return; /* The subordinate number is ok, nothing to do */ |
1091 | ||
1092 | if (!bridge_to_fix->parent) | |
1093 | return; /* Root bridges are ok */ | |
1094 | ||
1095 | /* stay within the limits of the bus range of the parent: */ | |
b918c62e | 1096 | upper_limit = bridge_to_fix->parent->busn_res.end; |
b435261b | 1097 | |
560698e9 YW |
1098 | /* check the bus ranges of all sibling bridges to prevent overlap */ |
1099 | list_for_each_entry(sibling, &bridge_to_fix->parent->children, | |
1100 | node) { | |
b435261b | 1101 | /* |
560698e9 | 1102 | * If the sibling has a higher secondary bus number |
b435261b BK |
1103 | * and it's secondary is equal or smaller than our |
1104 | * current upper limit, set the new upper limit to | |
560698e9 | 1105 | * the bus number below the sibling's range: |
b435261b | 1106 | */ |
560698e9 YW |
1107 | if (sibling->busn_res.start > bridge_to_fix->busn_res.end |
1108 | && sibling->busn_res.start <= upper_limit) | |
1109 | upper_limit = sibling->busn_res.start - 1; | |
b435261b BK |
1110 | } |
1111 | ||
1112 | /* Show that the wanted subordinate number is not possible: */ | |
b918c62e | 1113 | if (cardbus_bridge->busn_res.end > upper_limit) |
f2e6cf76 JP |
1114 | dev_warn(&cardbus_bridge->dev, |
1115 | "Upper limit for fixing this bridge's parent bridge: #%02x\n", | |
1116 | upper_limit); | |
b435261b BK |
1117 | |
1118 | /* If we have room to increase the bridge's subordinate number, */ | |
b918c62e | 1119 | if (bridge_to_fix->busn_res.end < upper_limit) { |
b435261b BK |
1120 | |
1121 | /* use the highest number of the hidden bus, within limits */ | |
1122 | unsigned char subordinate_to_assign = | |
b918c62e | 1123 | min_t(int, cardbus_bridge->busn_res.end, upper_limit); |
b435261b | 1124 | |
f2e6cf76 JP |
1125 | dev_info(&bridge_to_fix->dev, |
1126 | "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n", | |
1127 | bridge_to_fix->number, | |
1128 | (int)bridge_to_fix->busn_res.end, | |
1129 | subordinate_to_assign); | |
b435261b BK |
1130 | |
1131 | /* Save the new subordinate in the bus struct of the bridge */ | |
b918c62e | 1132 | bridge_to_fix->busn_res.end = subordinate_to_assign; |
b435261b BK |
1133 | |
1134 | /* and update the PCI config space with the new subordinate */ | |
1135 | pci_write_config_byte(bridge_to_fix->self, | |
b918c62e | 1136 | PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end); |
b435261b BK |
1137 | } |
1138 | } | |
1139 | ||
1da177e4 LT |
1140 | /* |
1141 | * Initialize a cardbus controller. Make sure we have a usable | |
1142 | * interrupt, and that we can map the cardbus area. Fill in the | |
1143 | * socket information structure.. | |
1144 | */ | |
34cdf25a | 1145 | static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
1146 | { |
1147 | struct yenta_socket *socket; | |
1148 | int ret; | |
c7fb0b35 IK |
1149 | |
1150 | /* | |
1151 | * If we failed to assign proper bus numbers for this cardbus | |
1152 | * controller during PCI probe, its subordinate pci_bus is NULL. | |
1153 | * Bail out if so. | |
1154 | */ | |
1155 | if (!dev->subordinate) { | |
f2e6cf76 | 1156 | dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n"); |
c7fb0b35 IK |
1157 | return -ENODEV; |
1158 | } | |
1159 | ||
8084b372 | 1160 | socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL); |
1da177e4 LT |
1161 | if (!socket) |
1162 | return -ENOMEM; | |
1da177e4 LT |
1163 | |
1164 | /* prepare pcmcia_socket */ | |
1165 | socket->socket.ops = ¥ta_socket_operations; | |
1166 | socket->socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 1167 | socket->socket.dev.parent = &dev->dev; |
1da177e4 LT |
1168 | socket->socket.driver_data = socket; |
1169 | socket->socket.owner = THIS_MODULE; | |
5bc6b68a RK |
1170 | socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1171 | socket->socket.map_size = 0x1000; | |
1172 | socket->socket.cb_dev = dev; | |
1da177e4 LT |
1173 | |
1174 | /* prepare struct yenta_socket */ | |
1175 | socket->dev = dev; | |
1176 | pci_set_drvdata(dev, socket); | |
1177 | ||
1178 | /* | |
1179 | * Do some basic sanity checking.. | |
1180 | */ | |
1181 | if (pci_enable_device(dev)) { | |
1182 | ret = -EBUSY; | |
1183 | goto free; | |
1184 | } | |
1185 | ||
1186 | ret = pci_request_regions(dev, "yenta_socket"); | |
1187 | if (ret) | |
1188 | goto disable; | |
1189 | ||
1190 | if (!pci_resource_start(dev, 0)) { | |
f2e6cf76 | 1191 | dev_err(&dev->dev, "No cardbus resource!\n"); |
1da177e4 LT |
1192 | ret = -ENODEV; |
1193 | goto release; | |
1194 | } | |
1195 | ||
1196 | /* | |
1197 | * Ok, start setup.. Map the cardbus registers, | |
1198 | * and request the IRQ. | |
1199 | */ | |
1200 | socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); | |
1201 | if (!socket->base) { | |
1202 | ret = -ENOMEM; | |
1203 | goto release; | |
1204 | } | |
1205 | ||
1206 | /* | |
1207 | * report the subsystem vendor and device for help debugging | |
1208 | * the irq stuff... | |
1209 | */ | |
f2e6cf76 JP |
1210 | dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n", |
1211 | dev->subsystem_vendor, dev->subsystem_device); | |
1da177e4 LT |
1212 | |
1213 | yenta_config_init(socket); | |
1214 | ||
1215 | /* Disable all events */ | |
1216 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
1217 | ||
1218 | /* Set up the bridge regions.. */ | |
1219 | yenta_allocate_resources(socket); | |
1220 | ||
1221 | socket->cb_irq = dev->irq; | |
1222 | ||
1223 | /* Do we have special options for the device? */ | |
1224 | if (id->driver_data != CARDBUS_TYPE_DEFAULT && | |
1225 | id->driver_data < ARRAY_SIZE(cardbus_type)) { | |
1226 | socket->type = &cardbus_type[id->driver_data]; | |
1227 | ||
1228 | ret = socket->type->override(socket); | |
1229 | if (ret < 0) | |
1230 | goto unmap; | |
1231 | } | |
1232 | ||
1233 | /* We must finish initialization here */ | |
1234 | ||
dace1453 | 1235 | if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) { |
1da177e4 LT |
1236 | /* No IRQ or request_irq failed. Poll */ |
1237 | socket->cb_irq = 0; /* But zero is a valid IRQ number. */ | |
41760d0e | 1238 | timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0); |
03b225b1 | 1239 | mod_timer(&socket->poll_timer, jiffies + HZ); |
f2e6cf76 JP |
1240 | dev_info(&dev->dev, |
1241 | "no PCI IRQ, CardBus support disabled for this socket.\n"); | |
1242 | dev_info(&dev->dev, | |
1243 | "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n"); | |
5bc6b68a RK |
1244 | } else { |
1245 | socket->socket.features |= SS_CAP_CARDBUS; | |
1da177e4 LT |
1246 | } |
1247 | ||
1248 | /* Figure out what the dang thing can do for the PCMCIA layer... */ | |
fa912bcb | 1249 | yenta_interrogate(socket); |
1da177e4 | 1250 | yenta_get_socket_capabilities(socket, isa_interrupts); |
f2e6cf76 JP |
1251 | dev_info(&dev->dev, "Socket status: %08x\n", |
1252 | cb_readl(socket, CB_SOCKET_STATE)); | |
1da177e4 | 1253 | |
b435261b BK |
1254 | yenta_fixup_parent_bridge(dev->subordinate); |
1255 | ||
1da177e4 LT |
1256 | /* Register it with the pcmcia layer.. */ |
1257 | ret = pcmcia_register_socket(&socket->socket); | |
d19319af TY |
1258 | if (ret) |
1259 | goto free_irq; | |
1260 | ||
1261 | /* Add the yenta register attributes */ | |
1262 | ret = device_create_file(&dev->dev, &dev_attr_yenta_registers); | |
1263 | if (ret) | |
1264 | goto unregister_socket; | |
1da177e4 | 1265 | |
d19319af TY |
1266 | return ret; |
1267 | ||
1268 | /* error path... */ | |
1269 | unregister_socket: | |
1270 | pcmcia_unregister_socket(&socket->socket); | |
1271 | free_irq: | |
1272 | if (socket->cb_irq) | |
1273 | free_irq(socket->cb_irq, socket); | |
1274 | else | |
1275 | del_timer_sync(&socket->poll_timer); | |
1da177e4 LT |
1276 | unmap: |
1277 | iounmap(socket->base); | |
d19319af | 1278 | yenta_free_resources(socket); |
1da177e4 LT |
1279 | release: |
1280 | pci_release_regions(dev); | |
1281 | disable: | |
1282 | pci_disable_device(dev); | |
1283 | free: | |
d19319af | 1284 | pci_set_drvdata(dev, NULL); |
1da177e4 | 1285 | kfree(socket); |
1da177e4 LT |
1286 | return ret; |
1287 | } | |
1288 | ||
f237de58 | 1289 | #ifdef CONFIG_PM |
0c570cde | 1290 | static int yenta_dev_suspend_noirq(struct device *dev) |
1da177e4 | 1291 | { |
0c570cde RW |
1292 | struct pci_dev *pdev = to_pci_dev(dev); |
1293 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1da177e4 | 1294 | |
0c570cde | 1295 | if (!socket) |
d7646f76 | 1296 | return 0; |
1da177e4 | 1297 | |
0c570cde RW |
1298 | if (socket->type && socket->type->save_state) |
1299 | socket->type->save_state(socket); | |
1da177e4 | 1300 | |
0c570cde RW |
1301 | pci_save_state(pdev); |
1302 | pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); | |
1303 | pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); | |
1304 | pci_disable_device(pdev); | |
1305 | ||
d7646f76 | 1306 | return 0; |
1da177e4 LT |
1307 | } |
1308 | ||
0c570cde | 1309 | static int yenta_dev_resume_noirq(struct device *dev) |
1da177e4 | 1310 | { |
0c570cde RW |
1311 | struct pci_dev *pdev = to_pci_dev(dev); |
1312 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1313 | int ret; | |
1da177e4 | 1314 | |
0c570cde RW |
1315 | if (!socket) |
1316 | return 0; | |
4deb7c1e | 1317 | |
0c570cde RW |
1318 | pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); |
1319 | pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); | |
4deb7c1e | 1320 | |
0c570cde RW |
1321 | ret = pci_enable_device(pdev); |
1322 | if (ret) | |
1323 | return ret; | |
4deb7c1e | 1324 | |
0c570cde | 1325 | pci_set_master(pdev); |
1da177e4 | 1326 | |
0c570cde RW |
1327 | if (socket->type && socket->type->restore_state) |
1328 | socket->type->restore_state(socket); | |
1da177e4 | 1329 | |
9905d1b4 | 1330 | return 0; |
1da177e4 | 1331 | } |
0c570cde | 1332 | |
47145210 | 1333 | static const struct dev_pm_ops yenta_pm_ops = { |
0c570cde RW |
1334 | .suspend_noirq = yenta_dev_suspend_noirq, |
1335 | .resume_noirq = yenta_dev_resume_noirq, | |
1336 | .freeze_noirq = yenta_dev_suspend_noirq, | |
1337 | .thaw_noirq = yenta_dev_resume_noirq, | |
1338 | .poweroff_noirq = yenta_dev_suspend_noirq, | |
1339 | .restore_noirq = yenta_dev_resume_noirq, | |
1340 | }; | |
1341 | ||
1342 | #define YENTA_PM_OPS (¥ta_pm_ops) | |
1343 | #else | |
1344 | #define YENTA_PM_OPS NULL | |
f237de58 | 1345 | #endif |
1da177e4 | 1346 | |
9fea84f4 | 1347 | #define CB_ID(vend, dev, type) \ |
1da177e4 LT |
1348 | { \ |
1349 | .vendor = vend, \ | |
1350 | .device = dev, \ | |
1351 | .subvendor = PCI_ANY_ID, \ | |
1352 | .subdevice = PCI_ANY_ID, \ | |
1353 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ | |
1354 | .class_mask = ~0, \ | |
1355 | .driver_data = CARDBUS_TYPE_##type, \ | |
1356 | } | |
1357 | ||
0178a7a5 | 1358 | static const struct pci_device_id yenta_table[] = { |
1da177e4 LT |
1359 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), |
1360 | ||
1361 | /* | |
1362 | * TBD: Check if these TI variants can use more | |
1363 | * advanced overrides instead. (I can't get the | |
1364 | * data sheets for these devices. --rmk) | |
1365 | */ | |
63e7ebd0 | 1366 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
1367 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), |
1368 | ||
1369 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), | |
1370 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), | |
1371 | ||
1372 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), | |
1373 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), | |
1374 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), | |
1375 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), | |
1376 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), | |
1377 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), | |
1378 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), | |
1379 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), | |
1380 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), | |
1381 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), | |
1382 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), | |
1383 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), | |
1384 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), | |
1385 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), | |
1386 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), | |
1387 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), | |
1388 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), | |
1389 | ||
1390 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), | |
1391 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), | |
1392 | ||
6c1a10db DR |
1393 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), |
1394 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), | |
59e35ba1 | 1395 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX), |
6c1a10db DR |
1396 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), |
1397 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), | |
1398 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), | |
1399 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), | |
1400 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), | |
1401 | ||
f3d4ae43 MP |
1402 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE), |
1403 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE), | |
1404 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE), | |
1405 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE), | |
8c3520d4 DR |
1406 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), |
1407 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), | |
1408 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), | |
1409 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), | |
63e7ebd0 | 1410 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 | 1411 | |
63e7ebd0 | 1412 | #ifdef CONFIG_YENTA_RICOH |
1da177e4 LT |
1413 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), |
1414 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), | |
1415 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), | |
1416 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), | |
1417 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), | |
63e7ebd0 | 1418 | #endif |
1da177e4 | 1419 | |
63e7ebd0 | 1420 | #ifdef CONFIG_YENTA_TOSHIBA |
ea2f1590 | 1421 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), |
1da177e4 LT |
1422 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), |
1423 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), | |
63e7ebd0 | 1424 | #endif |
1da177e4 | 1425 | |
63e7ebd0 | 1426 | #ifdef CONFIG_YENTA_O2 |
1da177e4 | 1427 | CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), |
63e7ebd0 | 1428 | #endif |
1da177e4 LT |
1429 | |
1430 | /* match any cardbus bridge */ | |
1431 | CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), | |
1432 | { /* all zeroes */ } | |
1433 | }; | |
1434 | MODULE_DEVICE_TABLE(pci, yenta_table); | |
1435 | ||
1436 | ||
1437 | static struct pci_driver yenta_cardbus_driver = { | |
1438 | .name = "yenta_cardbus", | |
1439 | .id_table = yenta_table, | |
1440 | .probe = yenta_probe, | |
96364e3a | 1441 | .remove = yenta_close, |
0c570cde | 1442 | .driver.pm = YENTA_PM_OPS, |
1da177e4 LT |
1443 | }; |
1444 | ||
7d19143f | 1445 | module_pci_driver(yenta_cardbus_driver); |
1da177e4 LT |
1446 | |
1447 | MODULE_LICENSE("GPL"); |