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pcmcia: honor saved flags in yenta_socket's I365_CSCINT register
[mirror_ubuntu-bionic-kernel.git] / drivers / pcmcia / yenta_socket.c
CommitLineData
1da177e4
LT
1/*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9fea84f4 9 *
1da177e4
LT
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13#include <linux/init.h>
14#include <linux/pci.h>
1da177e4
LT
15#include <linux/workqueue.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/module.h>
9fea84f4 19#include <linux/io.h>
1da177e4 20
1da177e4
LT
21#include <pcmcia/cs_types.h>
22#include <pcmcia/ss.h>
23#include <pcmcia/cs.h>
24
1da177e4
LT
25#include "yenta_socket.h"
26#include "i82365.h"
27
28static int disable_clkrun;
29module_param(disable_clkrun, bool, 0444);
30MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
31
fa912bcb
DR
32static int isa_probe = 1;
33module_param(isa_probe, bool, 0444);
34MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
35
36static int pwr_irqs_off;
37module_param(pwr_irqs_off, bool, 0644);
38MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
39
35169529
WS
40static char o2_speedup[] = "default";
41module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
42MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
43 "or 'default' (uses recommended behaviour for the detected bridge)");
44
dd797d81 45#define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
1da177e4
LT
46
47/* Don't ask.. */
48#define to_cycles(ns) ((ns)/120)
49#define to_ns(cycles) ((cycles)*120)
50
78187865 51/*
63e7ebd0
DR
52 * yenta PCI irq probing.
53 * currently only used in the TI/EnE initialization code
54 */
55#ifdef CONFIG_YENTA_TI
1da177e4 56static int yenta_probe_cb_irq(struct yenta_socket *socket);
63e7ebd0 57#endif
1da177e4
LT
58
59
60static unsigned int override_bios;
61module_param(override_bios, uint, 0000);
9fea84f4 62MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
1da177e4
LT
63
64/*
65 * Generate easy-to-use ways of reading a cardbus sockets
66 * regular memory space ("cb_xxx"), configuration space
67 * ("config_xxx") and compatibility space ("exca_xxxx")
68 */
69static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
70{
71 u32 val = readl(socket->base + reg);
dd797d81 72 debug("%04x %08x\n", socket, reg, val);
1da177e4
LT
73 return val;
74}
75
76static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
77{
dd797d81 78 debug("%04x %08x\n", socket, reg, val);
1da177e4 79 writel(val, socket->base + reg);
c8751e4c 80 readl(socket->base + reg); /* avoid problems with PCI write posting */
1da177e4
LT
81}
82
83static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
84{
85 u8 val;
86 pci_read_config_byte(socket->dev, offset, &val);
dd797d81 87 debug("%04x %02x\n", socket, offset, val);
1da177e4
LT
88 return val;
89}
90
91static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
92{
93 u16 val;
94 pci_read_config_word(socket->dev, offset, &val);
dd797d81 95 debug("%04x %04x\n", socket, offset, val);
1da177e4
LT
96 return val;
97}
98
99static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
100{
101 u32 val;
102 pci_read_config_dword(socket->dev, offset, &val);
dd797d81 103 debug("%04x %08x\n", socket, offset, val);
1da177e4
LT
104 return val;
105}
106
107static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
108{
dd797d81 109 debug("%04x %02x\n", socket, offset, val);
1da177e4
LT
110 pci_write_config_byte(socket->dev, offset, val);
111}
112
113static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
114{
dd797d81 115 debug("%04x %04x\n", socket, offset, val);
1da177e4
LT
116 pci_write_config_word(socket->dev, offset, val);
117}
118
119static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
120{
dd797d81 121 debug("%04x %08x\n", socket, offset, val);
1da177e4
LT
122 pci_write_config_dword(socket->dev, offset, val);
123}
124
125static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
126{
127 u8 val = readb(socket->base + 0x800 + reg);
dd797d81 128 debug("%04x %02x\n", socket, reg, val);
1da177e4
LT
129 return val;
130}
131
132static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
133{
134 u16 val;
135 val = readb(socket->base + 0x800 + reg);
136 val |= readb(socket->base + 0x800 + reg + 1) << 8;
dd797d81 137 debug("%04x %04x\n", socket, reg, val);
1da177e4
LT
138 return val;
139}
140
141static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
142{
dd797d81 143 debug("%04x %02x\n", socket, reg, val);
1da177e4 144 writeb(val, socket->base + 0x800 + reg);
c8751e4c 145 readb(socket->base + 0x800 + reg); /* PCI write posting... */
1da177e4
LT
146}
147
148static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
149{
dd797d81 150 debug("%04x %04x\n", socket, reg, val);
1da177e4
LT
151 writeb(val, socket->base + 0x800 + reg);
152 writeb(val >> 8, socket->base + 0x800 + reg + 1);
c8751e4c
DR
153
154 /* PCI write posting... */
155 readb(socket->base + 0x800 + reg);
156 readb(socket->base + 0x800 + reg + 1);
1da177e4
LT
157}
158
030ee39c
LT
159static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
160{
161 struct pci_dev *dev = to_pci_dev(yentadev);
162 struct yenta_socket *socket = pci_get_drvdata(dev);
163 int offset = 0, i;
164
165 offset = snprintf(buf, PAGE_SIZE, "CB registers:");
166 for (i = 0; i < 0x24; i += 4) {
167 unsigned val;
168 if (!(i & 15))
169 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
170 val = cb_readl(socket, i);
171 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
172 }
173
174 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
175 for (i = 0; i < 0x45; i++) {
176 unsigned char val;
177 if (!(i & 7)) {
178 if (i & 8) {
179 memcpy(buf + offset, " -", 2);
180 offset += 2;
181 } else
182 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
183 }
184 val = exca_readb(socket, i);
185 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
186 }
187 buf[offset++] = '\n';
188 return offset;
189}
190
191static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
192
1da177e4
LT
193/*
194 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
195 * on what kind of card is inserted..
196 */
197static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
198{
199 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
200 unsigned int val;
201 u32 state = cb_readl(socket, CB_SOCKET_STATE);
202
203 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
204 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
fa912bcb
DR
205 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
206 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
207
1da177e4
LT
208
209 if (state & CB_CBCARD) {
dd797d81 210 val |= SS_CARDBUS;
1da177e4
LT
211 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
212 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
213 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
fa912bcb 214 } else if (state & CB_16BITCARD) {
1da177e4
LT
215 u8 status = exca_readb(socket, I365_STATUS);
216 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
217 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
218 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
219 } else {
220 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
221 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
222 }
223 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
224 val |= (status & I365_CS_READY) ? SS_READY : 0;
225 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
226 }
227
228 *value = val;
229 return 0;
230}
231
1da177e4
LT
232static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
233{
ea2f1590
DR
234 /* some birdges require to use the ExCA registers to power 16bit cards */
235 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
236 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
237 u8 reg, old;
238 reg = old = exca_readb(socket, I365_POWER);
239 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
240
241 /* i82365SL-DF style */
242 if (socket->flags & YENTA_16BIT_POWER_DF) {
243 switch (state->Vcc) {
9fea84f4
DB
244 case 33:
245 reg |= I365_VCC_3V;
246 break;
247 case 50:
248 reg |= I365_VCC_5V;
249 break;
250 default:
251 reg = 0;
252 break;
ea2f1590
DR
253 }
254 switch (state->Vpp) {
255 case 33:
9fea84f4
DB
256 case 50:
257 reg |= I365_VPP1_5V;
258 break;
259 case 120:
260 reg |= I365_VPP1_12V;
261 break;
ea2f1590
DR
262 }
263 } else {
264 /* i82365SL-B style */
265 switch (state->Vcc) {
9fea84f4
DB
266 case 50:
267 reg |= I365_VCC_5V;
268 break;
269 default:
270 reg = 0;
271 break;
ea2f1590
DR
272 }
273 switch (state->Vpp) {
9fea84f4
DB
274 case 50:
275 reg |= I365_VPP1_5V | I365_VPP2_5V;
276 break;
277 case 120:
278 reg |= I365_VPP1_12V | I365_VPP2_12V;
279 break;
ea2f1590
DR
280 }
281 }
282
283 if (reg != old)
284 exca_writeb(socket, I365_POWER, reg);
285 } else {
286 u32 reg = 0; /* CB_SC_STPCLK? */
287 switch (state->Vcc) {
9fea84f4
DB
288 case 33:
289 reg = CB_SC_VCC_3V;
290 break;
291 case 50:
292 reg = CB_SC_VCC_5V;
293 break;
294 default:
295 reg = 0;
296 break;
ea2f1590
DR
297 }
298 switch (state->Vpp) {
9fea84f4
DB
299 case 33:
300 reg |= CB_SC_VPP_3V;
301 break;
302 case 50:
303 reg |= CB_SC_VPP_5V;
304 break;
305 case 120:
306 reg |= CB_SC_VPP_12V;
307 break;
ea2f1590
DR
308 }
309 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
310 cb_writel(socket, CB_SOCKET_CONTROL, reg);
1da177e4 311 }
1da177e4
LT
312}
313
314static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
315{
316 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
317 u16 bridge;
318
d250a481
DR
319 /* if powering down: do it immediately */
320 if (state->Vcc == 0)
321 yenta_set_power(socket, state);
322
1da177e4
LT
323 socket->io_irq = state->io_irq;
324 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
325 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
326 u8 intr;
327 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
328
329 /* ISA interrupt control? */
330 intr = exca_readb(socket, I365_INTCTL);
331 intr = (intr & ~0xf);
332 if (!socket->cb_irq) {
333 intr |= state->io_irq;
334 bridge |= CB_BRIDGE_INTR;
335 }
336 exca_writeb(socket, I365_INTCTL, intr);
337 } else {
338 u8 reg;
339
340 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
341 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
342 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
343 if (state->io_irq != socket->cb_irq) {
344 reg |= state->io_irq;
345 bridge |= CB_BRIDGE_INTR;
346 }
347 exca_writeb(socket, I365_INTCTL, reg);
348
349 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
350 reg |= I365_PWR_NORESET;
9fea84f4
DB
351 if (state->flags & SS_PWR_AUTO)
352 reg |= I365_PWR_AUTO;
353 if (state->flags & SS_OUTPUT_ENA)
354 reg |= I365_PWR_OUT;
1da177e4
LT
355 if (exca_readb(socket, I365_POWER) != reg)
356 exca_writeb(socket, I365_POWER, reg);
357
358 /* CSC interrupt: no ISA irq for CSC */
28ca8dd7
JK
359 reg = exca_readb(socket, I365_CSCINT);
360 reg &= I365_CSC_IRQ_MASK;
361 reg |= I365_CSC_DETECT;
1da177e4 362 if (state->flags & SS_IOCARD) {
9fea84f4
DB
363 if (state->csc_mask & SS_STSCHG)
364 reg |= I365_CSC_STSCHG;
1da177e4 365 } else {
9fea84f4
DB
366 if (state->csc_mask & SS_BATDEAD)
367 reg |= I365_CSC_BVD1;
368 if (state->csc_mask & SS_BATWARN)
369 reg |= I365_CSC_BVD2;
370 if (state->csc_mask & SS_READY)
371 reg |= I365_CSC_READY;
1da177e4
LT
372 }
373 exca_writeb(socket, I365_CSCINT, reg);
374 exca_readb(socket, I365_CSC);
9fea84f4 375 if (sock->zoom_video)
1da177e4
LT
376 sock->zoom_video(sock, state->flags & SS_ZVCARD);
377 }
378 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
379 /* Socket event mask: get card insert/remove events.. */
380 cb_writel(socket, CB_SOCKET_EVENT, -1);
381 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
d250a481
DR
382
383 /* if powering up: do it as the last step when the socket is configured */
384 if (state->Vcc != 0)
385 yenta_set_power(socket, state);
1da177e4
LT
386 return 0;
387}
388
389static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
390{
391 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
392 int map;
393 unsigned char ioctl, addr, enable;
394
395 map = io->map;
396
397 if (map > 1)
398 return -EINVAL;
399
400 enable = I365_ENA_IO(map);
401 addr = exca_readb(socket, I365_ADDRWIN);
402
403 /* Disable the window before changing it.. */
404 if (addr & enable) {
405 addr &= ~enable;
406 exca_writeb(socket, I365_ADDRWIN, addr);
407 }
408
409 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
410 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
411
412 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
9fea84f4
DB
413 if (io->flags & MAP_0WS)
414 ioctl |= I365_IOCTL_0WS(map);
415 if (io->flags & MAP_16BIT)
416 ioctl |= I365_IOCTL_16BIT(map);
417 if (io->flags & MAP_AUTOSZ)
418 ioctl |= I365_IOCTL_IOCS16(map);
1da177e4
LT
419 exca_writeb(socket, I365_IOCTL, ioctl);
420
421 if (io->flags & MAP_ACTIVE)
422 exca_writeb(socket, I365_ADDRWIN, addr | enable);
423 return 0;
424}
425
426static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
427{
428 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
429 struct pci_bus_region region;
430 int map;
431 unsigned char addr, enable;
432 unsigned int start, stop, card_start;
433 unsigned short word;
434
435 pcibios_resource_to_bus(socket->dev, &region, mem->res);
436
437 map = mem->map;
438 start = region.start;
439 stop = region.end;
440 card_start = mem->card_start;
441
442 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
443 (card_start >> 26) || mem->speed > 1000)
444 return -EINVAL;
445
446 enable = I365_ENA_MEM(map);
447 addr = exca_readb(socket, I365_ADDRWIN);
448 if (addr & enable) {
449 addr &= ~enable;
450 exca_writeb(socket, I365_ADDRWIN, addr);
451 }
452
453 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
454
455 word = (start >> 12) & 0x0fff;
456 if (mem->flags & MAP_16BIT)
457 word |= I365_MEM_16BIT;
458 if (mem->flags & MAP_0WS)
459 word |= I365_MEM_0WS;
460 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
461
462 word = (stop >> 12) & 0x0fff;
463 switch (to_cycles(mem->speed)) {
9fea84f4
DB
464 case 0:
465 break;
466 case 1:
467 word |= I365_MEM_WS0;
468 break;
469 case 2:
470 word |= I365_MEM_WS1;
471 break;
472 default:
473 word |= I365_MEM_WS1 | I365_MEM_WS0;
474 break;
1da177e4
LT
475 }
476 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
477
478 word = ((card_start - start) >> 12) & 0x3fff;
479 if (mem->flags & MAP_WRPROT)
480 word |= I365_MEM_WRPROT;
481 if (mem->flags & MAP_ATTRIB)
482 word |= I365_MEM_REG;
483 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
484
485 if (mem->flags & MAP_ACTIVE)
486 exca_writeb(socket, I365_ADDRWIN, addr | enable);
487 return 0;
488}
489
490
fa912bcb 491
7d12e780 492static irqreturn_t yenta_interrupt(int irq, void *dev_id)
1da177e4 493{
fa912bcb
DR
494 unsigned int events;
495 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
1da177e4
LT
496 u8 csc;
497 u32 cb_event;
1da177e4
LT
498
499 /* Clear interrupt status for the event */
500 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
501 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
502
503 csc = exca_readb(socket, I365_CSC);
504
e4115805
DR
505 if (!(cb_event || csc))
506 return IRQ_NONE;
507
1da177e4
LT
508 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
509 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
510 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
511 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
512 } else {
513 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
514 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
515 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
516 }
1da177e4 517
fa912bcb 518 if (events)
1da177e4 519 pcmcia_parse_events(&socket->socket, events);
fa912bcb 520
e4115805 521 return IRQ_HANDLED;
1da177e4
LT
522}
523
524static void yenta_interrupt_wrapper(unsigned long data)
525{
526 struct yenta_socket *socket = (struct yenta_socket *) data;
527
7d12e780 528 yenta_interrupt(0, (void *)socket);
1da177e4
LT
529 socket->poll_timer.expires = jiffies + HZ;
530 add_timer(&socket->poll_timer);
531}
532
533static void yenta_clear_maps(struct yenta_socket *socket)
534{
535 int i;
536 struct resource res = { .start = 0, .end = 0x0fff };
537 pccard_io_map io = { 0, 0, 0, 0, 1 };
538 pccard_mem_map mem = { .res = &res, };
539
540 yenta_set_socket(&socket->socket, &dead_socket);
541 for (i = 0; i < 2; i++) {
542 io.map = i;
543 yenta_set_io_map(&socket->socket, &io);
544 }
545 for (i = 0; i < 5; i++) {
546 mem.map = i;
547 yenta_set_mem_map(&socket->socket, &mem);
548 }
549}
550
fa912bcb
DR
551/* redoes voltage interrogation if required */
552static void yenta_interrogate(struct yenta_socket *socket)
553{
554 u32 state;
555
556 state = cb_readl(socket, CB_SOCKET_STATE);
557 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
558 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
559 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
560 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
561}
562
1da177e4
LT
563/* Called at resume and initialization events */
564static int yenta_sock_init(struct pcmcia_socket *sock)
565{
566 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
1da177e4
LT
567
568 exca_writeb(socket, I365_GBLCTL, 0x00);
569 exca_writeb(socket, I365_GENCTL, 0x00);
570
571 /* Redo card voltage interrogation */
fa912bcb 572 yenta_interrogate(socket);
1da177e4
LT
573
574 yenta_clear_maps(socket);
575
576 if (socket->type && socket->type->sock_init)
577 socket->type->sock_init(socket);
578
579 /* Re-enable CSC interrupts */
580 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
581
582 return 0;
583}
584
585static int yenta_sock_suspend(struct pcmcia_socket *sock)
586{
587 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
588
589 /* Disable CSC interrupts */
590 cb_writel(socket, CB_SOCKET_MASK, 0x0);
591
592 return 0;
593}
594
595/*
596 * Use an adaptive allocation for the memory resource,
597 * sometimes the memory behind pci bridges is limited:
598 * 1/8 of the size of the io window of the parent.
eb0a90b4
DB
599 * max 4 MB, min 16 kB. We try very hard to not get below
600 * the "ACC" values, though.
1da177e4 601 */
9fea84f4
DB
602#define BRIDGE_MEM_MAX (4*1024*1024)
603#define BRIDGE_MEM_ACC (128*1024)
604#define BRIDGE_MEM_MIN (16*1024)
1da177e4 605
eb0a90b4
DB
606#define BRIDGE_IO_MAX 512
607#define BRIDGE_IO_ACC 256
1da177e4
LT
608#define BRIDGE_IO_MIN 32
609
610#ifndef PCIBIOS_MIN_CARDBUS_IO
611#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
612#endif
613
eb0a90b4
DB
614static int yenta_search_one_res(struct resource *root, struct resource *res,
615 u32 min)
616{
617 u32 align, size, start, end;
618
619 if (res->flags & IORESOURCE_IO) {
620 align = 1024;
621 size = BRIDGE_IO_MAX;
622 start = PCIBIOS_MIN_CARDBUS_IO;
623 end = ~0U;
624 } else {
625 unsigned long avail = root->end - root->start;
626 int i;
627 size = BRIDGE_MEM_MAX;
628 if (size > avail/8) {
9fea84f4 629 size = (avail+1)/8;
eb0a90b4
DB
630 /* round size down to next power of 2 */
631 i = 0;
632 while ((size /= 2) != 0)
633 i++;
634 size = 1 << i;
635 }
636 if (size < min)
637 size = min;
638 align = size;
639 start = PCIBIOS_MIN_MEM;
640 end = ~0U;
641 }
642
643 do {
644 if (allocate_resource(root, res, size, start, end, align,
9fea84f4 645 NULL, NULL) == 0) {
eb0a90b4
DB
646 return 1;
647 }
648 size = size/2;
649 align = size;
650 } while (size >= min);
651
652 return 0;
653}
654
655
656static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
657 u32 min)
658{
89a74ecc 659 struct resource *root;
eb0a90b4 660 int i;
89a74ecc
BH
661
662 pci_bus_for_each_resource(socket->dev->bus, root, i) {
eb0a90b4
DB
663 if (!root)
664 continue;
665
666 if ((res->flags ^ root->flags) &
667 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
668 continue; /* Wrong type */
669
670 if (yenta_search_one_res(root, res, min))
671 return 1;
672 }
673 return 0;
674}
675
b3743fa4 676static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
1da177e4 677{
852710d9
MW
678 struct pci_dev *dev = socket->dev;
679 struct resource *res;
43c34735 680 struct pci_bus_region region;
1da177e4
LT
681 unsigned mask;
682
852710d9 683 res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
7925407a
IK
684 /* Already allocated? */
685 if (res->parent)
b3743fa4 686 return 0;
7925407a 687
1da177e4
LT
688 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
689 mask = ~0xfff;
690 if (type & IORESOURCE_IO)
691 mask = ~3;
692
852710d9 693 res->name = dev->subordinate->name;
1da177e4 694 res->flags = type;
1da177e4 695
43c34735
DB
696 region.start = config_readl(socket, addr_start) & mask;
697 region.end = config_readl(socket, addr_end) | ~mask;
698 if (region.start && region.end > region.start && !override_bios) {
852710d9
MW
699 pcibios_bus_to_resource(dev, res, &region);
700 if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
b3743fa4 701 return 0;
852710d9 702 dev_printk(KERN_INFO, &dev->dev,
dd797d81
DB
703 "Preassigned resource %d busy or not available, "
704 "reconfiguring...\n",
705 nr);
1da177e4
LT
706 }
707
708 if (type & IORESOURCE_IO) {
eb0a90b4
DB
709 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
710 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
b3743fa4
DB
711 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
712 return 1;
1da177e4 713 } else {
eb0a90b4
DB
714 if (type & IORESOURCE_PREFETCH) {
715 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
716 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB
717 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
718 return 1;
eb0a90b4
DB
719 /* Approximating prefetchable by non-prefetchable */
720 res->flags = IORESOURCE_MEM;
1da177e4 721 }
eb0a90b4
DB
722 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
723 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB
724 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
725 return 1;
eb0a90b4
DB
726 }
727
852710d9 728 dev_printk(KERN_INFO, &dev->dev,
dd797d81
DB
729 "no resource of type %x available, trying to continue...\n",
730 type);
eb0a90b4 731 res->start = res->end = res->flags = 0;
b3743fa4 732 return 0;
1da177e4
LT
733}
734
735/*
736 * Allocate the bridge mappings for the device..
737 */
738static void yenta_allocate_resources(struct yenta_socket *socket)
739{
b3743fa4
DB
740 int program = 0;
741 program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
27879835 742 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
b3743fa4 743 program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
27879835 744 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
b3743fa4 745 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
27879835 746 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
b3743fa4 747 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
27879835 748 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
b3743fa4
DB
749 if (program)
750 pci_setup_cardbus(socket->dev->subordinate);
1da177e4
LT
751}
752
753
754/*
755 * Free the bridge mappings for the device..
756 */
757static void yenta_free_resources(struct yenta_socket *socket)
758{
759 int i;
9fea84f4 760 for (i = 0; i < 4; i++) {
1da177e4
LT
761 struct resource *res;
762 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
763 if (res->start != 0 && res->end != 0)
764 release_resource(res);
b3743fa4 765 res->start = res->end = res->flags = 0;
1da177e4
LT
766 }
767}
768
769
770/*
771 * Close it down - release our resources and go home..
772 */
734f3fa1 773static void __devexit yenta_close(struct pci_dev *dev)
1da177e4
LT
774{
775 struct yenta_socket *sock = pci_get_drvdata(dev);
776
030ee39c
LT
777 /* Remove the register attributes */
778 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
779
1da177e4
LT
780 /* we don't want a dying socket registered */
781 pcmcia_unregister_socket(&sock->socket);
9fea84f4 782
1da177e4
LT
783 /* Disable all events so we don't die in an IRQ storm */
784 cb_writel(sock, CB_SOCKET_MASK, 0x0);
785 exca_writeb(sock, I365_CSCINT, 0);
786
787 if (sock->cb_irq)
788 free_irq(sock->cb_irq, sock);
789 else
790 del_timer_sync(&sock->poll_timer);
791
792 if (sock->base)
793 iounmap(sock->base);
794 yenta_free_resources(sock);
795
796 pci_release_regions(dev);
797 pci_disable_device(dev);
798 pci_set_drvdata(dev, NULL);
799}
800
801
802static struct pccard_operations yenta_socket_operations = {
803 .init = yenta_sock_init,
804 .suspend = yenta_sock_suspend,
805 .get_status = yenta_get_status,
1da177e4
LT
806 .set_socket = yenta_set_socket,
807 .set_io_map = yenta_set_io_map,
808 .set_mem_map = yenta_set_mem_map,
809};
810
811
63e7ebd0 812#ifdef CONFIG_YENTA_TI
1da177e4 813#include "ti113x.h"
63e7ebd0
DR
814#endif
815#ifdef CONFIG_YENTA_RICOH
1da177e4 816#include "ricoh.h"
63e7ebd0
DR
817#endif
818#ifdef CONFIG_YENTA_TOSHIBA
1da177e4 819#include "topic.h"
63e7ebd0
DR
820#endif
821#ifdef CONFIG_YENTA_O2
1da177e4 822#include "o2micro.h"
63e7ebd0 823#endif
1da177e4
LT
824
825enum {
826 CARDBUS_TYPE_DEFAULT = -1,
827 CARDBUS_TYPE_TI,
828 CARDBUS_TYPE_TI113X,
829 CARDBUS_TYPE_TI12XX,
830 CARDBUS_TYPE_TI1250,
831 CARDBUS_TYPE_RICOH,
ea2f1590 832 CARDBUS_TYPE_TOPIC95,
1da177e4
LT
833 CARDBUS_TYPE_TOPIC97,
834 CARDBUS_TYPE_O2MICRO,
8c3520d4 835 CARDBUS_TYPE_ENE,
1da177e4
LT
836};
837
838/*
839 * Different cardbus controllers have slightly different
840 * initialization sequences etc details. List them here..
841 */
842static struct cardbus_type cardbus_type[] = {
63e7ebd0 843#ifdef CONFIG_YENTA_TI
1da177e4
LT
844 [CARDBUS_TYPE_TI] = {
845 .override = ti_override,
846 .save_state = ti_save_state,
847 .restore_state = ti_restore_state,
848 .sock_init = ti_init,
849 },
850 [CARDBUS_TYPE_TI113X] = {
851 .override = ti113x_override,
852 .save_state = ti_save_state,
853 .restore_state = ti_restore_state,
854 .sock_init = ti_init,
855 },
856 [CARDBUS_TYPE_TI12XX] = {
857 .override = ti12xx_override,
858 .save_state = ti_save_state,
859 .restore_state = ti_restore_state,
860 .sock_init = ti_init,
861 },
862 [CARDBUS_TYPE_TI1250] = {
863 .override = ti1250_override,
864 .save_state = ti_save_state,
865 .restore_state = ti_restore_state,
866 .sock_init = ti_init,
867 },
63e7ebd0
DR
868#endif
869#ifdef CONFIG_YENTA_RICOH
1da177e4
LT
870 [CARDBUS_TYPE_RICOH] = {
871 .override = ricoh_override,
872 .save_state = ricoh_save_state,
873 .restore_state = ricoh_restore_state,
874 },
63e7ebd0
DR
875#endif
876#ifdef CONFIG_YENTA_TOSHIBA
ea2f1590
DR
877 [CARDBUS_TYPE_TOPIC95] = {
878 .override = topic95_override,
879 },
1da177e4
LT
880 [CARDBUS_TYPE_TOPIC97] = {
881 .override = topic97_override,
882 },
63e7ebd0
DR
883#endif
884#ifdef CONFIG_YENTA_O2
1da177e4
LT
885 [CARDBUS_TYPE_O2MICRO] = {
886 .override = o2micro_override,
887 .restore_state = o2micro_restore_state,
888 },
63e7ebd0
DR
889#endif
890#ifdef CONFIG_YENTA_TI
8c3520d4
DR
891 [CARDBUS_TYPE_ENE] = {
892 .override = ene_override,
893 .save_state = ti_save_state,
894 .restore_state = ti_restore_state,
895 .sock_init = ti_init,
896 },
63e7ebd0 897#endif
1da177e4
LT
898};
899
900
901/*
902 * Only probe "regular" interrupts, don't
903 * touch dangerous spots like the mouse irq,
904 * because there are mice that apparently
905 * get really confused if they get fondled
906 * too intimately.
907 *
908 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
909 */
910static u32 isa_interrupts = 0x0ef8;
911
912static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
913{
914 int i;
915 unsigned long val;
1da177e4 916 u32 mask;
28ca8dd7 917 u8 reg;
1da177e4 918
1da177e4
LT
919 /*
920 * Probe for usable interrupts using the force
921 * register to generate bogus card status events.
922 */
923 cb_writel(socket, CB_SOCKET_EVENT, -1);
924 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
28ca8dd7 925 reg = exca_readb(socket, I365_CSCINT);
1da177e4
LT
926 exca_writeb(socket, I365_CSCINT, 0);
927 val = probe_irq_on() & isa_irq_mask;
928 for (i = 1; i < 16; i++) {
929 if (!((val >> i) & 1))
930 continue;
931 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
932 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
933 udelay(100);
934 cb_writel(socket, CB_SOCKET_EVENT, -1);
935 }
936 cb_writel(socket, CB_SOCKET_MASK, 0);
28ca8dd7 937 exca_writeb(socket, I365_CSCINT, reg);
1da177e4
LT
938
939 mask = probe_irq_mask(val) & 0xffff;
940
1da177e4
LT
941 return mask;
942}
943
944
78187865 945/*
63e7ebd0
DR
946 * yenta PCI irq probing.
947 * currently only used in the TI/EnE initialization code
948 */
949#ifdef CONFIG_YENTA_TI
950
1da177e4 951/* interrupt handler, only used during probing */
7d12e780 952static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
1da177e4
LT
953{
954 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
955 u8 csc;
9fea84f4 956 u32 cb_event;
1da177e4
LT
957
958 /* Clear interrupt status for the event */
959 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
960 cb_writel(socket, CB_SOCKET_EVENT, -1);
961 csc = exca_readb(socket, I365_CSC);
962
963 if (cb_event || csc) {
964 socket->probe_status = 1;
965 return IRQ_HANDLED;
966 }
967
968 return IRQ_NONE;
969}
970
971/* probes the PCI interrupt, use only on override functions */
972static int yenta_probe_cb_irq(struct yenta_socket *socket)
973{
28ca8dd7
JK
974 u8 reg;
975
1da177e4
LT
976 if (!socket->cb_irq)
977 return -1;
978
979 socket->probe_status = 0;
980
dace1453 981 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
dd797d81
DB
982 dev_printk(KERN_WARNING, &socket->dev->dev,
983 "request_irq() in yenta_probe_cb_irq() failed!\n");
1da177e4
LT
984 return -1;
985 }
986
987 /* generate interrupt, wait */
28ca8dd7
JK
988 reg = exca_readb(socket, I365_CSCINT);
989 exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
1da177e4
LT
990 cb_writel(socket, CB_SOCKET_EVENT, -1);
991 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
992 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
a413c090 993
1da177e4
LT
994 msleep(100);
995
996 /* disable interrupts */
997 cb_writel(socket, CB_SOCKET_MASK, 0);
28ca8dd7 998 exca_writeb(socket, I365_CSCINT, reg);
1da177e4
LT
999 cb_writel(socket, CB_SOCKET_EVENT, -1);
1000 exca_readb(socket, I365_CSC);
1001
1002 free_irq(socket->cb_irq, socket);
1003
1004 return (int) socket->probe_status;
1005}
1006
63e7ebd0 1007#endif /* CONFIG_YENTA_TI */
1da177e4
LT
1008
1009
1010/*
1011 * Set static data that doesn't need re-initializing..
1012 */
1013static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1014{
1da177e4 1015 socket->socket.pci_irq = socket->cb_irq;
fa912bcb
DR
1016 if (isa_probe)
1017 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1018 else
1019 socket->socket.irq_mask = 0;
1da177e4 1020
dd797d81
DB
1021 dev_printk(KERN_INFO, &socket->dev->dev,
1022 "ISA IRQ mask 0x%04x, PCI irq %d\n",
1023 socket->socket.irq_mask, socket->cb_irq);
1da177e4
LT
1024}
1025
1026/*
1027 * Initialize the standard cardbus registers
1028 */
1029static void yenta_config_init(struct yenta_socket *socket)
1030{
1031 u16 bridge;
1032 struct pci_dev *dev = socket->dev;
8e5d17eb 1033 struct pci_bus_region region;
1da177e4 1034
8e5d17eb 1035 pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
1da177e4
LT
1036
1037 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
8e5d17eb 1038 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1da177e4
LT
1039 config_writew(socket, PCI_COMMAND,
1040 PCI_COMMAND_IO |
1041 PCI_COMMAND_MEMORY |
1042 PCI_COMMAND_MASTER |
1043 PCI_COMMAND_WAIT);
1044
1045 /* MAGIC NUMBERS! Fixme */
1046 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1047 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1048 config_writel(socket, PCI_PRIMARY_BUS,
1049 (176 << 24) | /* sec. latency timer */
1050 (dev->subordinate->subordinate << 16) | /* subordinate bus */
1051 (dev->subordinate->secondary << 8) | /* secondary bus */
1052 dev->subordinate->primary); /* primary bus */
1053
1054 /*
1055 * Set up the bridging state:
1056 * - enable write posting.
1057 * - memory window 0 prefetchable, window 1 non-prefetchable
1058 * - PCI interrupts enabled if a PCI interrupt exists..
1059 */
1060 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
a413c090
DR
1061 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1062 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1da177e4
LT
1063 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1064}
1065
b435261b 1066/**
66005216 1067 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
b435261b
BK
1068 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1069 *
1070 * Checks if devices on the bus which the CardBus bridge bridges to would be
1071 * invisible during PCI scans because of a misconfigured subordinate number
1072 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1073 * Does the fixup carefully by checking how far it can go without conflicts.
78187865 1074 * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
b435261b
BK
1075 */
1076static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1077{
1078 struct list_head *tmp;
1079 unsigned char upper_limit;
9fea84f4 1080 /*
b435261b
BK
1081 * We only check and fix the parent bridge: All systems which need
1082 * this fixup that have been reviewed are laptops and the only bridge
1083 * which needed fixing was the parent bridge of the CardBus bridge:
1084 */
1085 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1086
1087 /* Check bus numbers are already set up correctly: */
1088 if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
1089 return; /* The subordinate number is ok, nothing to do */
1090
1091 if (!bridge_to_fix->parent)
1092 return; /* Root bridges are ok */
1093
1094 /* stay within the limits of the bus range of the parent: */
1095 upper_limit = bridge_to_fix->parent->subordinate;
1096
1097 /* check the bus ranges of all silbling bridges to prevent overlap */
1098 list_for_each(tmp, &bridge_to_fix->parent->children) {
9fea84f4 1099 struct pci_bus *silbling = pci_bus_b(tmp);
b435261b
BK
1100 /*
1101 * If the silbling has a higher secondary bus number
1102 * and it's secondary is equal or smaller than our
1103 * current upper limit, set the new upper limit to
1104 * the bus number below the silbling's range:
1105 */
1106 if (silbling->secondary > bridge_to_fix->subordinate
1107 && silbling->secondary <= upper_limit)
1108 upper_limit = silbling->secondary - 1;
1109 }
1110
1111 /* Show that the wanted subordinate number is not possible: */
1112 if (cardbus_bridge->subordinate > upper_limit)
dd797d81
DB
1113 dev_printk(KERN_WARNING, &cardbus_bridge->dev,
1114 "Upper limit for fixing this "
1115 "bridge's parent bridge: #%02x\n", upper_limit);
b435261b
BK
1116
1117 /* If we have room to increase the bridge's subordinate number, */
1118 if (bridge_to_fix->subordinate < upper_limit) {
1119
1120 /* use the highest number of the hidden bus, within limits */
1121 unsigned char subordinate_to_assign =
1122 min(cardbus_bridge->subordinate, upper_limit);
1123
dd797d81
DB
1124 dev_printk(KERN_INFO, &bridge_to_fix->dev,
1125 "Raising subordinate bus# of parent "
1126 "bus (#%02x) from #%02x to #%02x\n",
1127 bridge_to_fix->number,
1128 bridge_to_fix->subordinate, subordinate_to_assign);
b435261b
BK
1129
1130 /* Save the new subordinate in the bus struct of the bridge */
1131 bridge_to_fix->subordinate = subordinate_to_assign;
1132
1133 /* and update the PCI config space with the new subordinate */
1134 pci_write_config_byte(bridge_to_fix->self,
1135 PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
1136 }
1137}
1138
1da177e4
LT
1139/*
1140 * Initialize a cardbus controller. Make sure we have a usable
1141 * interrupt, and that we can map the cardbus area. Fill in the
1142 * socket information structure..
1143 */
9fea84f4 1144static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1da177e4
LT
1145{
1146 struct yenta_socket *socket;
1147 int ret;
c7fb0b35
IK
1148
1149 /*
1150 * If we failed to assign proper bus numbers for this cardbus
1151 * controller during PCI probe, its subordinate pci_bus is NULL.
1152 * Bail out if so.
1153 */
1154 if (!dev->subordinate) {
dd797d81
DB
1155 dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
1156 "(try 'pci=assign-busses')\n");
c7fb0b35
IK
1157 return -ENODEV;
1158 }
1159
8084b372 1160 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1da177e4
LT
1161 if (!socket)
1162 return -ENOMEM;
1da177e4
LT
1163
1164 /* prepare pcmcia_socket */
1165 socket->socket.ops = &yenta_socket_operations;
1166 socket->socket.resource_ops = &pccard_nonstatic_ops;
87373318 1167 socket->socket.dev.parent = &dev->dev;
1da177e4
LT
1168 socket->socket.driver_data = socket;
1169 socket->socket.owner = THIS_MODULE;
5bc6b68a
RK
1170 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1171 socket->socket.map_size = 0x1000;
1172 socket->socket.cb_dev = dev;
1da177e4
LT
1173
1174 /* prepare struct yenta_socket */
1175 socket->dev = dev;
1176 pci_set_drvdata(dev, socket);
1177
1178 /*
1179 * Do some basic sanity checking..
1180 */
1181 if (pci_enable_device(dev)) {
1182 ret = -EBUSY;
1183 goto free;
1184 }
1185
1186 ret = pci_request_regions(dev, "yenta_socket");
1187 if (ret)
1188 goto disable;
1189
1190 if (!pci_resource_start(dev, 0)) {
dd797d81 1191 dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
1da177e4
LT
1192 ret = -ENODEV;
1193 goto release;
1194 }
1195
1196 /*
1197 * Ok, start setup.. Map the cardbus registers,
1198 * and request the IRQ.
1199 */
1200 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1201 if (!socket->base) {
1202 ret = -ENOMEM;
1203 goto release;
1204 }
1205
1206 /*
1207 * report the subsystem vendor and device for help debugging
1208 * the irq stuff...
1209 */
dd797d81
DB
1210 dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
1211 dev->subsystem_vendor, dev->subsystem_device);
1da177e4
LT
1212
1213 yenta_config_init(socket);
1214
1215 /* Disable all events */
1216 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1217
1218 /* Set up the bridge regions.. */
1219 yenta_allocate_resources(socket);
1220
1221 socket->cb_irq = dev->irq;
1222
1223 /* Do we have special options for the device? */
1224 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1225 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1226 socket->type = &cardbus_type[id->driver_data];
1227
1228 ret = socket->type->override(socket);
1229 if (ret < 0)
1230 goto unmap;
1231 }
1232
1233 /* We must finish initialization here */
1234
dace1453 1235 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1da177e4
LT
1236 /* No IRQ or request_irq failed. Poll */
1237 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1238 init_timer(&socket->poll_timer);
1239 socket->poll_timer.function = yenta_interrupt_wrapper;
1240 socket->poll_timer.data = (unsigned long)socket;
1241 socket->poll_timer.expires = jiffies + HZ;
1242 add_timer(&socket->poll_timer);
dd797d81
DB
1243 dev_printk(KERN_INFO, &dev->dev,
1244 "no PCI IRQ, CardBus support disabled for this "
1245 "socket.\n");
1246 dev_printk(KERN_INFO, &dev->dev,
1247 "check your BIOS CardBus, BIOS IRQ or ACPI "
1248 "settings.\n");
5bc6b68a
RK
1249 } else {
1250 socket->socket.features |= SS_CAP_CARDBUS;
1da177e4
LT
1251 }
1252
1253 /* Figure out what the dang thing can do for the PCMCIA layer... */
fa912bcb 1254 yenta_interrogate(socket);
1da177e4 1255 yenta_get_socket_capabilities(socket, isa_interrupts);
dd797d81
DB
1256 dev_printk(KERN_INFO, &dev->dev,
1257 "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1da177e4 1258
b435261b
BK
1259 yenta_fixup_parent_bridge(dev->subordinate);
1260
1da177e4
LT
1261 /* Register it with the pcmcia layer.. */
1262 ret = pcmcia_register_socket(&socket->socket);
030ee39c
LT
1263 if (ret == 0) {
1264 /* Add the yenta register attributes */
4deb7c1e
JG
1265 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1266 if (ret == 0)
1267 goto out;
1268
1269 /* error path... */
1270 pcmcia_unregister_socket(&socket->socket);
030ee39c 1271 }
1da177e4
LT
1272
1273 unmap:
1274 iounmap(socket->base);
1275 release:
1276 pci_release_regions(dev);
1277 disable:
1278 pci_disable_device(dev);
1279 free:
1280 kfree(socket);
1281 out:
1282 return ret;
1283}
1284
f237de58 1285#ifdef CONFIG_PM
0c570cde 1286static int yenta_dev_suspend_noirq(struct device *dev)
1da177e4 1287{
0c570cde
RW
1288 struct pci_dev *pdev = to_pci_dev(dev);
1289 struct yenta_socket *socket = pci_get_drvdata(pdev);
1da177e4
LT
1290 int ret;
1291
0c570cde 1292 ret = pcmcia_socket_dev_suspend(dev);
1da177e4 1293
0c570cde
RW
1294 if (!socket)
1295 return ret;
1da177e4 1296
0c570cde
RW
1297 if (socket->type && socket->type->save_state)
1298 socket->type->save_state(socket);
1da177e4 1299
0c570cde
RW
1300 pci_save_state(pdev);
1301 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1302 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1303 pci_disable_device(pdev);
1304
1305 /*
1306 * Some laptops (IBM T22) do not like us putting the Cardbus
1307 * bridge into D3. At a guess, some other laptop will
1308 * probably require this, so leave it commented out for now.
1309 */
1310 /* pci_set_power_state(dev, 3); */
1da177e4
LT
1311
1312 return ret;
1313}
1314
0c570cde 1315static int yenta_dev_resume_noirq(struct device *dev)
1da177e4 1316{
0c570cde
RW
1317 struct pci_dev *pdev = to_pci_dev(dev);
1318 struct yenta_socket *socket = pci_get_drvdata(pdev);
1319 int ret;
1da177e4 1320
0c570cde
RW
1321 if (!socket)
1322 return 0;
4deb7c1e 1323
0c570cde
RW
1324 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1325 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
4deb7c1e 1326
0c570cde
RW
1327 ret = pci_enable_device(pdev);
1328 if (ret)
1329 return ret;
4deb7c1e 1330
0c570cde 1331 pci_set_master(pdev);
1da177e4 1332
0c570cde
RW
1333 if (socket->type && socket->type->restore_state)
1334 socket->type->restore_state(socket);
1da177e4 1335
9905d1b4
RW
1336 pcmcia_socket_dev_early_resume(dev);
1337 return 0;
1338}
1339
1340static int yenta_dev_resume(struct device *dev)
1341{
1342 pcmcia_socket_dev_late_resume(dev);
1343 return 0;
1da177e4 1344}
0c570cde 1345
47145210 1346static const struct dev_pm_ops yenta_pm_ops = {
0c570cde
RW
1347 .suspend_noirq = yenta_dev_suspend_noirq,
1348 .resume_noirq = yenta_dev_resume_noirq,
9905d1b4 1349 .resume = yenta_dev_resume,
0c570cde
RW
1350 .freeze_noirq = yenta_dev_suspend_noirq,
1351 .thaw_noirq = yenta_dev_resume_noirq,
9905d1b4 1352 .thaw = yenta_dev_resume,
0c570cde
RW
1353 .poweroff_noirq = yenta_dev_suspend_noirq,
1354 .restore_noirq = yenta_dev_resume_noirq,
9905d1b4 1355 .restore = yenta_dev_resume,
0c570cde
RW
1356};
1357
1358#define YENTA_PM_OPS (&yenta_pm_ops)
1359#else
1360#define YENTA_PM_OPS NULL
f237de58 1361#endif
1da177e4 1362
9fea84f4 1363#define CB_ID(vend, dev, type) \
1da177e4
LT
1364 { \
1365 .vendor = vend, \
1366 .device = dev, \
1367 .subvendor = PCI_ANY_ID, \
1368 .subdevice = PCI_ANY_ID, \
1369 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1370 .class_mask = ~0, \
1371 .driver_data = CARDBUS_TYPE_##type, \
1372 }
1373
9fea84f4 1374static struct pci_device_id yenta_table[] = {
1da177e4
LT
1375 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1376
1377 /*
1378 * TBD: Check if these TI variants can use more
1379 * advanced overrides instead. (I can't get the
1380 * data sheets for these devices. --rmk)
1381 */
63e7ebd0 1382#ifdef CONFIG_YENTA_TI
1da177e4
LT
1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1384
1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1386 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1387
1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1389 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1398 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1399 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1400 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1401 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1402 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1403 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1404 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1405
1406 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1407 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1408
6c1a10db
DR
1409 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1410 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
59e35ba1 1411 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
6c1a10db
DR
1412 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1413 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1414 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1415 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1416 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1417
f3d4ae43
MP
1418 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1419 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1420 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1421 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
8c3520d4
DR
1422 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1423 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1424 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1425 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
63e7ebd0 1426#endif /* CONFIG_YENTA_TI */
1da177e4 1427
63e7ebd0 1428#ifdef CONFIG_YENTA_RICOH
1da177e4
LT
1429 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1430 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1431 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1432 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1433 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
63e7ebd0 1434#endif
1da177e4 1435
63e7ebd0 1436#ifdef CONFIG_YENTA_TOSHIBA
ea2f1590 1437 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1da177e4
LT
1438 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1439 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
63e7ebd0 1440#endif
1da177e4 1441
63e7ebd0 1442#ifdef CONFIG_YENTA_O2
1da177e4 1443 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
63e7ebd0 1444#endif
1da177e4
LT
1445
1446 /* match any cardbus bridge */
1447 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1448 { /* all zeroes */ }
1449};
1450MODULE_DEVICE_TABLE(pci, yenta_table);
1451
1452
1453static struct pci_driver yenta_cardbus_driver = {
1454 .name = "yenta_cardbus",
1455 .id_table = yenta_table,
1456 .probe = yenta_probe,
1457 .remove = __devexit_p(yenta_close),
0c570cde 1458 .driver.pm = YENTA_PM_OPS,
1da177e4
LT
1459};
1460
1461
1462static int __init yenta_socket_init(void)
1463{
9fea84f4 1464 return pci_register_driver(&yenta_cardbus_driver);
1da177e4
LT
1465}
1466
1467
9fea84f4 1468static void __exit yenta_socket_exit(void)
1da177e4 1469{
9fea84f4 1470 pci_unregister_driver(&yenta_cardbus_driver);
1da177e4
LT
1471}
1472
1473
1474module_init(yenta_socket_init);
1475module_exit(yenta_socket_exit);
1476
1477MODULE_LICENSE("GPL");