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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Regular cardbus driver ("yenta_socket") | |
3 | * | |
4 | * (C) Copyright 1999, 2000 Linus Torvalds | |
5 | * | |
6 | * Changelog: | |
7 | * Aug 2002: Manfred Spraul <manfred@colorfullife.com> | |
8 | * Dynamically adjust the size of the bridge resource | |
9fea84f4 | 9 | * |
1da177e4 LT |
10 | * May 2003: Dominik Brodowski <linux@brodo.de> |
11 | * Merge pci_socket.c and yenta.c into one file | |
12 | */ | |
13 | #include <linux/init.h> | |
14 | #include <linux/pci.h> | |
1da177e4 LT |
15 | #include <linux/workqueue.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/delay.h> | |
18 | #include <linux/module.h> | |
9fea84f4 | 19 | #include <linux/io.h> |
1da177e4 | 20 | |
1da177e4 LT |
21 | #include <pcmcia/cs_types.h> |
22 | #include <pcmcia/ss.h> | |
23 | #include <pcmcia/cs.h> | |
24 | ||
1da177e4 LT |
25 | #include "yenta_socket.h" |
26 | #include "i82365.h" | |
27 | ||
28 | static int disable_clkrun; | |
29 | module_param(disable_clkrun, bool, 0444); | |
30 | MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option"); | |
31 | ||
fa912bcb DR |
32 | static int isa_probe = 1; |
33 | module_param(isa_probe, bool, 0444); | |
34 | MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); | |
35 | ||
36 | static int pwr_irqs_off; | |
37 | module_param(pwr_irqs_off, bool, 0644); | |
38 | MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); | |
39 | ||
dd797d81 | 40 | #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) |
1da177e4 LT |
41 | |
42 | /* Don't ask.. */ | |
43 | #define to_cycles(ns) ((ns)/120) | |
44 | #define to_ns(cycles) ((cycles)*120) | |
45 | ||
78187865 | 46 | /* |
63e7ebd0 DR |
47 | * yenta PCI irq probing. |
48 | * currently only used in the TI/EnE initialization code | |
49 | */ | |
50 | #ifdef CONFIG_YENTA_TI | |
1da177e4 | 51 | static int yenta_probe_cb_irq(struct yenta_socket *socket); |
63e7ebd0 | 52 | #endif |
1da177e4 LT |
53 | |
54 | ||
55 | static unsigned int override_bios; | |
56 | module_param(override_bios, uint, 0000); | |
9fea84f4 | 57 | MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation"); |
1da177e4 LT |
58 | |
59 | /* | |
60 | * Generate easy-to-use ways of reading a cardbus sockets | |
61 | * regular memory space ("cb_xxx"), configuration space | |
62 | * ("config_xxx") and compatibility space ("exca_xxxx") | |
63 | */ | |
64 | static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) | |
65 | { | |
66 | u32 val = readl(socket->base + reg); | |
dd797d81 | 67 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 LT |
68 | return val; |
69 | } | |
70 | ||
71 | static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) | |
72 | { | |
dd797d81 | 73 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 | 74 | writel(val, socket->base + reg); |
c8751e4c | 75 | readl(socket->base + reg); /* avoid problems with PCI write posting */ |
1da177e4 LT |
76 | } |
77 | ||
78 | static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) | |
79 | { | |
80 | u8 val; | |
81 | pci_read_config_byte(socket->dev, offset, &val); | |
dd797d81 | 82 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
83 | return val; |
84 | } | |
85 | ||
86 | static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) | |
87 | { | |
88 | u16 val; | |
89 | pci_read_config_word(socket->dev, offset, &val); | |
dd797d81 | 90 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
91 | return val; |
92 | } | |
93 | ||
94 | static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) | |
95 | { | |
96 | u32 val; | |
97 | pci_read_config_dword(socket->dev, offset, &val); | |
dd797d81 | 98 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
99 | return val; |
100 | } | |
101 | ||
102 | static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) | |
103 | { | |
dd797d81 | 104 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
105 | pci_write_config_byte(socket->dev, offset, val); |
106 | } | |
107 | ||
108 | static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) | |
109 | { | |
dd797d81 | 110 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
111 | pci_write_config_word(socket->dev, offset, val); |
112 | } | |
113 | ||
114 | static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) | |
115 | { | |
dd797d81 | 116 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
117 | pci_write_config_dword(socket->dev, offset, val); |
118 | } | |
119 | ||
120 | static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) | |
121 | { | |
122 | u8 val = readb(socket->base + 0x800 + reg); | |
dd797d81 | 123 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 LT |
124 | return val; |
125 | } | |
126 | ||
127 | static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) | |
128 | { | |
129 | u16 val; | |
130 | val = readb(socket->base + 0x800 + reg); | |
131 | val |= readb(socket->base + 0x800 + reg + 1) << 8; | |
dd797d81 | 132 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
133 | return val; |
134 | } | |
135 | ||
136 | static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) | |
137 | { | |
dd797d81 | 138 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 | 139 | writeb(val, socket->base + 0x800 + reg); |
c8751e4c | 140 | readb(socket->base + 0x800 + reg); /* PCI write posting... */ |
1da177e4 LT |
141 | } |
142 | ||
143 | static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) | |
144 | { | |
dd797d81 | 145 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
146 | writeb(val, socket->base + 0x800 + reg); |
147 | writeb(val >> 8, socket->base + 0x800 + reg + 1); | |
c8751e4c DR |
148 | |
149 | /* PCI write posting... */ | |
150 | readb(socket->base + 0x800 + reg); | |
151 | readb(socket->base + 0x800 + reg + 1); | |
1da177e4 LT |
152 | } |
153 | ||
030ee39c LT |
154 | static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) |
155 | { | |
156 | struct pci_dev *dev = to_pci_dev(yentadev); | |
157 | struct yenta_socket *socket = pci_get_drvdata(dev); | |
158 | int offset = 0, i; | |
159 | ||
160 | offset = snprintf(buf, PAGE_SIZE, "CB registers:"); | |
161 | for (i = 0; i < 0x24; i += 4) { | |
162 | unsigned val; | |
163 | if (!(i & 15)) | |
164 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
165 | val = cb_readl(socket, i); | |
166 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); | |
167 | } | |
168 | ||
169 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); | |
170 | for (i = 0; i < 0x45; i++) { | |
171 | unsigned char val; | |
172 | if (!(i & 7)) { | |
173 | if (i & 8) { | |
174 | memcpy(buf + offset, " -", 2); | |
175 | offset += 2; | |
176 | } else | |
177 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
178 | } | |
179 | val = exca_readb(socket, i); | |
180 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); | |
181 | } | |
182 | buf[offset++] = '\n'; | |
183 | return offset; | |
184 | } | |
185 | ||
186 | static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); | |
187 | ||
1da177e4 LT |
188 | /* |
189 | * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend | |
190 | * on what kind of card is inserted.. | |
191 | */ | |
192 | static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) | |
193 | { | |
194 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
195 | unsigned int val; | |
196 | u32 state = cb_readl(socket, CB_SOCKET_STATE); | |
197 | ||
198 | val = (state & CB_3VCARD) ? SS_3VCARD : 0; | |
199 | val |= (state & CB_XVCARD) ? SS_XVCARD : 0; | |
fa912bcb DR |
200 | val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; |
201 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; | |
202 | ||
1da177e4 LT |
203 | |
204 | if (state & CB_CBCARD) { | |
dd797d81 | 205 | val |= SS_CARDBUS; |
1da177e4 LT |
206 | val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; |
207 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; | |
208 | val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; | |
fa912bcb | 209 | } else if (state & CB_16BITCARD) { |
1da177e4 LT |
210 | u8 status = exca_readb(socket, I365_STATUS); |
211 | val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; | |
212 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
213 | val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; | |
214 | } else { | |
215 | val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; | |
216 | val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; | |
217 | } | |
218 | val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; | |
219 | val |= (status & I365_CS_READY) ? SS_READY : 0; | |
220 | val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; | |
221 | } | |
222 | ||
223 | *value = val; | |
224 | return 0; | |
225 | } | |
226 | ||
1da177e4 LT |
227 | static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) |
228 | { | |
ea2f1590 DR |
229 | /* some birdges require to use the ExCA registers to power 16bit cards */ |
230 | if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && | |
231 | (socket->flags & YENTA_16BIT_POWER_EXCA)) { | |
232 | u8 reg, old; | |
233 | reg = old = exca_readb(socket, I365_POWER); | |
234 | reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); | |
235 | ||
236 | /* i82365SL-DF style */ | |
237 | if (socket->flags & YENTA_16BIT_POWER_DF) { | |
238 | switch (state->Vcc) { | |
9fea84f4 DB |
239 | case 33: |
240 | reg |= I365_VCC_3V; | |
241 | break; | |
242 | case 50: | |
243 | reg |= I365_VCC_5V; | |
244 | break; | |
245 | default: | |
246 | reg = 0; | |
247 | break; | |
ea2f1590 DR |
248 | } |
249 | switch (state->Vpp) { | |
250 | case 33: | |
9fea84f4 DB |
251 | case 50: |
252 | reg |= I365_VPP1_5V; | |
253 | break; | |
254 | case 120: | |
255 | reg |= I365_VPP1_12V; | |
256 | break; | |
ea2f1590 DR |
257 | } |
258 | } else { | |
259 | /* i82365SL-B style */ | |
260 | switch (state->Vcc) { | |
9fea84f4 DB |
261 | case 50: |
262 | reg |= I365_VCC_5V; | |
263 | break; | |
264 | default: | |
265 | reg = 0; | |
266 | break; | |
ea2f1590 DR |
267 | } |
268 | switch (state->Vpp) { | |
9fea84f4 DB |
269 | case 50: |
270 | reg |= I365_VPP1_5V | I365_VPP2_5V; | |
271 | break; | |
272 | case 120: | |
273 | reg |= I365_VPP1_12V | I365_VPP2_12V; | |
274 | break; | |
ea2f1590 DR |
275 | } |
276 | } | |
277 | ||
278 | if (reg != old) | |
279 | exca_writeb(socket, I365_POWER, reg); | |
280 | } else { | |
281 | u32 reg = 0; /* CB_SC_STPCLK? */ | |
282 | switch (state->Vcc) { | |
9fea84f4 DB |
283 | case 33: |
284 | reg = CB_SC_VCC_3V; | |
285 | break; | |
286 | case 50: | |
287 | reg = CB_SC_VCC_5V; | |
288 | break; | |
289 | default: | |
290 | reg = 0; | |
291 | break; | |
ea2f1590 DR |
292 | } |
293 | switch (state->Vpp) { | |
9fea84f4 DB |
294 | case 33: |
295 | reg |= CB_SC_VPP_3V; | |
296 | break; | |
297 | case 50: | |
298 | reg |= CB_SC_VPP_5V; | |
299 | break; | |
300 | case 120: | |
301 | reg |= CB_SC_VPP_12V; | |
302 | break; | |
ea2f1590 DR |
303 | } |
304 | if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) | |
305 | cb_writel(socket, CB_SOCKET_CONTROL, reg); | |
1da177e4 | 306 | } |
1da177e4 LT |
307 | } |
308 | ||
309 | static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) | |
310 | { | |
311 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
312 | u16 bridge; | |
313 | ||
d250a481 DR |
314 | /* if powering down: do it immediately */ |
315 | if (state->Vcc == 0) | |
316 | yenta_set_power(socket, state); | |
317 | ||
1da177e4 LT |
318 | socket->io_irq = state->io_irq; |
319 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); | |
320 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { | |
321 | u8 intr; | |
322 | bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; | |
323 | ||
324 | /* ISA interrupt control? */ | |
325 | intr = exca_readb(socket, I365_INTCTL); | |
326 | intr = (intr & ~0xf); | |
327 | if (!socket->cb_irq) { | |
328 | intr |= state->io_irq; | |
329 | bridge |= CB_BRIDGE_INTR; | |
330 | } | |
331 | exca_writeb(socket, I365_INTCTL, intr); | |
332 | } else { | |
333 | u8 reg; | |
334 | ||
335 | reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); | |
336 | reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; | |
337 | reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; | |
338 | if (state->io_irq != socket->cb_irq) { | |
339 | reg |= state->io_irq; | |
340 | bridge |= CB_BRIDGE_INTR; | |
341 | } | |
342 | exca_writeb(socket, I365_INTCTL, reg); | |
343 | ||
344 | reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); | |
345 | reg |= I365_PWR_NORESET; | |
9fea84f4 DB |
346 | if (state->flags & SS_PWR_AUTO) |
347 | reg |= I365_PWR_AUTO; | |
348 | if (state->flags & SS_OUTPUT_ENA) | |
349 | reg |= I365_PWR_OUT; | |
1da177e4 LT |
350 | if (exca_readb(socket, I365_POWER) != reg) |
351 | exca_writeb(socket, I365_POWER, reg); | |
352 | ||
353 | /* CSC interrupt: no ISA irq for CSC */ | |
354 | reg = I365_CSC_DETECT; | |
355 | if (state->flags & SS_IOCARD) { | |
9fea84f4 DB |
356 | if (state->csc_mask & SS_STSCHG) |
357 | reg |= I365_CSC_STSCHG; | |
1da177e4 | 358 | } else { |
9fea84f4 DB |
359 | if (state->csc_mask & SS_BATDEAD) |
360 | reg |= I365_CSC_BVD1; | |
361 | if (state->csc_mask & SS_BATWARN) | |
362 | reg |= I365_CSC_BVD2; | |
363 | if (state->csc_mask & SS_READY) | |
364 | reg |= I365_CSC_READY; | |
1da177e4 LT |
365 | } |
366 | exca_writeb(socket, I365_CSCINT, reg); | |
367 | exca_readb(socket, I365_CSC); | |
9fea84f4 | 368 | if (sock->zoom_video) |
1da177e4 LT |
369 | sock->zoom_video(sock, state->flags & SS_ZVCARD); |
370 | } | |
371 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
372 | /* Socket event mask: get card insert/remove events.. */ | |
373 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
374 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
d250a481 DR |
375 | |
376 | /* if powering up: do it as the last step when the socket is configured */ | |
377 | if (state->Vcc != 0) | |
378 | yenta_set_power(socket, state); | |
1da177e4 LT |
379 | return 0; |
380 | } | |
381 | ||
382 | static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |
383 | { | |
384 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
385 | int map; | |
386 | unsigned char ioctl, addr, enable; | |
387 | ||
388 | map = io->map; | |
389 | ||
390 | if (map > 1) | |
391 | return -EINVAL; | |
392 | ||
393 | enable = I365_ENA_IO(map); | |
394 | addr = exca_readb(socket, I365_ADDRWIN); | |
395 | ||
396 | /* Disable the window before changing it.. */ | |
397 | if (addr & enable) { | |
398 | addr &= ~enable; | |
399 | exca_writeb(socket, I365_ADDRWIN, addr); | |
400 | } | |
401 | ||
402 | exca_writew(socket, I365_IO(map)+I365_W_START, io->start); | |
403 | exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
404 | ||
405 | ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
9fea84f4 DB |
406 | if (io->flags & MAP_0WS) |
407 | ioctl |= I365_IOCTL_0WS(map); | |
408 | if (io->flags & MAP_16BIT) | |
409 | ioctl |= I365_IOCTL_16BIT(map); | |
410 | if (io->flags & MAP_AUTOSZ) | |
411 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
412 | exca_writeb(socket, I365_IOCTL, ioctl); |
413 | ||
414 | if (io->flags & MAP_ACTIVE) | |
415 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
416 | return 0; | |
417 | } | |
418 | ||
419 | static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) | |
420 | { | |
421 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
422 | struct pci_bus_region region; | |
423 | int map; | |
424 | unsigned char addr, enable; | |
425 | unsigned int start, stop, card_start; | |
426 | unsigned short word; | |
427 | ||
428 | pcibios_resource_to_bus(socket->dev, ®ion, mem->res); | |
429 | ||
430 | map = mem->map; | |
431 | start = region.start; | |
432 | stop = region.end; | |
433 | card_start = mem->card_start; | |
434 | ||
435 | if (map > 4 || start > stop || ((start ^ stop) >> 24) || | |
436 | (card_start >> 26) || mem->speed > 1000) | |
437 | return -EINVAL; | |
438 | ||
439 | enable = I365_ENA_MEM(map); | |
440 | addr = exca_readb(socket, I365_ADDRWIN); | |
441 | if (addr & enable) { | |
442 | addr &= ~enable; | |
443 | exca_writeb(socket, I365_ADDRWIN, addr); | |
444 | } | |
445 | ||
446 | exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); | |
447 | ||
448 | word = (start >> 12) & 0x0fff; | |
449 | if (mem->flags & MAP_16BIT) | |
450 | word |= I365_MEM_16BIT; | |
451 | if (mem->flags & MAP_0WS) | |
452 | word |= I365_MEM_0WS; | |
453 | exca_writew(socket, I365_MEM(map) + I365_W_START, word); | |
454 | ||
455 | word = (stop >> 12) & 0x0fff; | |
456 | switch (to_cycles(mem->speed)) { | |
9fea84f4 DB |
457 | case 0: |
458 | break; | |
459 | case 1: | |
460 | word |= I365_MEM_WS0; | |
461 | break; | |
462 | case 2: | |
463 | word |= I365_MEM_WS1; | |
464 | break; | |
465 | default: | |
466 | word |= I365_MEM_WS1 | I365_MEM_WS0; | |
467 | break; | |
1da177e4 LT |
468 | } |
469 | exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); | |
470 | ||
471 | word = ((card_start - start) >> 12) & 0x3fff; | |
472 | if (mem->flags & MAP_WRPROT) | |
473 | word |= I365_MEM_WRPROT; | |
474 | if (mem->flags & MAP_ATTRIB) | |
475 | word |= I365_MEM_REG; | |
476 | exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); | |
477 | ||
478 | if (mem->flags & MAP_ACTIVE) | |
479 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
480 | return 0; | |
481 | } | |
482 | ||
483 | ||
fa912bcb | 484 | |
7d12e780 | 485 | static irqreturn_t yenta_interrupt(int irq, void *dev_id) |
1da177e4 | 486 | { |
fa912bcb DR |
487 | unsigned int events; |
488 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
1da177e4 LT |
489 | u8 csc; |
490 | u32 cb_event; | |
1da177e4 LT |
491 | |
492 | /* Clear interrupt status for the event */ | |
493 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
494 | cb_writel(socket, CB_SOCKET_EVENT, cb_event); | |
495 | ||
496 | csc = exca_readb(socket, I365_CSC); | |
497 | ||
e4115805 DR |
498 | if (!(cb_event || csc)) |
499 | return IRQ_NONE; | |
500 | ||
1da177e4 LT |
501 | events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; |
502 | events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; | |
503 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
504 | events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; | |
505 | } else { | |
506 | events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; | |
507 | events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; | |
508 | events |= (csc & I365_CSC_READY) ? SS_READY : 0; | |
509 | } | |
1da177e4 | 510 | |
fa912bcb | 511 | if (events) |
1da177e4 | 512 | pcmcia_parse_events(&socket->socket, events); |
fa912bcb | 513 | |
e4115805 | 514 | return IRQ_HANDLED; |
1da177e4 LT |
515 | } |
516 | ||
517 | static void yenta_interrupt_wrapper(unsigned long data) | |
518 | { | |
519 | struct yenta_socket *socket = (struct yenta_socket *) data; | |
520 | ||
7d12e780 | 521 | yenta_interrupt(0, (void *)socket); |
1da177e4 LT |
522 | socket->poll_timer.expires = jiffies + HZ; |
523 | add_timer(&socket->poll_timer); | |
524 | } | |
525 | ||
526 | static void yenta_clear_maps(struct yenta_socket *socket) | |
527 | { | |
528 | int i; | |
529 | struct resource res = { .start = 0, .end = 0x0fff }; | |
530 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
531 | pccard_mem_map mem = { .res = &res, }; | |
532 | ||
533 | yenta_set_socket(&socket->socket, &dead_socket); | |
534 | for (i = 0; i < 2; i++) { | |
535 | io.map = i; | |
536 | yenta_set_io_map(&socket->socket, &io); | |
537 | } | |
538 | for (i = 0; i < 5; i++) { | |
539 | mem.map = i; | |
540 | yenta_set_mem_map(&socket->socket, &mem); | |
541 | } | |
542 | } | |
543 | ||
fa912bcb DR |
544 | /* redoes voltage interrogation if required */ |
545 | static void yenta_interrogate(struct yenta_socket *socket) | |
546 | { | |
547 | u32 state; | |
548 | ||
549 | state = cb_readl(socket, CB_SOCKET_STATE); | |
550 | if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || | |
551 | (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || | |
552 | ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) | |
553 | cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); | |
554 | } | |
555 | ||
1da177e4 LT |
556 | /* Called at resume and initialization events */ |
557 | static int yenta_sock_init(struct pcmcia_socket *sock) | |
558 | { | |
559 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
1da177e4 LT |
560 | |
561 | exca_writeb(socket, I365_GBLCTL, 0x00); | |
562 | exca_writeb(socket, I365_GENCTL, 0x00); | |
563 | ||
564 | /* Redo card voltage interrogation */ | |
fa912bcb | 565 | yenta_interrogate(socket); |
1da177e4 LT |
566 | |
567 | yenta_clear_maps(socket); | |
568 | ||
569 | if (socket->type && socket->type->sock_init) | |
570 | socket->type->sock_init(socket); | |
571 | ||
572 | /* Re-enable CSC interrupts */ | |
573 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
574 | ||
575 | return 0; | |
576 | } | |
577 | ||
578 | static int yenta_sock_suspend(struct pcmcia_socket *sock) | |
579 | { | |
580 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
581 | ||
582 | /* Disable CSC interrupts */ | |
583 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
584 | ||
585 | return 0; | |
586 | } | |
587 | ||
588 | /* | |
589 | * Use an adaptive allocation for the memory resource, | |
590 | * sometimes the memory behind pci bridges is limited: | |
591 | * 1/8 of the size of the io window of the parent. | |
eb0a90b4 DB |
592 | * max 4 MB, min 16 kB. We try very hard to not get below |
593 | * the "ACC" values, though. | |
1da177e4 | 594 | */ |
9fea84f4 DB |
595 | #define BRIDGE_MEM_MAX (4*1024*1024) |
596 | #define BRIDGE_MEM_ACC (128*1024) | |
597 | #define BRIDGE_MEM_MIN (16*1024) | |
1da177e4 | 598 | |
eb0a90b4 DB |
599 | #define BRIDGE_IO_MAX 512 |
600 | #define BRIDGE_IO_ACC 256 | |
1da177e4 LT |
601 | #define BRIDGE_IO_MIN 32 |
602 | ||
603 | #ifndef PCIBIOS_MIN_CARDBUS_IO | |
604 | #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO | |
605 | #endif | |
606 | ||
eb0a90b4 DB |
607 | static int yenta_search_one_res(struct resource *root, struct resource *res, |
608 | u32 min) | |
609 | { | |
610 | u32 align, size, start, end; | |
611 | ||
612 | if (res->flags & IORESOURCE_IO) { | |
613 | align = 1024; | |
614 | size = BRIDGE_IO_MAX; | |
615 | start = PCIBIOS_MIN_CARDBUS_IO; | |
616 | end = ~0U; | |
617 | } else { | |
618 | unsigned long avail = root->end - root->start; | |
619 | int i; | |
620 | size = BRIDGE_MEM_MAX; | |
621 | if (size > avail/8) { | |
9fea84f4 | 622 | size = (avail+1)/8; |
eb0a90b4 DB |
623 | /* round size down to next power of 2 */ |
624 | i = 0; | |
625 | while ((size /= 2) != 0) | |
626 | i++; | |
627 | size = 1 << i; | |
628 | } | |
629 | if (size < min) | |
630 | size = min; | |
631 | align = size; | |
632 | start = PCIBIOS_MIN_MEM; | |
633 | end = ~0U; | |
634 | } | |
635 | ||
636 | do { | |
637 | if (allocate_resource(root, res, size, start, end, align, | |
9fea84f4 | 638 | NULL, NULL) == 0) { |
eb0a90b4 DB |
639 | return 1; |
640 | } | |
641 | size = size/2; | |
642 | align = size; | |
643 | } while (size >= min); | |
644 | ||
645 | return 0; | |
646 | } | |
647 | ||
648 | ||
649 | static int yenta_search_res(struct yenta_socket *socket, struct resource *res, | |
650 | u32 min) | |
651 | { | |
652 | int i; | |
9fea84f4 DB |
653 | for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { |
654 | struct resource *root = socket->dev->bus->resource[i]; | |
eb0a90b4 DB |
655 | if (!root) |
656 | continue; | |
657 | ||
658 | if ((res->flags ^ root->flags) & | |
659 | (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) | |
660 | continue; /* Wrong type */ | |
661 | ||
662 | if (yenta_search_one_res(root, res, min)) | |
663 | return 1; | |
664 | } | |
665 | return 0; | |
666 | } | |
667 | ||
b3743fa4 | 668 | static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) |
1da177e4 | 669 | { |
852710d9 MW |
670 | struct pci_dev *dev = socket->dev; |
671 | struct resource *res; | |
43c34735 | 672 | struct pci_bus_region region; |
1da177e4 LT |
673 | unsigned mask; |
674 | ||
852710d9 | 675 | res = dev->resource + PCI_BRIDGE_RESOURCES + nr; |
7925407a IK |
676 | /* Already allocated? */ |
677 | if (res->parent) | |
b3743fa4 | 678 | return 0; |
7925407a | 679 | |
1da177e4 LT |
680 | /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ |
681 | mask = ~0xfff; | |
682 | if (type & IORESOURCE_IO) | |
683 | mask = ~3; | |
684 | ||
852710d9 | 685 | res->name = dev->subordinate->name; |
1da177e4 | 686 | res->flags = type; |
1da177e4 | 687 | |
43c34735 DB |
688 | region.start = config_readl(socket, addr_start) & mask; |
689 | region.end = config_readl(socket, addr_end) | ~mask; | |
690 | if (region.start && region.end > region.start && !override_bios) { | |
852710d9 MW |
691 | pcibios_bus_to_resource(dev, res, ®ion); |
692 | if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0) | |
b3743fa4 | 693 | return 0; |
852710d9 | 694 | dev_printk(KERN_INFO, &dev->dev, |
dd797d81 DB |
695 | "Preassigned resource %d busy or not available, " |
696 | "reconfiguring...\n", | |
697 | nr); | |
1da177e4 LT |
698 | } |
699 | ||
700 | if (type & IORESOURCE_IO) { | |
eb0a90b4 DB |
701 | if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || |
702 | (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || | |
b3743fa4 DB |
703 | (yenta_search_res(socket, res, BRIDGE_IO_MIN))) |
704 | return 1; | |
1da177e4 | 705 | } else { |
eb0a90b4 DB |
706 | if (type & IORESOURCE_PREFETCH) { |
707 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || | |
708 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
709 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
710 | return 1; | |
eb0a90b4 DB |
711 | /* Approximating prefetchable by non-prefetchable */ |
712 | res->flags = IORESOURCE_MEM; | |
1da177e4 | 713 | } |
eb0a90b4 DB |
714 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || |
715 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
716 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
717 | return 1; | |
eb0a90b4 DB |
718 | } |
719 | ||
852710d9 | 720 | dev_printk(KERN_INFO, &dev->dev, |
dd797d81 DB |
721 | "no resource of type %x available, trying to continue...\n", |
722 | type); | |
eb0a90b4 | 723 | res->start = res->end = res->flags = 0; |
b3743fa4 | 724 | return 0; |
1da177e4 LT |
725 | } |
726 | ||
727 | /* | |
728 | * Allocate the bridge mappings for the device.. | |
729 | */ | |
730 | static void yenta_allocate_resources(struct yenta_socket *socket) | |
731 | { | |
b3743fa4 DB |
732 | int program = 0; |
733 | program += yenta_allocate_res(socket, 0, IORESOURCE_IO, | |
27879835 | 734 | PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); |
b3743fa4 | 735 | program += yenta_allocate_res(socket, 1, IORESOURCE_IO, |
27879835 | 736 | PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); |
b3743fa4 | 737 | program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, |
27879835 | 738 | PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); |
b3743fa4 | 739 | program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, |
27879835 | 740 | PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); |
b3743fa4 DB |
741 | if (program) |
742 | pci_setup_cardbus(socket->dev->subordinate); | |
1da177e4 LT |
743 | } |
744 | ||
745 | ||
746 | /* | |
747 | * Free the bridge mappings for the device.. | |
748 | */ | |
749 | static void yenta_free_resources(struct yenta_socket *socket) | |
750 | { | |
751 | int i; | |
9fea84f4 | 752 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
753 | struct resource *res; |
754 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; | |
755 | if (res->start != 0 && res->end != 0) | |
756 | release_resource(res); | |
b3743fa4 | 757 | res->start = res->end = res->flags = 0; |
1da177e4 LT |
758 | } |
759 | } | |
760 | ||
761 | ||
762 | /* | |
763 | * Close it down - release our resources and go home.. | |
764 | */ | |
734f3fa1 | 765 | static void __devexit yenta_close(struct pci_dev *dev) |
1da177e4 LT |
766 | { |
767 | struct yenta_socket *sock = pci_get_drvdata(dev); | |
768 | ||
030ee39c LT |
769 | /* Remove the register attributes */ |
770 | device_remove_file(&dev->dev, &dev_attr_yenta_registers); | |
771 | ||
1da177e4 LT |
772 | /* we don't want a dying socket registered */ |
773 | pcmcia_unregister_socket(&sock->socket); | |
9fea84f4 | 774 | |
1da177e4 LT |
775 | /* Disable all events so we don't die in an IRQ storm */ |
776 | cb_writel(sock, CB_SOCKET_MASK, 0x0); | |
777 | exca_writeb(sock, I365_CSCINT, 0); | |
778 | ||
779 | if (sock->cb_irq) | |
780 | free_irq(sock->cb_irq, sock); | |
781 | else | |
782 | del_timer_sync(&sock->poll_timer); | |
783 | ||
784 | if (sock->base) | |
785 | iounmap(sock->base); | |
786 | yenta_free_resources(sock); | |
787 | ||
788 | pci_release_regions(dev); | |
789 | pci_disable_device(dev); | |
790 | pci_set_drvdata(dev, NULL); | |
791 | } | |
792 | ||
793 | ||
794 | static struct pccard_operations yenta_socket_operations = { | |
795 | .init = yenta_sock_init, | |
796 | .suspend = yenta_sock_suspend, | |
797 | .get_status = yenta_get_status, | |
1da177e4 LT |
798 | .set_socket = yenta_set_socket, |
799 | .set_io_map = yenta_set_io_map, | |
800 | .set_mem_map = yenta_set_mem_map, | |
801 | }; | |
802 | ||
803 | ||
63e7ebd0 | 804 | #ifdef CONFIG_YENTA_TI |
1da177e4 | 805 | #include "ti113x.h" |
63e7ebd0 DR |
806 | #endif |
807 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 | 808 | #include "ricoh.h" |
63e7ebd0 DR |
809 | #endif |
810 | #ifdef CONFIG_YENTA_TOSHIBA | |
1da177e4 | 811 | #include "topic.h" |
63e7ebd0 DR |
812 | #endif |
813 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 | 814 | #include "o2micro.h" |
63e7ebd0 | 815 | #endif |
1da177e4 LT |
816 | |
817 | enum { | |
818 | CARDBUS_TYPE_DEFAULT = -1, | |
819 | CARDBUS_TYPE_TI, | |
820 | CARDBUS_TYPE_TI113X, | |
821 | CARDBUS_TYPE_TI12XX, | |
822 | CARDBUS_TYPE_TI1250, | |
823 | CARDBUS_TYPE_RICOH, | |
ea2f1590 | 824 | CARDBUS_TYPE_TOPIC95, |
1da177e4 LT |
825 | CARDBUS_TYPE_TOPIC97, |
826 | CARDBUS_TYPE_O2MICRO, | |
8c3520d4 | 827 | CARDBUS_TYPE_ENE, |
1da177e4 LT |
828 | }; |
829 | ||
830 | /* | |
831 | * Different cardbus controllers have slightly different | |
832 | * initialization sequences etc details. List them here.. | |
833 | */ | |
834 | static struct cardbus_type cardbus_type[] = { | |
63e7ebd0 | 835 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
836 | [CARDBUS_TYPE_TI] = { |
837 | .override = ti_override, | |
838 | .save_state = ti_save_state, | |
839 | .restore_state = ti_restore_state, | |
840 | .sock_init = ti_init, | |
841 | }, | |
842 | [CARDBUS_TYPE_TI113X] = { | |
843 | .override = ti113x_override, | |
844 | .save_state = ti_save_state, | |
845 | .restore_state = ti_restore_state, | |
846 | .sock_init = ti_init, | |
847 | }, | |
848 | [CARDBUS_TYPE_TI12XX] = { | |
849 | .override = ti12xx_override, | |
850 | .save_state = ti_save_state, | |
851 | .restore_state = ti_restore_state, | |
852 | .sock_init = ti_init, | |
853 | }, | |
854 | [CARDBUS_TYPE_TI1250] = { | |
855 | .override = ti1250_override, | |
856 | .save_state = ti_save_state, | |
857 | .restore_state = ti_restore_state, | |
858 | .sock_init = ti_init, | |
859 | }, | |
63e7ebd0 DR |
860 | #endif |
861 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 LT |
862 | [CARDBUS_TYPE_RICOH] = { |
863 | .override = ricoh_override, | |
864 | .save_state = ricoh_save_state, | |
865 | .restore_state = ricoh_restore_state, | |
866 | }, | |
63e7ebd0 DR |
867 | #endif |
868 | #ifdef CONFIG_YENTA_TOSHIBA | |
ea2f1590 DR |
869 | [CARDBUS_TYPE_TOPIC95] = { |
870 | .override = topic95_override, | |
871 | }, | |
1da177e4 LT |
872 | [CARDBUS_TYPE_TOPIC97] = { |
873 | .override = topic97_override, | |
874 | }, | |
63e7ebd0 DR |
875 | #endif |
876 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 LT |
877 | [CARDBUS_TYPE_O2MICRO] = { |
878 | .override = o2micro_override, | |
879 | .restore_state = o2micro_restore_state, | |
880 | }, | |
63e7ebd0 DR |
881 | #endif |
882 | #ifdef CONFIG_YENTA_TI | |
8c3520d4 DR |
883 | [CARDBUS_TYPE_ENE] = { |
884 | .override = ene_override, | |
885 | .save_state = ti_save_state, | |
886 | .restore_state = ti_restore_state, | |
887 | .sock_init = ti_init, | |
888 | }, | |
63e7ebd0 | 889 | #endif |
1da177e4 LT |
890 | }; |
891 | ||
892 | ||
893 | /* | |
894 | * Only probe "regular" interrupts, don't | |
895 | * touch dangerous spots like the mouse irq, | |
896 | * because there are mice that apparently | |
897 | * get really confused if they get fondled | |
898 | * too intimately. | |
899 | * | |
900 | * Default to 11, 10, 9, 7, 6, 5, 4, 3. | |
901 | */ | |
902 | static u32 isa_interrupts = 0x0ef8; | |
903 | ||
904 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) | |
905 | { | |
906 | int i; | |
907 | unsigned long val; | |
1da177e4 LT |
908 | u32 mask; |
909 | ||
1da177e4 LT |
910 | /* |
911 | * Probe for usable interrupts using the force | |
912 | * register to generate bogus card status events. | |
913 | */ | |
914 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
915 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
916 | exca_writeb(socket, I365_CSCINT, 0); | |
917 | val = probe_irq_on() & isa_irq_mask; | |
918 | for (i = 1; i < 16; i++) { | |
919 | if (!((val >> i) & 1)) | |
920 | continue; | |
921 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); | |
922 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
923 | udelay(100); | |
924 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
925 | } | |
926 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
927 | exca_writeb(socket, I365_CSCINT, 0); | |
928 | ||
929 | mask = probe_irq_mask(val) & 0xffff; | |
930 | ||
1da177e4 LT |
931 | return mask; |
932 | } | |
933 | ||
934 | ||
78187865 | 935 | /* |
63e7ebd0 DR |
936 | * yenta PCI irq probing. |
937 | * currently only used in the TI/EnE initialization code | |
938 | */ | |
939 | #ifdef CONFIG_YENTA_TI | |
940 | ||
1da177e4 | 941 | /* interrupt handler, only used during probing */ |
7d12e780 | 942 | static irqreturn_t yenta_probe_handler(int irq, void *dev_id) |
1da177e4 LT |
943 | { |
944 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
945 | u8 csc; | |
9fea84f4 | 946 | u32 cb_event; |
1da177e4 LT |
947 | |
948 | /* Clear interrupt status for the event */ | |
949 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
950 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
951 | csc = exca_readb(socket, I365_CSC); | |
952 | ||
953 | if (cb_event || csc) { | |
954 | socket->probe_status = 1; | |
955 | return IRQ_HANDLED; | |
956 | } | |
957 | ||
958 | return IRQ_NONE; | |
959 | } | |
960 | ||
961 | /* probes the PCI interrupt, use only on override functions */ | |
962 | static int yenta_probe_cb_irq(struct yenta_socket *socket) | |
963 | { | |
1da177e4 LT |
964 | if (!socket->cb_irq) |
965 | return -1; | |
966 | ||
967 | socket->probe_status = 0; | |
968 | ||
dace1453 | 969 | if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) { |
dd797d81 DB |
970 | dev_printk(KERN_WARNING, &socket->dev->dev, |
971 | "request_irq() in yenta_probe_cb_irq() failed!\n"); | |
1da177e4 LT |
972 | return -1; |
973 | } | |
974 | ||
975 | /* generate interrupt, wait */ | |
976 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG); | |
977 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
978 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
979 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
a413c090 | 980 | |
1da177e4 LT |
981 | msleep(100); |
982 | ||
983 | /* disable interrupts */ | |
984 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
985 | exca_writeb(socket, I365_CSCINT, 0); | |
986 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
987 | exca_readb(socket, I365_CSC); | |
988 | ||
989 | free_irq(socket->cb_irq, socket); | |
990 | ||
991 | return (int) socket->probe_status; | |
992 | } | |
993 | ||
63e7ebd0 | 994 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 LT |
995 | |
996 | ||
997 | /* | |
998 | * Set static data that doesn't need re-initializing.. | |
999 | */ | |
1000 | static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) | |
1001 | { | |
1da177e4 | 1002 | socket->socket.pci_irq = socket->cb_irq; |
fa912bcb DR |
1003 | if (isa_probe) |
1004 | socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); | |
1005 | else | |
1006 | socket->socket.irq_mask = 0; | |
1da177e4 | 1007 | |
dd797d81 DB |
1008 | dev_printk(KERN_INFO, &socket->dev->dev, |
1009 | "ISA IRQ mask 0x%04x, PCI irq %d\n", | |
1010 | socket->socket.irq_mask, socket->cb_irq); | |
1da177e4 LT |
1011 | } |
1012 | ||
1013 | /* | |
1014 | * Initialize the standard cardbus registers | |
1015 | */ | |
1016 | static void yenta_config_init(struct yenta_socket *socket) | |
1017 | { | |
1018 | u16 bridge; | |
1019 | struct pci_dev *dev = socket->dev; | |
8e5d17eb | 1020 | struct pci_bus_region region; |
1da177e4 | 1021 | |
8e5d17eb | 1022 | pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]); |
1da177e4 LT |
1023 | |
1024 | config_writel(socket, CB_LEGACY_MODE_BASE, 0); | |
8e5d17eb | 1025 | config_writel(socket, PCI_BASE_ADDRESS_0, region.start); |
1da177e4 LT |
1026 | config_writew(socket, PCI_COMMAND, |
1027 | PCI_COMMAND_IO | | |
1028 | PCI_COMMAND_MEMORY | | |
1029 | PCI_COMMAND_MASTER | | |
1030 | PCI_COMMAND_WAIT); | |
1031 | ||
1032 | /* MAGIC NUMBERS! Fixme */ | |
1033 | config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); | |
1034 | config_writeb(socket, PCI_LATENCY_TIMER, 168); | |
1035 | config_writel(socket, PCI_PRIMARY_BUS, | |
1036 | (176 << 24) | /* sec. latency timer */ | |
1037 | (dev->subordinate->subordinate << 16) | /* subordinate bus */ | |
1038 | (dev->subordinate->secondary << 8) | /* secondary bus */ | |
1039 | dev->subordinate->primary); /* primary bus */ | |
1040 | ||
1041 | /* | |
1042 | * Set up the bridging state: | |
1043 | * - enable write posting. | |
1044 | * - memory window 0 prefetchable, window 1 non-prefetchable | |
1045 | * - PCI interrupts enabled if a PCI interrupt exists.. | |
1046 | */ | |
1047 | bridge = config_readw(socket, CB_BRIDGE_CONTROL); | |
a413c090 DR |
1048 | bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); |
1049 | bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; | |
1da177e4 LT |
1050 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); |
1051 | } | |
1052 | ||
b435261b | 1053 | /** |
66005216 | 1054 | * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge |
b435261b BK |
1055 | * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to |
1056 | * | |
1057 | * Checks if devices on the bus which the CardBus bridge bridges to would be | |
1058 | * invisible during PCI scans because of a misconfigured subordinate number | |
1059 | * of the parent brige - some BIOSes seem to be too lazy to set it right. | |
1060 | * Does the fixup carefully by checking how far it can go without conflicts. | |
78187865 | 1061 | * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information. |
b435261b BK |
1062 | */ |
1063 | static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) | |
1064 | { | |
1065 | struct list_head *tmp; | |
1066 | unsigned char upper_limit; | |
9fea84f4 | 1067 | /* |
b435261b BK |
1068 | * We only check and fix the parent bridge: All systems which need |
1069 | * this fixup that have been reviewed are laptops and the only bridge | |
1070 | * which needed fixing was the parent bridge of the CardBus bridge: | |
1071 | */ | |
1072 | struct pci_bus *bridge_to_fix = cardbus_bridge->parent; | |
1073 | ||
1074 | /* Check bus numbers are already set up correctly: */ | |
1075 | if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate) | |
1076 | return; /* The subordinate number is ok, nothing to do */ | |
1077 | ||
1078 | if (!bridge_to_fix->parent) | |
1079 | return; /* Root bridges are ok */ | |
1080 | ||
1081 | /* stay within the limits of the bus range of the parent: */ | |
1082 | upper_limit = bridge_to_fix->parent->subordinate; | |
1083 | ||
1084 | /* check the bus ranges of all silbling bridges to prevent overlap */ | |
1085 | list_for_each(tmp, &bridge_to_fix->parent->children) { | |
9fea84f4 | 1086 | struct pci_bus *silbling = pci_bus_b(tmp); |
b435261b BK |
1087 | /* |
1088 | * If the silbling has a higher secondary bus number | |
1089 | * and it's secondary is equal or smaller than our | |
1090 | * current upper limit, set the new upper limit to | |
1091 | * the bus number below the silbling's range: | |
1092 | */ | |
1093 | if (silbling->secondary > bridge_to_fix->subordinate | |
1094 | && silbling->secondary <= upper_limit) | |
1095 | upper_limit = silbling->secondary - 1; | |
1096 | } | |
1097 | ||
1098 | /* Show that the wanted subordinate number is not possible: */ | |
1099 | if (cardbus_bridge->subordinate > upper_limit) | |
dd797d81 DB |
1100 | dev_printk(KERN_WARNING, &cardbus_bridge->dev, |
1101 | "Upper limit for fixing this " | |
1102 | "bridge's parent bridge: #%02x\n", upper_limit); | |
b435261b BK |
1103 | |
1104 | /* If we have room to increase the bridge's subordinate number, */ | |
1105 | if (bridge_to_fix->subordinate < upper_limit) { | |
1106 | ||
1107 | /* use the highest number of the hidden bus, within limits */ | |
1108 | unsigned char subordinate_to_assign = | |
1109 | min(cardbus_bridge->subordinate, upper_limit); | |
1110 | ||
dd797d81 DB |
1111 | dev_printk(KERN_INFO, &bridge_to_fix->dev, |
1112 | "Raising subordinate bus# of parent " | |
1113 | "bus (#%02x) from #%02x to #%02x\n", | |
1114 | bridge_to_fix->number, | |
1115 | bridge_to_fix->subordinate, subordinate_to_assign); | |
b435261b BK |
1116 | |
1117 | /* Save the new subordinate in the bus struct of the bridge */ | |
1118 | bridge_to_fix->subordinate = subordinate_to_assign; | |
1119 | ||
1120 | /* and update the PCI config space with the new subordinate */ | |
1121 | pci_write_config_byte(bridge_to_fix->self, | |
1122 | PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate); | |
1123 | } | |
1124 | } | |
1125 | ||
1da177e4 LT |
1126 | /* |
1127 | * Initialize a cardbus controller. Make sure we have a usable | |
1128 | * interrupt, and that we can map the cardbus area. Fill in the | |
1129 | * socket information structure.. | |
1130 | */ | |
9fea84f4 | 1131 | static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
1132 | { |
1133 | struct yenta_socket *socket; | |
1134 | int ret; | |
c7fb0b35 IK |
1135 | |
1136 | /* | |
1137 | * If we failed to assign proper bus numbers for this cardbus | |
1138 | * controller during PCI probe, its subordinate pci_bus is NULL. | |
1139 | * Bail out if so. | |
1140 | */ | |
1141 | if (!dev->subordinate) { | |
dd797d81 DB |
1142 | dev_printk(KERN_ERR, &dev->dev, "no bus associated! " |
1143 | "(try 'pci=assign-busses')\n"); | |
c7fb0b35 IK |
1144 | return -ENODEV; |
1145 | } | |
1146 | ||
8084b372 | 1147 | socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL); |
1da177e4 LT |
1148 | if (!socket) |
1149 | return -ENOMEM; | |
1da177e4 LT |
1150 | |
1151 | /* prepare pcmcia_socket */ | |
1152 | socket->socket.ops = ¥ta_socket_operations; | |
1153 | socket->socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 1154 | socket->socket.dev.parent = &dev->dev; |
1da177e4 LT |
1155 | socket->socket.driver_data = socket; |
1156 | socket->socket.owner = THIS_MODULE; | |
5bc6b68a RK |
1157 | socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1158 | socket->socket.map_size = 0x1000; | |
1159 | socket->socket.cb_dev = dev; | |
1da177e4 LT |
1160 | |
1161 | /* prepare struct yenta_socket */ | |
1162 | socket->dev = dev; | |
1163 | pci_set_drvdata(dev, socket); | |
1164 | ||
1165 | /* | |
1166 | * Do some basic sanity checking.. | |
1167 | */ | |
1168 | if (pci_enable_device(dev)) { | |
1169 | ret = -EBUSY; | |
1170 | goto free; | |
1171 | } | |
1172 | ||
1173 | ret = pci_request_regions(dev, "yenta_socket"); | |
1174 | if (ret) | |
1175 | goto disable; | |
1176 | ||
1177 | if (!pci_resource_start(dev, 0)) { | |
dd797d81 | 1178 | dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n"); |
1da177e4 LT |
1179 | ret = -ENODEV; |
1180 | goto release; | |
1181 | } | |
1182 | ||
1183 | /* | |
1184 | * Ok, start setup.. Map the cardbus registers, | |
1185 | * and request the IRQ. | |
1186 | */ | |
1187 | socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); | |
1188 | if (!socket->base) { | |
1189 | ret = -ENOMEM; | |
1190 | goto release; | |
1191 | } | |
1192 | ||
1193 | /* | |
1194 | * report the subsystem vendor and device for help debugging | |
1195 | * the irq stuff... | |
1196 | */ | |
dd797d81 DB |
1197 | dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n", |
1198 | dev->subsystem_vendor, dev->subsystem_device); | |
1da177e4 LT |
1199 | |
1200 | yenta_config_init(socket); | |
1201 | ||
1202 | /* Disable all events */ | |
1203 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
1204 | ||
1205 | /* Set up the bridge regions.. */ | |
1206 | yenta_allocate_resources(socket); | |
1207 | ||
1208 | socket->cb_irq = dev->irq; | |
1209 | ||
1210 | /* Do we have special options for the device? */ | |
1211 | if (id->driver_data != CARDBUS_TYPE_DEFAULT && | |
1212 | id->driver_data < ARRAY_SIZE(cardbus_type)) { | |
1213 | socket->type = &cardbus_type[id->driver_data]; | |
1214 | ||
1215 | ret = socket->type->override(socket); | |
1216 | if (ret < 0) | |
1217 | goto unmap; | |
1218 | } | |
1219 | ||
1220 | /* We must finish initialization here */ | |
1221 | ||
dace1453 | 1222 | if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) { |
1da177e4 LT |
1223 | /* No IRQ or request_irq failed. Poll */ |
1224 | socket->cb_irq = 0; /* But zero is a valid IRQ number. */ | |
1225 | init_timer(&socket->poll_timer); | |
1226 | socket->poll_timer.function = yenta_interrupt_wrapper; | |
1227 | socket->poll_timer.data = (unsigned long)socket; | |
1228 | socket->poll_timer.expires = jiffies + HZ; | |
1229 | add_timer(&socket->poll_timer); | |
dd797d81 DB |
1230 | dev_printk(KERN_INFO, &dev->dev, |
1231 | "no PCI IRQ, CardBus support disabled for this " | |
1232 | "socket.\n"); | |
1233 | dev_printk(KERN_INFO, &dev->dev, | |
1234 | "check your BIOS CardBus, BIOS IRQ or ACPI " | |
1235 | "settings.\n"); | |
5bc6b68a RK |
1236 | } else { |
1237 | socket->socket.features |= SS_CAP_CARDBUS; | |
1da177e4 LT |
1238 | } |
1239 | ||
1240 | /* Figure out what the dang thing can do for the PCMCIA layer... */ | |
fa912bcb | 1241 | yenta_interrogate(socket); |
1da177e4 | 1242 | yenta_get_socket_capabilities(socket, isa_interrupts); |
dd797d81 DB |
1243 | dev_printk(KERN_INFO, &dev->dev, |
1244 | "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); | |
1da177e4 | 1245 | |
b435261b BK |
1246 | yenta_fixup_parent_bridge(dev->subordinate); |
1247 | ||
1da177e4 LT |
1248 | /* Register it with the pcmcia layer.. */ |
1249 | ret = pcmcia_register_socket(&socket->socket); | |
030ee39c LT |
1250 | if (ret == 0) { |
1251 | /* Add the yenta register attributes */ | |
4deb7c1e JG |
1252 | ret = device_create_file(&dev->dev, &dev_attr_yenta_registers); |
1253 | if (ret == 0) | |
1254 | goto out; | |
1255 | ||
1256 | /* error path... */ | |
1257 | pcmcia_unregister_socket(&socket->socket); | |
030ee39c | 1258 | } |
1da177e4 LT |
1259 | |
1260 | unmap: | |
1261 | iounmap(socket->base); | |
1262 | release: | |
1263 | pci_release_regions(dev); | |
1264 | disable: | |
1265 | pci_disable_device(dev); | |
1266 | free: | |
1267 | kfree(socket); | |
1268 | out: | |
1269 | return ret; | |
1270 | } | |
1271 | ||
f237de58 | 1272 | #ifdef CONFIG_PM |
0c570cde | 1273 | static int yenta_dev_suspend_noirq(struct device *dev) |
1da177e4 | 1274 | { |
0c570cde RW |
1275 | struct pci_dev *pdev = to_pci_dev(dev); |
1276 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1da177e4 LT |
1277 | int ret; |
1278 | ||
0c570cde | 1279 | ret = pcmcia_socket_dev_suspend(dev); |
1da177e4 | 1280 | |
0c570cde RW |
1281 | if (!socket) |
1282 | return ret; | |
1da177e4 | 1283 | |
0c570cde RW |
1284 | if (socket->type && socket->type->save_state) |
1285 | socket->type->save_state(socket); | |
1da177e4 | 1286 | |
0c570cde RW |
1287 | pci_save_state(pdev); |
1288 | pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); | |
1289 | pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); | |
1290 | pci_disable_device(pdev); | |
1291 | ||
1292 | /* | |
1293 | * Some laptops (IBM T22) do not like us putting the Cardbus | |
1294 | * bridge into D3. At a guess, some other laptop will | |
1295 | * probably require this, so leave it commented out for now. | |
1296 | */ | |
1297 | /* pci_set_power_state(dev, 3); */ | |
1da177e4 LT |
1298 | |
1299 | return ret; | |
1300 | } | |
1301 | ||
0c570cde | 1302 | static int yenta_dev_resume_noirq(struct device *dev) |
1da177e4 | 1303 | { |
0c570cde RW |
1304 | struct pci_dev *pdev = to_pci_dev(dev); |
1305 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1306 | int ret; | |
1da177e4 | 1307 | |
0c570cde RW |
1308 | if (!socket) |
1309 | return 0; | |
4deb7c1e | 1310 | |
0c570cde RW |
1311 | pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); |
1312 | pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); | |
4deb7c1e | 1313 | |
0c570cde RW |
1314 | ret = pci_enable_device(pdev); |
1315 | if (ret) | |
1316 | return ret; | |
4deb7c1e | 1317 | |
0c570cde | 1318 | pci_set_master(pdev); |
1da177e4 | 1319 | |
0c570cde RW |
1320 | if (socket->type && socket->type->restore_state) |
1321 | socket->type->restore_state(socket); | |
1da177e4 | 1322 | |
9905d1b4 RW |
1323 | pcmcia_socket_dev_early_resume(dev); |
1324 | return 0; | |
1325 | } | |
1326 | ||
1327 | static int yenta_dev_resume(struct device *dev) | |
1328 | { | |
1329 | pcmcia_socket_dev_late_resume(dev); | |
1330 | return 0; | |
1da177e4 | 1331 | } |
0c570cde | 1332 | |
47145210 | 1333 | static const struct dev_pm_ops yenta_pm_ops = { |
0c570cde RW |
1334 | .suspend_noirq = yenta_dev_suspend_noirq, |
1335 | .resume_noirq = yenta_dev_resume_noirq, | |
9905d1b4 | 1336 | .resume = yenta_dev_resume, |
0c570cde RW |
1337 | .freeze_noirq = yenta_dev_suspend_noirq, |
1338 | .thaw_noirq = yenta_dev_resume_noirq, | |
9905d1b4 | 1339 | .thaw = yenta_dev_resume, |
0c570cde RW |
1340 | .poweroff_noirq = yenta_dev_suspend_noirq, |
1341 | .restore_noirq = yenta_dev_resume_noirq, | |
9905d1b4 | 1342 | .restore = yenta_dev_resume, |
0c570cde RW |
1343 | }; |
1344 | ||
1345 | #define YENTA_PM_OPS (¥ta_pm_ops) | |
1346 | #else | |
1347 | #define YENTA_PM_OPS NULL | |
f237de58 | 1348 | #endif |
1da177e4 | 1349 | |
9fea84f4 | 1350 | #define CB_ID(vend, dev, type) \ |
1da177e4 LT |
1351 | { \ |
1352 | .vendor = vend, \ | |
1353 | .device = dev, \ | |
1354 | .subvendor = PCI_ANY_ID, \ | |
1355 | .subdevice = PCI_ANY_ID, \ | |
1356 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ | |
1357 | .class_mask = ~0, \ | |
1358 | .driver_data = CARDBUS_TYPE_##type, \ | |
1359 | } | |
1360 | ||
9fea84f4 | 1361 | static struct pci_device_id yenta_table[] = { |
1da177e4 LT |
1362 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), |
1363 | ||
1364 | /* | |
1365 | * TBD: Check if these TI variants can use more | |
1366 | * advanced overrides instead. (I can't get the | |
1367 | * data sheets for these devices. --rmk) | |
1368 | */ | |
63e7ebd0 | 1369 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
1370 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), |
1371 | ||
1372 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), | |
1373 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), | |
1374 | ||
1375 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), | |
1376 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), | |
1377 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), | |
1378 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), | |
1379 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), | |
1380 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), | |
1381 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), | |
1382 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), | |
1383 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), | |
1384 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), | |
1385 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), | |
1386 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), | |
1387 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), | |
1388 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), | |
1389 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), | |
1390 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), | |
1391 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), | |
1392 | ||
1393 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), | |
1394 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), | |
1395 | ||
6c1a10db DR |
1396 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), |
1397 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), | |
59e35ba1 | 1398 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX), |
6c1a10db DR |
1399 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), |
1400 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), | |
1401 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), | |
1402 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), | |
1403 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), | |
1404 | ||
f9cb8b71 DR |
1405 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, TI12XX), |
1406 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, TI12XX), | |
1407 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, TI12XX), | |
1408 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, TI12XX), | |
8c3520d4 DR |
1409 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), |
1410 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), | |
1411 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), | |
1412 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), | |
63e7ebd0 | 1413 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 | 1414 | |
63e7ebd0 | 1415 | #ifdef CONFIG_YENTA_RICOH |
1da177e4 LT |
1416 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), |
1417 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), | |
1418 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), | |
1419 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), | |
1420 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), | |
63e7ebd0 | 1421 | #endif |
1da177e4 | 1422 | |
63e7ebd0 | 1423 | #ifdef CONFIG_YENTA_TOSHIBA |
ea2f1590 | 1424 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), |
1da177e4 LT |
1425 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), |
1426 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), | |
63e7ebd0 | 1427 | #endif |
1da177e4 | 1428 | |
63e7ebd0 | 1429 | #ifdef CONFIG_YENTA_O2 |
1da177e4 | 1430 | CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), |
63e7ebd0 | 1431 | #endif |
1da177e4 LT |
1432 | |
1433 | /* match any cardbus bridge */ | |
1434 | CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), | |
1435 | { /* all zeroes */ } | |
1436 | }; | |
1437 | MODULE_DEVICE_TABLE(pci, yenta_table); | |
1438 | ||
1439 | ||
1440 | static struct pci_driver yenta_cardbus_driver = { | |
1441 | .name = "yenta_cardbus", | |
1442 | .id_table = yenta_table, | |
1443 | .probe = yenta_probe, | |
1444 | .remove = __devexit_p(yenta_close), | |
0c570cde | 1445 | .driver.pm = YENTA_PM_OPS, |
1da177e4 LT |
1446 | }; |
1447 | ||
1448 | ||
1449 | static int __init yenta_socket_init(void) | |
1450 | { | |
9fea84f4 | 1451 | return pci_register_driver(¥ta_cardbus_driver); |
1da177e4 LT |
1452 | } |
1453 | ||
1454 | ||
9fea84f4 | 1455 | static void __exit yenta_socket_exit(void) |
1da177e4 | 1456 | { |
9fea84f4 | 1457 | pci_unregister_driver(¥ta_cardbus_driver); |
1da177e4 LT |
1458 | } |
1459 | ||
1460 | ||
1461 | module_init(yenta_socket_init); | |
1462 | module_exit(yenta_socket_exit); | |
1463 | ||
1464 | MODULE_LICENSE("GPL"); |