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1da177e4 LT |
1 | /* |
2 | * Regular cardbus driver ("yenta_socket") | |
3 | * | |
4 | * (C) Copyright 1999, 2000 Linus Torvalds | |
5 | * | |
6 | * Changelog: | |
7 | * Aug 2002: Manfred Spraul <manfred@colorfullife.com> | |
8 | * Dynamically adjust the size of the bridge resource | |
9 | * | |
10 | * May 2003: Dominik Brodowski <linux@brodo.de> | |
11 | * Merge pci_socket.c and yenta.c into one file | |
12 | */ | |
13 | #include <linux/init.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/sched.h> | |
16 | #include <linux/workqueue.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/module.h> | |
20 | ||
21 | #include <pcmcia/version.h> | |
22 | #include <pcmcia/cs_types.h> | |
23 | #include <pcmcia/ss.h> | |
24 | #include <pcmcia/cs.h> | |
25 | ||
26 | #include <asm/io.h> | |
27 | ||
28 | #include "yenta_socket.h" | |
29 | #include "i82365.h" | |
30 | ||
31 | static int disable_clkrun; | |
32 | module_param(disable_clkrun, bool, 0444); | |
33 | MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option"); | |
34 | ||
35 | #if 0 | |
36 | #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args) | |
37 | #else | |
38 | #define debug(x,args...) | |
39 | #endif | |
40 | ||
41 | /* Don't ask.. */ | |
42 | #define to_cycles(ns) ((ns)/120) | |
43 | #define to_ns(cycles) ((cycles)*120) | |
44 | ||
45 | static int yenta_probe_cb_irq(struct yenta_socket *socket); | |
46 | ||
47 | ||
48 | static unsigned int override_bios; | |
49 | module_param(override_bios, uint, 0000); | |
50 | MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation"); | |
51 | ||
52 | /* | |
53 | * Generate easy-to-use ways of reading a cardbus sockets | |
54 | * regular memory space ("cb_xxx"), configuration space | |
55 | * ("config_xxx") and compatibility space ("exca_xxxx") | |
56 | */ | |
57 | static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) | |
58 | { | |
59 | u32 val = readl(socket->base + reg); | |
60 | debug("%p %04x %08x\n", socket, reg, val); | |
61 | return val; | |
62 | } | |
63 | ||
64 | static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) | |
65 | { | |
66 | debug("%p %04x %08x\n", socket, reg, val); | |
67 | writel(val, socket->base + reg); | |
68 | } | |
69 | ||
70 | static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) | |
71 | { | |
72 | u8 val; | |
73 | pci_read_config_byte(socket->dev, offset, &val); | |
74 | debug("%p %04x %02x\n", socket, offset, val); | |
75 | return val; | |
76 | } | |
77 | ||
78 | static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) | |
79 | { | |
80 | u16 val; | |
81 | pci_read_config_word(socket->dev, offset, &val); | |
82 | debug("%p %04x %04x\n", socket, offset, val); | |
83 | return val; | |
84 | } | |
85 | ||
86 | static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) | |
87 | { | |
88 | u32 val; | |
89 | pci_read_config_dword(socket->dev, offset, &val); | |
90 | debug("%p %04x %08x\n", socket, offset, val); | |
91 | return val; | |
92 | } | |
93 | ||
94 | static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) | |
95 | { | |
96 | debug("%p %04x %02x\n", socket, offset, val); | |
97 | pci_write_config_byte(socket->dev, offset, val); | |
98 | } | |
99 | ||
100 | static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) | |
101 | { | |
102 | debug("%p %04x %04x\n", socket, offset, val); | |
103 | pci_write_config_word(socket->dev, offset, val); | |
104 | } | |
105 | ||
106 | static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) | |
107 | { | |
108 | debug("%p %04x %08x\n", socket, offset, val); | |
109 | pci_write_config_dword(socket->dev, offset, val); | |
110 | } | |
111 | ||
112 | static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) | |
113 | { | |
114 | u8 val = readb(socket->base + 0x800 + reg); | |
115 | debug("%p %04x %02x\n", socket, reg, val); | |
116 | return val; | |
117 | } | |
118 | ||
119 | static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) | |
120 | { | |
121 | u16 val; | |
122 | val = readb(socket->base + 0x800 + reg); | |
123 | val |= readb(socket->base + 0x800 + reg + 1) << 8; | |
124 | debug("%p %04x %04x\n", socket, reg, val); | |
125 | return val; | |
126 | } | |
127 | ||
128 | static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) | |
129 | { | |
130 | debug("%p %04x %02x\n", socket, reg, val); | |
131 | writeb(val, socket->base + 0x800 + reg); | |
132 | } | |
133 | ||
134 | static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) | |
135 | { | |
136 | debug("%p %04x %04x\n", socket, reg, val); | |
137 | writeb(val, socket->base + 0x800 + reg); | |
138 | writeb(val >> 8, socket->base + 0x800 + reg + 1); | |
139 | } | |
140 | ||
141 | /* | |
142 | * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend | |
143 | * on what kind of card is inserted.. | |
144 | */ | |
145 | static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) | |
146 | { | |
147 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
148 | unsigned int val; | |
149 | u32 state = cb_readl(socket, CB_SOCKET_STATE); | |
150 | ||
151 | val = (state & CB_3VCARD) ? SS_3VCARD : 0; | |
152 | val |= (state & CB_XVCARD) ? SS_XVCARD : 0; | |
153 | val |= (state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD | CB_3VCARD | |
154 | | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; | |
155 | ||
156 | if (state & CB_CBCARD) { | |
157 | val |= SS_CARDBUS; | |
158 | val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; | |
159 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; | |
160 | val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; | |
161 | } else { | |
162 | u8 status = exca_readb(socket, I365_STATUS); | |
163 | val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; | |
164 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
165 | val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; | |
166 | } else { | |
167 | val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; | |
168 | val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; | |
169 | } | |
170 | val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; | |
171 | val |= (status & I365_CS_READY) ? SS_READY : 0; | |
172 | val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; | |
173 | } | |
174 | ||
175 | *value = val; | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static int yenta_Vcc_power(u32 control) | |
180 | { | |
181 | switch (control & CB_SC_VCC_MASK) { | |
182 | case CB_SC_VCC_5V: return 50; | |
183 | case CB_SC_VCC_3V: return 33; | |
184 | default: return 0; | |
185 | } | |
186 | } | |
187 | ||
188 | static int yenta_Vpp_power(u32 control) | |
189 | { | |
190 | switch (control & CB_SC_VPP_MASK) { | |
191 | case CB_SC_VPP_12V: return 120; | |
192 | case CB_SC_VPP_5V: return 50; | |
193 | case CB_SC_VPP_3V: return 33; | |
194 | default: return 0; | |
195 | } | |
196 | } | |
197 | ||
198 | static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state) | |
199 | { | |
200 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
201 | u8 reg; | |
202 | u32 control; | |
203 | ||
204 | control = cb_readl(socket, CB_SOCKET_CONTROL); | |
205 | ||
206 | state->Vcc = yenta_Vcc_power(control); | |
207 | state->Vpp = yenta_Vpp_power(control); | |
208 | state->io_irq = socket->io_irq; | |
209 | ||
210 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { | |
211 | u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL); | |
212 | if (bridge & CB_BRIDGE_CRST) | |
213 | state->flags |= SS_RESET; | |
214 | return 0; | |
215 | } | |
216 | ||
217 | /* 16-bit card state.. */ | |
218 | reg = exca_readb(socket, I365_POWER); | |
219 | state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0; | |
220 | state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0; | |
221 | ||
222 | reg = exca_readb(socket, I365_INTCTL); | |
223 | state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET; | |
224 | state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0; | |
225 | ||
226 | reg = exca_readb(socket, I365_CSCINT); | |
227 | state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0; | |
228 | if (state->flags & SS_IOCARD) { | |
229 | state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0; | |
230 | } else { | |
231 | state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0; | |
232 | state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0; | |
233 | state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0; | |
234 | } | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
239 | static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) | |
240 | { | |
241 | u32 reg = 0; /* CB_SC_STPCLK? */ | |
242 | switch (state->Vcc) { | |
243 | case 33: reg = CB_SC_VCC_3V; break; | |
244 | case 50: reg = CB_SC_VCC_5V; break; | |
245 | default: reg = 0; break; | |
246 | } | |
247 | switch (state->Vpp) { | |
248 | case 33: reg |= CB_SC_VPP_3V; break; | |
249 | case 50: reg |= CB_SC_VPP_5V; break; | |
250 | case 120: reg |= CB_SC_VPP_12V; break; | |
251 | } | |
252 | if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) | |
253 | cb_writel(socket, CB_SOCKET_CONTROL, reg); | |
254 | } | |
255 | ||
256 | static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) | |
257 | { | |
258 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
259 | u16 bridge; | |
260 | ||
261 | yenta_set_power(socket, state); | |
262 | socket->io_irq = state->io_irq; | |
263 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); | |
264 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { | |
265 | u8 intr; | |
266 | bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; | |
267 | ||
268 | /* ISA interrupt control? */ | |
269 | intr = exca_readb(socket, I365_INTCTL); | |
270 | intr = (intr & ~0xf); | |
271 | if (!socket->cb_irq) { | |
272 | intr |= state->io_irq; | |
273 | bridge |= CB_BRIDGE_INTR; | |
274 | } | |
275 | exca_writeb(socket, I365_INTCTL, intr); | |
276 | } else { | |
277 | u8 reg; | |
278 | ||
279 | reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); | |
280 | reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; | |
281 | reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; | |
282 | if (state->io_irq != socket->cb_irq) { | |
283 | reg |= state->io_irq; | |
284 | bridge |= CB_BRIDGE_INTR; | |
285 | } | |
286 | exca_writeb(socket, I365_INTCTL, reg); | |
287 | ||
288 | reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); | |
289 | reg |= I365_PWR_NORESET; | |
290 | if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO; | |
291 | if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT; | |
292 | if (exca_readb(socket, I365_POWER) != reg) | |
293 | exca_writeb(socket, I365_POWER, reg); | |
294 | ||
295 | /* CSC interrupt: no ISA irq for CSC */ | |
296 | reg = I365_CSC_DETECT; | |
297 | if (state->flags & SS_IOCARD) { | |
298 | if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG; | |
299 | } else { | |
300 | if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1; | |
301 | if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2; | |
302 | if (state->csc_mask & SS_READY) reg |= I365_CSC_READY; | |
303 | } | |
304 | exca_writeb(socket, I365_CSCINT, reg); | |
305 | exca_readb(socket, I365_CSC); | |
306 | if(sock->zoom_video) | |
307 | sock->zoom_video(sock, state->flags & SS_ZVCARD); | |
308 | } | |
309 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
310 | /* Socket event mask: get card insert/remove events.. */ | |
311 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
312 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
313 | return 0; | |
314 | } | |
315 | ||
316 | static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |
317 | { | |
318 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
319 | int map; | |
320 | unsigned char ioctl, addr, enable; | |
321 | ||
322 | map = io->map; | |
323 | ||
324 | if (map > 1) | |
325 | return -EINVAL; | |
326 | ||
327 | enable = I365_ENA_IO(map); | |
328 | addr = exca_readb(socket, I365_ADDRWIN); | |
329 | ||
330 | /* Disable the window before changing it.. */ | |
331 | if (addr & enable) { | |
332 | addr &= ~enable; | |
333 | exca_writeb(socket, I365_ADDRWIN, addr); | |
334 | } | |
335 | ||
336 | exca_writew(socket, I365_IO(map)+I365_W_START, io->start); | |
337 | exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
338 | ||
339 | ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
340 | if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); | |
341 | if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); | |
342 | if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); | |
343 | exca_writeb(socket, I365_IOCTL, ioctl); | |
344 | ||
345 | if (io->flags & MAP_ACTIVE) | |
346 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
347 | return 0; | |
348 | } | |
349 | ||
350 | static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) | |
351 | { | |
352 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
353 | struct pci_bus_region region; | |
354 | int map; | |
355 | unsigned char addr, enable; | |
356 | unsigned int start, stop, card_start; | |
357 | unsigned short word; | |
358 | ||
359 | pcibios_resource_to_bus(socket->dev, ®ion, mem->res); | |
360 | ||
361 | map = mem->map; | |
362 | start = region.start; | |
363 | stop = region.end; | |
364 | card_start = mem->card_start; | |
365 | ||
366 | if (map > 4 || start > stop || ((start ^ stop) >> 24) || | |
367 | (card_start >> 26) || mem->speed > 1000) | |
368 | return -EINVAL; | |
369 | ||
370 | enable = I365_ENA_MEM(map); | |
371 | addr = exca_readb(socket, I365_ADDRWIN); | |
372 | if (addr & enable) { | |
373 | addr &= ~enable; | |
374 | exca_writeb(socket, I365_ADDRWIN, addr); | |
375 | } | |
376 | ||
377 | exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); | |
378 | ||
379 | word = (start >> 12) & 0x0fff; | |
380 | if (mem->flags & MAP_16BIT) | |
381 | word |= I365_MEM_16BIT; | |
382 | if (mem->flags & MAP_0WS) | |
383 | word |= I365_MEM_0WS; | |
384 | exca_writew(socket, I365_MEM(map) + I365_W_START, word); | |
385 | ||
386 | word = (stop >> 12) & 0x0fff; | |
387 | switch (to_cycles(mem->speed)) { | |
388 | case 0: break; | |
389 | case 1: word |= I365_MEM_WS0; break; | |
390 | case 2: word |= I365_MEM_WS1; break; | |
391 | default: word |= I365_MEM_WS1 | I365_MEM_WS0; break; | |
392 | } | |
393 | exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); | |
394 | ||
395 | word = ((card_start - start) >> 12) & 0x3fff; | |
396 | if (mem->flags & MAP_WRPROT) | |
397 | word |= I365_MEM_WRPROT; | |
398 | if (mem->flags & MAP_ATTRIB) | |
399 | word |= I365_MEM_REG; | |
400 | exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); | |
401 | ||
402 | if (mem->flags & MAP_ACTIVE) | |
403 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
404 | return 0; | |
405 | } | |
406 | ||
407 | ||
408 | static unsigned int yenta_events(struct yenta_socket *socket) | |
409 | { | |
410 | u8 csc; | |
411 | u32 cb_event; | |
412 | unsigned int events; | |
413 | ||
414 | /* Clear interrupt status for the event */ | |
415 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
416 | cb_writel(socket, CB_SOCKET_EVENT, cb_event); | |
417 | ||
418 | csc = exca_readb(socket, I365_CSC); | |
419 | ||
420 | events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; | |
421 | events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; | |
422 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
423 | events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; | |
424 | } else { | |
425 | events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; | |
426 | events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; | |
427 | events |= (csc & I365_CSC_READY) ? SS_READY : 0; | |
428 | } | |
429 | return events; | |
430 | } | |
431 | ||
432 | ||
433 | static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
434 | { | |
435 | unsigned int events; | |
436 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
437 | ||
438 | events = yenta_events(socket); | |
439 | if (events) { | |
440 | pcmcia_parse_events(&socket->socket, events); | |
441 | return IRQ_HANDLED; | |
442 | } | |
443 | return IRQ_NONE; | |
444 | } | |
445 | ||
446 | static void yenta_interrupt_wrapper(unsigned long data) | |
447 | { | |
448 | struct yenta_socket *socket = (struct yenta_socket *) data; | |
449 | ||
450 | yenta_interrupt(0, (void *)socket, NULL); | |
451 | socket->poll_timer.expires = jiffies + HZ; | |
452 | add_timer(&socket->poll_timer); | |
453 | } | |
454 | ||
455 | static void yenta_clear_maps(struct yenta_socket *socket) | |
456 | { | |
457 | int i; | |
458 | struct resource res = { .start = 0, .end = 0x0fff }; | |
459 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
460 | pccard_mem_map mem = { .res = &res, }; | |
461 | ||
462 | yenta_set_socket(&socket->socket, &dead_socket); | |
463 | for (i = 0; i < 2; i++) { | |
464 | io.map = i; | |
465 | yenta_set_io_map(&socket->socket, &io); | |
466 | } | |
467 | for (i = 0; i < 5; i++) { | |
468 | mem.map = i; | |
469 | yenta_set_mem_map(&socket->socket, &mem); | |
470 | } | |
471 | } | |
472 | ||
473 | /* Called at resume and initialization events */ | |
474 | static int yenta_sock_init(struct pcmcia_socket *sock) | |
475 | { | |
476 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
477 | u32 state; | |
478 | u16 bridge; | |
479 | ||
480 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR; | |
481 | if (!socket->cb_irq) | |
482 | bridge |= CB_BRIDGE_INTR; | |
483 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
484 | ||
485 | exca_writeb(socket, I365_GBLCTL, 0x00); | |
486 | exca_writeb(socket, I365_GENCTL, 0x00); | |
487 | ||
488 | /* Redo card voltage interrogation */ | |
489 | state = cb_readl(socket, CB_SOCKET_STATE); | |
490 | if (!(state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD | | |
491 | CB_3VCARD | CB_XVCARD | CB_YVCARD))) | |
492 | cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); | |
493 | ||
494 | yenta_clear_maps(socket); | |
495 | ||
496 | if (socket->type && socket->type->sock_init) | |
497 | socket->type->sock_init(socket); | |
498 | ||
499 | /* Re-enable CSC interrupts */ | |
500 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
505 | static int yenta_sock_suspend(struct pcmcia_socket *sock) | |
506 | { | |
507 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
508 | ||
509 | /* Disable CSC interrupts */ | |
510 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
511 | ||
512 | return 0; | |
513 | } | |
514 | ||
515 | /* | |
516 | * Use an adaptive allocation for the memory resource, | |
517 | * sometimes the memory behind pci bridges is limited: | |
518 | * 1/8 of the size of the io window of the parent. | |
519 | * max 4 MB, min 16 kB. | |
520 | */ | |
521 | #define BRIDGE_MEM_MAX 4*1024*1024 | |
522 | #define BRIDGE_MEM_MIN 16*1024 | |
523 | ||
524 | #define BRIDGE_IO_MAX 256 | |
525 | #define BRIDGE_IO_MIN 32 | |
526 | ||
527 | #ifndef PCIBIOS_MIN_CARDBUS_IO | |
528 | #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO | |
529 | #endif | |
530 | ||
531 | static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type) | |
532 | { | |
533 | struct pci_bus *bus; | |
534 | struct resource *root, *res; | |
535 | u32 start, end; | |
536 | u32 align, size, min; | |
537 | unsigned offset; | |
538 | unsigned mask; | |
539 | ||
540 | /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ | |
541 | mask = ~0xfff; | |
542 | if (type & IORESOURCE_IO) | |
543 | mask = ~3; | |
544 | ||
545 | offset = 0x1c + 8*nr; | |
546 | bus = socket->dev->subordinate; | |
547 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr; | |
548 | res->name = bus->name; | |
549 | res->flags = type; | |
550 | res->start = 0; | |
551 | res->end = 0; | |
552 | root = pci_find_parent_resource(socket->dev, res); | |
553 | ||
554 | if (!root) | |
555 | return; | |
556 | ||
557 | start = config_readl(socket, offset) & mask; | |
558 | end = config_readl(socket, offset+4) | ~mask; | |
559 | if (start && end > start && !override_bios) { | |
560 | res->start = start; | |
561 | res->end = end; | |
562 | if (request_resource(root, res) == 0) | |
563 | return; | |
564 | printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n", | |
565 | pci_name(socket->dev), nr); | |
566 | res->start = res->end = 0; | |
567 | } | |
568 | ||
569 | if (type & IORESOURCE_IO) { | |
570 | align = 1024; | |
571 | size = BRIDGE_IO_MAX; | |
572 | min = BRIDGE_IO_MIN; | |
573 | start = PCIBIOS_MIN_CARDBUS_IO; | |
574 | end = ~0U; | |
575 | } else { | |
576 | unsigned long avail = root->end - root->start; | |
577 | int i; | |
578 | size = BRIDGE_MEM_MAX; | |
579 | if (size > avail/8) { | |
580 | size=(avail+1)/8; | |
581 | /* round size down to next power of 2 */ | |
582 | i = 0; | |
583 | while ((size /= 2) != 0) | |
584 | i++; | |
585 | size = 1 << i; | |
586 | } | |
587 | if (size < BRIDGE_MEM_MIN) | |
588 | size = BRIDGE_MEM_MIN; | |
589 | min = BRIDGE_MEM_MIN; | |
590 | align = size; | |
591 | start = PCIBIOS_MIN_MEM; | |
592 | end = ~0U; | |
593 | } | |
594 | ||
595 | do { | |
596 | if (allocate_resource(root, res, size, start, end, align, NULL, NULL)==0) { | |
597 | config_writel(socket, offset, res->start); | |
598 | config_writel(socket, offset+4, res->end); | |
599 | return; | |
600 | } | |
601 | size = size/2; | |
602 | align = size; | |
603 | } while (size >= min); | |
604 | printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n", | |
605 | pci_name(socket->dev), type); | |
606 | res->start = res->end = 0; | |
607 | } | |
608 | ||
609 | /* | |
610 | * Allocate the bridge mappings for the device.. | |
611 | */ | |
612 | static void yenta_allocate_resources(struct yenta_socket *socket) | |
613 | { | |
614 | yenta_allocate_res(socket, 0, IORESOURCE_MEM|IORESOURCE_PREFETCH); | |
615 | yenta_allocate_res(socket, 1, IORESOURCE_MEM); | |
616 | yenta_allocate_res(socket, 2, IORESOURCE_IO); | |
617 | yenta_allocate_res(socket, 3, IORESOURCE_IO); /* PCI isn't clever enough to use this one yet */ | |
618 | } | |
619 | ||
620 | ||
621 | /* | |
622 | * Free the bridge mappings for the device.. | |
623 | */ | |
624 | static void yenta_free_resources(struct yenta_socket *socket) | |
625 | { | |
626 | int i; | |
627 | for (i=0;i<4;i++) { | |
628 | struct resource *res; | |
629 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; | |
630 | if (res->start != 0 && res->end != 0) | |
631 | release_resource(res); | |
632 | res->start = res->end = 0; | |
633 | } | |
634 | } | |
635 | ||
636 | ||
637 | /* | |
638 | * Close it down - release our resources and go home.. | |
639 | */ | |
640 | static void yenta_close(struct pci_dev *dev) | |
641 | { | |
642 | struct yenta_socket *sock = pci_get_drvdata(dev); | |
643 | ||
644 | /* we don't want a dying socket registered */ | |
645 | pcmcia_unregister_socket(&sock->socket); | |
646 | ||
647 | /* Disable all events so we don't die in an IRQ storm */ | |
648 | cb_writel(sock, CB_SOCKET_MASK, 0x0); | |
649 | exca_writeb(sock, I365_CSCINT, 0); | |
650 | ||
651 | if (sock->cb_irq) | |
652 | free_irq(sock->cb_irq, sock); | |
653 | else | |
654 | del_timer_sync(&sock->poll_timer); | |
655 | ||
656 | if (sock->base) | |
657 | iounmap(sock->base); | |
658 | yenta_free_resources(sock); | |
659 | ||
660 | pci_release_regions(dev); | |
661 | pci_disable_device(dev); | |
662 | pci_set_drvdata(dev, NULL); | |
663 | } | |
664 | ||
665 | ||
666 | static struct pccard_operations yenta_socket_operations = { | |
667 | .init = yenta_sock_init, | |
668 | .suspend = yenta_sock_suspend, | |
669 | .get_status = yenta_get_status, | |
670 | .get_socket = yenta_get_socket, | |
671 | .set_socket = yenta_set_socket, | |
672 | .set_io_map = yenta_set_io_map, | |
673 | .set_mem_map = yenta_set_mem_map, | |
674 | }; | |
675 | ||
676 | ||
677 | #include "ti113x.h" | |
678 | #include "ricoh.h" | |
679 | #include "topic.h" | |
680 | #include "o2micro.h" | |
681 | ||
682 | enum { | |
683 | CARDBUS_TYPE_DEFAULT = -1, | |
684 | CARDBUS_TYPE_TI, | |
685 | CARDBUS_TYPE_TI113X, | |
686 | CARDBUS_TYPE_TI12XX, | |
687 | CARDBUS_TYPE_TI1250, | |
688 | CARDBUS_TYPE_RICOH, | |
689 | CARDBUS_TYPE_TOPIC97, | |
690 | CARDBUS_TYPE_O2MICRO, | |
691 | }; | |
692 | ||
693 | /* | |
694 | * Different cardbus controllers have slightly different | |
695 | * initialization sequences etc details. List them here.. | |
696 | */ | |
697 | static struct cardbus_type cardbus_type[] = { | |
698 | [CARDBUS_TYPE_TI] = { | |
699 | .override = ti_override, | |
700 | .save_state = ti_save_state, | |
701 | .restore_state = ti_restore_state, | |
702 | .sock_init = ti_init, | |
703 | }, | |
704 | [CARDBUS_TYPE_TI113X] = { | |
705 | .override = ti113x_override, | |
706 | .save_state = ti_save_state, | |
707 | .restore_state = ti_restore_state, | |
708 | .sock_init = ti_init, | |
709 | }, | |
710 | [CARDBUS_TYPE_TI12XX] = { | |
711 | .override = ti12xx_override, | |
712 | .save_state = ti_save_state, | |
713 | .restore_state = ti_restore_state, | |
714 | .sock_init = ti_init, | |
715 | }, | |
716 | [CARDBUS_TYPE_TI1250] = { | |
717 | .override = ti1250_override, | |
718 | .save_state = ti_save_state, | |
719 | .restore_state = ti_restore_state, | |
720 | .sock_init = ti_init, | |
721 | }, | |
722 | [CARDBUS_TYPE_RICOH] = { | |
723 | .override = ricoh_override, | |
724 | .save_state = ricoh_save_state, | |
725 | .restore_state = ricoh_restore_state, | |
726 | }, | |
727 | [CARDBUS_TYPE_TOPIC97] = { | |
728 | .override = topic97_override, | |
729 | }, | |
730 | [CARDBUS_TYPE_O2MICRO] = { | |
731 | .override = o2micro_override, | |
732 | .restore_state = o2micro_restore_state, | |
733 | }, | |
734 | }; | |
735 | ||
736 | ||
737 | /* | |
738 | * Only probe "regular" interrupts, don't | |
739 | * touch dangerous spots like the mouse irq, | |
740 | * because there are mice that apparently | |
741 | * get really confused if they get fondled | |
742 | * too intimately. | |
743 | * | |
744 | * Default to 11, 10, 9, 7, 6, 5, 4, 3. | |
745 | */ | |
746 | static u32 isa_interrupts = 0x0ef8; | |
747 | ||
748 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) | |
749 | { | |
750 | int i; | |
751 | unsigned long val; | |
752 | u16 bridge_ctrl; | |
753 | u32 mask; | |
754 | ||
755 | /* Set up ISA irq routing to probe the ISA irqs.. */ | |
756 | bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL); | |
757 | if (!(bridge_ctrl & CB_BRIDGE_INTR)) { | |
758 | bridge_ctrl |= CB_BRIDGE_INTR; | |
759 | config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl); | |
760 | } | |
761 | ||
762 | /* | |
763 | * Probe for usable interrupts using the force | |
764 | * register to generate bogus card status events. | |
765 | */ | |
766 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
767 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
768 | exca_writeb(socket, I365_CSCINT, 0); | |
769 | val = probe_irq_on() & isa_irq_mask; | |
770 | for (i = 1; i < 16; i++) { | |
771 | if (!((val >> i) & 1)) | |
772 | continue; | |
773 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); | |
774 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
775 | udelay(100); | |
776 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
777 | } | |
778 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
779 | exca_writeb(socket, I365_CSCINT, 0); | |
780 | ||
781 | mask = probe_irq_mask(val) & 0xffff; | |
782 | ||
783 | bridge_ctrl &= ~CB_BRIDGE_INTR; | |
784 | config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl); | |
785 | ||
786 | return mask; | |
787 | } | |
788 | ||
789 | ||
790 | /* interrupt handler, only used during probing */ | |
791 | static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs) | |
792 | { | |
793 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
794 | u8 csc; | |
795 | u32 cb_event; | |
796 | ||
797 | /* Clear interrupt status for the event */ | |
798 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
799 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
800 | csc = exca_readb(socket, I365_CSC); | |
801 | ||
802 | if (cb_event || csc) { | |
803 | socket->probe_status = 1; | |
804 | return IRQ_HANDLED; | |
805 | } | |
806 | ||
807 | return IRQ_NONE; | |
808 | } | |
809 | ||
810 | /* probes the PCI interrupt, use only on override functions */ | |
811 | static int yenta_probe_cb_irq(struct yenta_socket *socket) | |
812 | { | |
813 | u16 bridge_ctrl; | |
814 | ||
815 | if (!socket->cb_irq) | |
816 | return -1; | |
817 | ||
818 | socket->probe_status = 0; | |
819 | ||
820 | /* disable ISA interrupts */ | |
821 | bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL); | |
822 | bridge_ctrl &= ~CB_BRIDGE_INTR; | |
823 | config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl); | |
824 | ||
825 | if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) { | |
826 | printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n"); | |
827 | return -1; | |
828 | } | |
829 | ||
830 | /* generate interrupt, wait */ | |
831 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG); | |
832 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
833 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
834 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
835 | ||
836 | msleep(100); | |
837 | ||
838 | /* disable interrupts */ | |
839 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
840 | exca_writeb(socket, I365_CSCINT, 0); | |
841 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
842 | exca_readb(socket, I365_CSC); | |
843 | ||
844 | free_irq(socket->cb_irq, socket); | |
845 | ||
846 | return (int) socket->probe_status; | |
847 | } | |
848 | ||
849 | ||
850 | ||
851 | /* | |
852 | * Set static data that doesn't need re-initializing.. | |
853 | */ | |
854 | static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) | |
855 | { | |
856 | socket->socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD | SS_CAP_CARDBUS; | |
857 | socket->socket.map_size = 0x1000; | |
858 | socket->socket.pci_irq = socket->cb_irq; | |
859 | socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); | |
860 | socket->socket.cb_dev = socket->dev; | |
861 | ||
862 | printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n", | |
863 | socket->socket.irq_mask, socket->cb_irq); | |
864 | } | |
865 | ||
866 | /* | |
867 | * Initialize the standard cardbus registers | |
868 | */ | |
869 | static void yenta_config_init(struct yenta_socket *socket) | |
870 | { | |
871 | u16 bridge; | |
872 | struct pci_dev *dev = socket->dev; | |
873 | ||
874 | pci_set_power_state(socket->dev, 0); | |
875 | ||
876 | config_writel(socket, CB_LEGACY_MODE_BASE, 0); | |
877 | config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start); | |
878 | config_writew(socket, PCI_COMMAND, | |
879 | PCI_COMMAND_IO | | |
880 | PCI_COMMAND_MEMORY | | |
881 | PCI_COMMAND_MASTER | | |
882 | PCI_COMMAND_WAIT); | |
883 | ||
884 | /* MAGIC NUMBERS! Fixme */ | |
885 | config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); | |
886 | config_writeb(socket, PCI_LATENCY_TIMER, 168); | |
887 | config_writel(socket, PCI_PRIMARY_BUS, | |
888 | (176 << 24) | /* sec. latency timer */ | |
889 | (dev->subordinate->subordinate << 16) | /* subordinate bus */ | |
890 | (dev->subordinate->secondary << 8) | /* secondary bus */ | |
891 | dev->subordinate->primary); /* primary bus */ | |
892 | ||
893 | /* | |
894 | * Set up the bridging state: | |
895 | * - enable write posting. | |
896 | * - memory window 0 prefetchable, window 1 non-prefetchable | |
897 | * - PCI interrupts enabled if a PCI interrupt exists.. | |
898 | */ | |
899 | bridge = config_readw(socket, CB_BRIDGE_CONTROL); | |
900 | bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); | |
901 | bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR; | |
902 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
903 | } | |
904 | ||
905 | /* | |
906 | * Initialize a cardbus controller. Make sure we have a usable | |
907 | * interrupt, and that we can map the cardbus area. Fill in the | |
908 | * socket information structure.. | |
909 | */ | |
910 | static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id) | |
911 | { | |
912 | struct yenta_socket *socket; | |
913 | int ret; | |
914 | ||
915 | socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL); | |
916 | if (!socket) | |
917 | return -ENOMEM; | |
918 | memset(socket, 0, sizeof(*socket)); | |
919 | ||
920 | /* prepare pcmcia_socket */ | |
921 | socket->socket.ops = ¥ta_socket_operations; | |
922 | socket->socket.resource_ops = &pccard_nonstatic_ops; | |
923 | socket->socket.dev.dev = &dev->dev; | |
924 | socket->socket.driver_data = socket; | |
925 | socket->socket.owner = THIS_MODULE; | |
926 | ||
927 | /* prepare struct yenta_socket */ | |
928 | socket->dev = dev; | |
929 | pci_set_drvdata(dev, socket); | |
930 | ||
931 | /* | |
932 | * Do some basic sanity checking.. | |
933 | */ | |
934 | if (pci_enable_device(dev)) { | |
935 | ret = -EBUSY; | |
936 | goto free; | |
937 | } | |
938 | ||
939 | ret = pci_request_regions(dev, "yenta_socket"); | |
940 | if (ret) | |
941 | goto disable; | |
942 | ||
943 | if (!pci_resource_start(dev, 0)) { | |
944 | printk(KERN_ERR "No cardbus resource!\n"); | |
945 | ret = -ENODEV; | |
946 | goto release; | |
947 | } | |
948 | ||
949 | /* | |
950 | * Ok, start setup.. Map the cardbus registers, | |
951 | * and request the IRQ. | |
952 | */ | |
953 | socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); | |
954 | if (!socket->base) { | |
955 | ret = -ENOMEM; | |
956 | goto release; | |
957 | } | |
958 | ||
959 | /* | |
960 | * report the subsystem vendor and device for help debugging | |
961 | * the irq stuff... | |
962 | */ | |
963 | printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n", | |
964 | pci_name(dev), dev->subsystem_vendor, dev->subsystem_device); | |
965 | ||
966 | yenta_config_init(socket); | |
967 | ||
968 | /* Disable all events */ | |
969 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
970 | ||
971 | /* Set up the bridge regions.. */ | |
972 | yenta_allocate_resources(socket); | |
973 | ||
974 | socket->cb_irq = dev->irq; | |
975 | ||
976 | /* Do we have special options for the device? */ | |
977 | if (id->driver_data != CARDBUS_TYPE_DEFAULT && | |
978 | id->driver_data < ARRAY_SIZE(cardbus_type)) { | |
979 | socket->type = &cardbus_type[id->driver_data]; | |
980 | ||
981 | ret = socket->type->override(socket); | |
982 | if (ret < 0) | |
983 | goto unmap; | |
984 | } | |
985 | ||
986 | /* We must finish initialization here */ | |
987 | ||
988 | if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) { | |
989 | /* No IRQ or request_irq failed. Poll */ | |
990 | socket->cb_irq = 0; /* But zero is a valid IRQ number. */ | |
991 | init_timer(&socket->poll_timer); | |
992 | socket->poll_timer.function = yenta_interrupt_wrapper; | |
993 | socket->poll_timer.data = (unsigned long)socket; | |
994 | socket->poll_timer.expires = jiffies + HZ; | |
995 | add_timer(&socket->poll_timer); | |
996 | } | |
997 | ||
998 | /* Figure out what the dang thing can do for the PCMCIA layer... */ | |
999 | yenta_get_socket_capabilities(socket, isa_interrupts); | |
1000 | printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); | |
1001 | ||
1002 | /* Register it with the pcmcia layer.. */ | |
1003 | ret = pcmcia_register_socket(&socket->socket); | |
1004 | if (ret == 0) | |
1005 | goto out; | |
1006 | ||
1007 | unmap: | |
1008 | iounmap(socket->base); | |
1009 | release: | |
1010 | pci_release_regions(dev); | |
1011 | disable: | |
1012 | pci_disable_device(dev); | |
1013 | free: | |
1014 | kfree(socket); | |
1015 | out: | |
1016 | return ret; | |
1017 | } | |
1018 | ||
1019 | ||
1020 | static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state) | |
1021 | { | |
1022 | struct yenta_socket *socket = pci_get_drvdata(dev); | |
1023 | int ret; | |
1024 | ||
1025 | ret = pcmcia_socket_dev_suspend(&dev->dev, state); | |
1026 | ||
1027 | if (socket) { | |
1028 | if (socket->type && socket->type->save_state) | |
1029 | socket->type->save_state(socket); | |
1030 | ||
1031 | /* FIXME: pci_save_state needs to have a better interface */ | |
1032 | pci_save_state(dev); | |
1033 | pci_read_config_dword(dev, 16*4, &socket->saved_state[0]); | |
1034 | pci_read_config_dword(dev, 17*4, &socket->saved_state[1]); | |
1035 | ||
1036 | /* | |
1037 | * Some laptops (IBM T22) do not like us putting the Cardbus | |
1038 | * bridge into D3. At a guess, some other laptop will | |
1039 | * probably require this, so leave it commented out for now. | |
1040 | */ | |
1041 | /* pci_set_power_state(dev, 3); */ | |
1042 | } | |
1043 | ||
1044 | return ret; | |
1045 | } | |
1046 | ||
1047 | ||
1048 | static int yenta_dev_resume (struct pci_dev *dev) | |
1049 | { | |
1050 | struct yenta_socket *socket = pci_get_drvdata(dev); | |
1051 | ||
1052 | if (socket) { | |
1053 | pci_set_power_state(dev, 0); | |
1054 | /* FIXME: pci_restore_state needs to have a better interface */ | |
1055 | pci_restore_state(dev); | |
1056 | pci_write_config_dword(dev, 16*4, socket->saved_state[0]); | |
1057 | pci_write_config_dword(dev, 17*4, socket->saved_state[1]); | |
1058 | ||
1059 | if (socket->type && socket->type->restore_state) | |
1060 | socket->type->restore_state(socket); | |
1061 | } | |
1062 | ||
1063 | return pcmcia_socket_dev_resume(&dev->dev); | |
1064 | } | |
1065 | ||
1066 | ||
1067 | #define CB_ID(vend,dev,type) \ | |
1068 | { \ | |
1069 | .vendor = vend, \ | |
1070 | .device = dev, \ | |
1071 | .subvendor = PCI_ANY_ID, \ | |
1072 | .subdevice = PCI_ANY_ID, \ | |
1073 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ | |
1074 | .class_mask = ~0, \ | |
1075 | .driver_data = CARDBUS_TYPE_##type, \ | |
1076 | } | |
1077 | ||
1078 | static struct pci_device_id yenta_table [] = { | |
1079 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), | |
1080 | ||
1081 | /* | |
1082 | * TBD: Check if these TI variants can use more | |
1083 | * advanced overrides instead. (I can't get the | |
1084 | * data sheets for these devices. --rmk) | |
1085 | */ | |
1086 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), | |
1087 | ||
1088 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), | |
1089 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), | |
1090 | ||
1091 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), | |
1092 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), | |
1093 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), | |
1094 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), | |
1095 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), | |
1096 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), | |
1097 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), | |
1098 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), | |
1099 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), | |
1100 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), | |
1101 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), | |
1102 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), | |
1103 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), | |
1104 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), | |
1105 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), | |
1106 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), | |
1107 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), | |
1108 | ||
1109 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), | |
1110 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), | |
1111 | ||
1112 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX), | |
1113 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX), | |
1114 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250), | |
1115 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX), | |
1116 | ||
1117 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), | |
1118 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), | |
1119 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), | |
1120 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), | |
1121 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), | |
1122 | ||
1123 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), | |
1124 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), | |
1125 | ||
1126 | CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), | |
1127 | ||
1128 | /* match any cardbus bridge */ | |
1129 | CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), | |
1130 | { /* all zeroes */ } | |
1131 | }; | |
1132 | MODULE_DEVICE_TABLE(pci, yenta_table); | |
1133 | ||
1134 | ||
1135 | static struct pci_driver yenta_cardbus_driver = { | |
1136 | .name = "yenta_cardbus", | |
1137 | .id_table = yenta_table, | |
1138 | .probe = yenta_probe, | |
1139 | .remove = __devexit_p(yenta_close), | |
1140 | .suspend = yenta_dev_suspend, | |
1141 | .resume = yenta_dev_resume, | |
1142 | }; | |
1143 | ||
1144 | ||
1145 | static int __init yenta_socket_init(void) | |
1146 | { | |
1147 | return pci_register_driver (¥ta_cardbus_driver); | |
1148 | } | |
1149 | ||
1150 | ||
1151 | static void __exit yenta_socket_exit (void) | |
1152 | { | |
1153 | pci_unregister_driver (¥ta_cardbus_driver); | |
1154 | } | |
1155 | ||
1156 | ||
1157 | module_init(yenta_socket_init); | |
1158 | module_exit(yenta_socket_exit); | |
1159 | ||
1160 | MODULE_LICENSE("GPL"); |