[mirror_ubuntu-jammy-kernel.git] / drivers / perf / Kconfig

# SPDX-License-Identifier: GPL-2.0-only
#
# Performance Monitor Drivers
#

menu "Performance monitor support"
	depends on PERF_EVENTS

config ARM_CCI_PMU
	tristate "ARM CCI PMU driver"
	depends on (ARM && CPU_V7) || ARM64
	select ARM_CCI
	help
	  Support for PMU events monitoring on the ARM CCI (Cache Coherent
	  Interconnect) family of products.

	  If compiled as a module, it will be called arm-cci.

config ARM_CCI400_PMU
	bool "support CCI-400"
	default y
	depends on ARM_CCI_PMU
	select ARM_CCI400_COMMON
	help
	  CCI-400 provides 4 independent event counters counting events related
	  to the connected slave/master interfaces, plus a cycle counter.

config ARM_CCI5xx_PMU
	bool "support CCI-500/CCI-550"
	default y
	depends on ARM_CCI_PMU
	help
	  CCI-500/CCI-550 both provide 8 independent event counters, which can
	  count events pertaining to the slave/master interfaces as well as the
	  internal events to the CCI.

config ARM_CCN
	tristate "ARM CCN driver support"
	depends on ARM || ARM64
	help
	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
	  interconnect.

config ARM_CMN
	tristate "Arm CMN-600 PMU support"
	depends on ARM64 || (COMPILE_TEST && 64BIT)
	help
	  Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
	  Network interconnect.

config ARM_PMU
	depends on ARM || ARM64
	bool "ARM PMU framework"
	default y
	help
	  Say y if you want to use CPU performance monitors on ARM-based
	  systems.

config ARM_PMU_ACPI
	depends on ARM_PMU && ACPI
	def_bool y

config ARM_SMMU_V3_PMU
	 tristate "ARM SMMUv3 Performance Monitors Extension"
	 depends on ARM64 && ACPI && ARM_SMMU_V3
	   help
	   Provides support for the ARM SMMUv3 Performance Monitor Counter
	   Groups (PMCG), which provide monitoring of transactions passing
	   through the SMMU and allow the resulting information to be filtered
	   based on the Stream ID of the corresponding master.

config ARM_DSU_PMU
	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
	depends on ARM64
	  help
	  Provides support for performance monitor unit in ARM DynamIQ Shared
	  Unit (DSU). The DSU integrates one or more cores with an L3 memory
	  system, control logic. The PMU allows counting various events related
	  to DSU.

config FSL_IMX8_DDR_PMU
	tristate "Freescale i.MX8 DDR perf monitor"
	depends on ARCH_MXC
	  help
	  Provides support for the DDR performance monitor in i.MX8, which
	  can give information about memory throughput and other related
	  events.

config QCOM_L2_PMU
	bool "Qualcomm Technologies L2-cache PMU"
	depends on ARCH_QCOM && ARM64 && ACPI
	select QCOM_KRYO_L2_ACCESSORS
	  help
	  Provides support for the L2 cache performance monitor unit (PMU)
	  in Qualcomm Technologies processors.
	  Adds the L2 cache PMU into the perf events subsystem for
	  monitoring L2 cache events.

config QCOM_L3_PMU
	bool "Qualcomm Technologies L3-cache PMU"
	depends on ARCH_QCOM && ARM64 && ACPI
	select QCOM_IRQ_COMBINER
	help
	   Provides support for the L3 cache performance monitor unit (PMU)
	   in Qualcomm Technologies processors.
	   Adds the L3 cache PMU into the perf events subsystem for
	   monitoring L3 cache events.

config THUNDERX2_PMU
	tristate "Cavium ThunderX2 SoC PMU UNCORE"
	depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
	default m
	help
	   Provides support for ThunderX2 UNCORE events.
	   The SoC has PMU support in its L3 cache controller (L3C) and
	   in the DDR4 Memory Controller (DMC).

config XGENE_PMU
        depends on ARCH_XGENE
        bool "APM X-Gene SoC PMU"
        default n
        help
          Say y if you want to use APM X-Gene SoC performance monitors.

config ARM_SPE_PMU
	tristate "Enable support for the ARMv8.2 Statistical Profiling Extension"
	depends on ARM64
	help
	  Enable perf support for the ARMv8.2 Statistical Profiling
	  Extension, which provides periodic sampling of operations in
	  the CPU pipeline and reports this via the perf AUX interface.

config ARM_DMC620_PMU
	tristate "Enable PMU support for the ARM DMC-620 memory controller"
	depends on (ARM64 && ACPI) || COMPILE_TEST
	help
	  Support for PMU events monitoring on the ARM DMC-620 memory
	  controller.

source "drivers/perf/hisilicon/Kconfig"

endmenu
Commit	Line	Data
ec8f24b7	1	# SPDX-License-Identifier: GPL-2.0-only
fa8ad788 MR	2	#
	3	# Performance Monitor Drivers
	4	#
	5
	6	menu "Performance monitor support"
bddb9b68	7	depends on PERF_EVENTS
fa8ad788	8
3de6be7a	9	config ARM_CCI_PMU
8b0c93c2 RM	10	tristate "ARM CCI PMU driver"
8b0c93c2 RM	11	depends on (ARM && CPU_V7) \|\| ARM64
3de6be7a	12	select ARM_CCI
8b0c93c2 RM	13	help
	14	Support for PMU events monitoring on the ARM CCI (Cache Coherent
	15	Interconnect) family of products.
	16
	17	If compiled as a module, it will be called arm-cci.
3de6be7a RM	18
3de6be7a RM	19	config ARM_CCI400_PMU
8b0c93c2 RM	20	bool "support CCI-400"
	21	default y
	22	depends on ARM_CCI_PMU
3de6be7a	23	select ARM_CCI400_COMMON
3de6be7a	24	help
8b0c93c2 RM	25	CCI-400 provides 4 independent event counters counting events related
8b0c93c2 RM	26	to the connected slave/master interfaces, plus a cycle counter.
3de6be7a RM	27
3de6be7a RM	28	config ARM_CCI5xx_PMU
8b0c93c2 RM	29	bool "support CCI-500/CCI-550"
	30	default y
	31	depends on ARM_CCI_PMU
3de6be7a	32	help
8b0c93c2 RM	33	CCI-500/CCI-550 both provide 8 independent event counters, which can
	34	count events pertaining to the slave/master interfaces as well as the
	35	internal events to the CCI.
3de6be7a	36
1888d3dd RM	37	config ARM_CCN
	38	tristate "ARM CCN driver support"
	39	depends on ARM \|\| ARM64
	40	help
	41	PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
	42	interconnect.
	43
0ba64770 RM	44	config ARM_CMN
	45	tristate "Arm CMN-600 PMU support"
	46	depends on ARM64 \|\| (COMPILE_TEST && 64BIT)
	47	help
	48	Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
	49	Network interconnect.
	50
fa8ad788	51	config ARM_PMU
bddb9b68	52	depends on ARM \|\| ARM64
fa8ad788 MR	53	bool "ARM PMU framework"
	54	default y
	55	help
	56	Say y if you want to use CPU performance monitors on ARM-based
	57	systems.
	58
45736a72 MR	59	config ARM_PMU_ACPI
	60	depends on ARM_PMU && ACPI
	61	def_bool y
	62
7d839b4b NL	63	config ARM_SMMU_V3_PMU
	64	tristate "ARM SMMUv3 Performance Monitors Extension"
	65	depends on ARM64 && ACPI && ARM_SMMU_V3
	66	help
	67	Provides support for the ARM SMMUv3 Performance Monitor Counter
	68	Groups (PMCG), which provide monitoring of transactions passing
	69	through the SMMU and allow the resulting information to be filtered
	70	based on the Stream ID of the corresponding master.
	71
7520fa99 SP	72	config ARM_DSU_PMU
	73	tristate "ARM DynamIQ Shared Unit (DSU) PMU"
	74	depends on ARM64
	75	help
	76	Provides support for performance monitor unit in ARM DynamIQ Shared
	77	Unit (DSU). The DSU integrates one or more cores with an L3 memory
	78	system, control logic. The PMU allows counting various events related
	79	to DSU.
	80
9a66d36c FL	81	config FSL_IMX8_DDR_PMU
	82	tristate "Freescale i.MX8 DDR perf monitor"
	83	depends on ARCH_MXC
	84	help
	85	Provides support for the DDR performance monitor in i.MX8, which
	86	can give information about memory throughput and other related
	87	events.
	88
21bdbb71 NL	89	config QCOM_L2_PMU
21bdbb71 NL	90	bool "Qualcomm Technologies L2-cache PMU"
bddb9b68	91	depends on ARCH_QCOM && ARM64 && ACPI
6d0efeb1	92	select QCOM_KRYO_L2_ACCESSORS
21bdbb71 NL	93	help
	94	Provides support for the L2 cache performance monitor unit (PMU)
	95	in Qualcomm Technologies processors.
	96	Adds the L2 cache PMU into the perf events subsystem for
	97	monitoring L2 cache events.
	98
3071f13d AVF	99	config QCOM_L3_PMU
3071f13d AVF	100	bool "Qualcomm Technologies L3-cache PMU"
bddb9b68	101	depends on ARCH_QCOM && ARM64 && ACPI
3071f13d AVF	102	select QCOM_IRQ_COMBINER
	103	help
	104	Provides support for the L3 cache performance monitor unit (PMU)
	105	in Qualcomm Technologies processors.
	106	Adds the L3 cache PMU into the perf events subsystem for
	107	monitoring L3 cache events.
	108
69c32972 KG	109	config THUNDERX2_PMU
	110	tristate "Cavium ThunderX2 SoC PMU UNCORE"
	111	depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
	112	default m
	113	help
	114	Provides support for ThunderX2 UNCORE events.
	115	The SoC has PMU support in its L3 cache controller (L3C) and
	116	in the DDR4 Memory Controller (DMC).
	117
832c927d	118	config XGENE_PMU
bddb9b68	119	depends on ARCH_XGENE
832c927d TN	120	bool "APM X-Gene SoC PMU"
	121	default n
	122	help
	123	Say y if you want to use APM X-Gene SoC performance monitors.
	124
d5d9696b WD	125	config ARM_SPE_PMU
d5d9696b WD	126	tristate "Enable support for the ARMv8.2 Statistical Profiling Extension"
b89205bd	127	depends on ARM64
d5d9696b WD	128	help
	129	Enable perf support for the ARMv8.2 Statistical Profiling
	130	Extension, which provides periodic sampling of operations in
	131	the CPU pipeline and reports this via the perf AUX interface.
	132
53c218da TP	133	config ARM_DMC620_PMU
	134	tristate "Enable PMU support for the ARM DMC-620 memory controller"
	135	depends on (ARM64 && ACPI) \|\| COMPILE_TEST
	136	help
	137	Support for PMU events monitoring on the ARM DMC-620 memory
	138	controller.
	139
97807325 ZW	140	source "drivers/perf/hisilicon/Kconfig"
97807325 ZW	141
fa8ad788	142	endmenu