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Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
ba4bdc9e HG |
2 | /* |
3 | * Allwinner sun4i USB phy driver | |
4 | * | |
d2332303 | 5 | * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com> |
ba4bdc9e HG |
6 | * |
7 | * Based on code from | |
8 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> | |
9 | * | |
c233a2ed | 10 | * Modelled after: Samsung S5P/Exynos SoC series MIPI CSIS/DSIM DPHY driver |
ba4bdc9e HG |
11 | * Copyright (C) 2013 Samsung Electronics Co., Ltd. |
12 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
ba4bdc9e HG |
13 | */ |
14 | ||
15 | #include <linux/clk.h> | |
1aedf3a7 | 16 | #include <linux/delay.h> |
2d84aff9 | 17 | #include <linux/err.h> |
176aa360 | 18 | #include <linux/extcon-provider.h> |
8b34a289 | 19 | #include <linux/gpio/consumer.h> |
ba4bdc9e | 20 | #include <linux/io.h> |
d2332303 | 21 | #include <linux/interrupt.h> |
ba4bdc9e HG |
22 | #include <linux/kernel.h> |
23 | #include <linux/module.h> | |
24 | #include <linux/mutex.h> | |
25 | #include <linux/of.h> | |
26 | #include <linux/of_address.h> | |
68dbc2ce | 27 | #include <linux/of_device.h> |
d2332303 | 28 | #include <linux/of_gpio.h> |
ba4bdc9e | 29 | #include <linux/phy/phy.h> |
24fe86a6 | 30 | #include <linux/phy/phy-sun4i-usb.h> |
ba4bdc9e | 31 | #include <linux/platform_device.h> |
8665c18b | 32 | #include <linux/power_supply.h> |
ba4bdc9e HG |
33 | #include <linux/regulator/consumer.h> |
34 | #include <linux/reset.h> | |
919ab252 | 35 | #include <linux/spinlock.h> |
b33ecca8 | 36 | #include <linux/usb/of.h> |
d2332303 | 37 | #include <linux/workqueue.h> |
ba4bdc9e HG |
38 | |
39 | #define REG_ISCR 0x00 | |
fc1f45ed | 40 | #define REG_PHYCTL_A10 0x04 |
ba4bdc9e HG |
41 | #define REG_PHYBIST 0x08 |
42 | #define REG_PHYTUNE 0x0c | |
fc1f45ed | 43 | #define REG_PHYCTL_A33 0x10 |
3ecc25e1 | 44 | #define REG_PHY_OTGCTL 0x20 |
626a630e | 45 | |
b3e0d141 | 46 | #define REG_PMU_UNK1 0x10 |
ba4bdc9e HG |
47 | |
48 | #define PHYCTL_DATA BIT(7) | |
49 | ||
3ecc25e1 IZ |
50 | #define OTGCTL_ROUTE_MUSB BIT(0) |
51 | ||
ba4bdc9e HG |
52 | #define SUNXI_AHB_ICHR8_EN BIT(10) |
53 | #define SUNXI_AHB_INCR4_BURST_EN BIT(9) | |
54 | #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8) | |
55 | #define SUNXI_ULPI_BYPASS_EN BIT(0) | |
56 | ||
d2332303 HG |
57 | /* ISCR, Interface Status and Control bits */ |
58 | #define ISCR_ID_PULLUP_EN (1 << 17) | |
59 | #define ISCR_DPDM_PULLUP_EN (1 << 16) | |
60 | /* sunxi has the phy id/vbus pins not connected, so we use the force bits */ | |
61 | #define ISCR_FORCE_ID_MASK (3 << 14) | |
62 | #define ISCR_FORCE_ID_LOW (2 << 14) | |
63 | #define ISCR_FORCE_ID_HIGH (3 << 14) | |
64 | #define ISCR_FORCE_VBUS_MASK (3 << 12) | |
65 | #define ISCR_FORCE_VBUS_LOW (2 << 12) | |
66 | #define ISCR_FORCE_VBUS_HIGH (3 << 12) | |
67 | ||
ba4bdc9e HG |
68 | /* Common Control Bits for Both PHYs */ |
69 | #define PHY_PLL_BW 0x03 | |
70 | #define PHY_RES45_CAL_EN 0x0c | |
71 | ||
72 | /* Private Control Bits for Each PHY */ | |
73 | #define PHY_TX_AMPLITUDE_TUNE 0x20 | |
74 | #define PHY_TX_SLEWRATE_TUNE 0x22 | |
75 | #define PHY_VBUSVALID_TH_SEL 0x25 | |
76 | #define PHY_PULLUP_RES_SEL 0x27 | |
77 | #define PHY_OTG_FUNC_EN 0x28 | |
78 | #define PHY_VBUS_DET_EN 0x29 | |
79 | #define PHY_DISCON_TH_SEL 0x2a | |
24fe86a6 | 80 | #define PHY_SQUELCH_DETECT 0x3c |
ba4bdc9e | 81 | |
4b63743c CYT |
82 | /* A83T specific control bits for PHY0 */ |
83 | #define PHY_CTL_VBUSVLDEXT BIT(5) | |
84 | #define PHY_CTL_SIDDQ BIT(3) | |
85 | ||
86 | /* A83T specific control bits for PHY2 HSIC */ | |
87 | #define SUNXI_EHCI_HS_FORCE BIT(20) | |
88 | #define SUNXI_HSIC_CONNECT_DET BIT(17) | |
89 | #define SUNXI_HSIC_CONNECT_INT BIT(16) | |
90 | #define SUNXI_HSIC BIT(1) | |
91 | ||
626a630e | 92 | #define MAX_PHYS 4 |
ba4bdc9e | 93 | |
d2332303 HG |
94 | /* |
95 | * Note do not raise the debounce time, we must report Vusb high within 100ms | |
96 | * otherwise we get Vbus errors | |
97 | */ | |
98 | #define DEBOUNCE_TIME msecs_to_jiffies(50) | |
99 | #define POLL_TIME msecs_to_jiffies(250) | |
100 | ||
68dbc2ce HG |
101 | enum sun4i_usb_phy_type { |
102 | sun4i_a10_phy, | |
91d96f06 | 103 | sun6i_a31_phy, |
68dbc2ce | 104 | sun8i_a33_phy, |
4b63743c | 105 | sun8i_a83t_phy, |
626a630e | 106 | sun8i_h3_phy, |
f3d96f8d | 107 | sun8i_r40_phy, |
16c40361 | 108 | sun8i_v3s_phy, |
b3e0d141 | 109 | sun50i_a64_phy, |
ae409cc7 | 110 | sun50i_h6_phy, |
68dbc2ce HG |
111 | }; |
112 | ||
113 | struct sun4i_usb_phy_cfg { | |
114 | int num_phys; | |
f0152c58 | 115 | int hsic_index; |
68dbc2ce HG |
116 | enum sun4i_usb_phy_type type; |
117 | u32 disc_thresh; | |
118 | u8 phyctl_offset; | |
119 | bool dedicated_clocks; | |
b3e0d141 | 120 | bool enable_pmu_unk1; |
3ecc25e1 | 121 | bool phy0_dual_route; |
2659392e | 122 | int missing_phys; |
68dbc2ce HG |
123 | }; |
124 | ||
ba4bdc9e | 125 | struct sun4i_usb_phy_data { |
ba4bdc9e | 126 | void __iomem *base; |
68dbc2ce | 127 | const struct sun4i_usb_phy_cfg *cfg; |
b33ecca8 | 128 | enum usb_dr_mode dr_mode; |
919ab252 | 129 | spinlock_t reg_lock; /* guard access to phyctl reg */ |
ba4bdc9e HG |
130 | struct sun4i_usb_phy { |
131 | struct phy *phy; | |
132 | void __iomem *pmu; | |
133 | struct regulator *vbus; | |
134 | struct reset_control *reset; | |
eadd4312 | 135 | struct clk *clk; |
f0152c58 | 136 | struct clk *clk2; |
d2332303 | 137 | bool regulator_on; |
ba4bdc9e HG |
138 | int index; |
139 | } phys[MAX_PHYS]; | |
d2332303 | 140 | /* phy0 / otg related variables */ |
1a52abe6 | 141 | struct extcon_dev *extcon; |
d2332303 | 142 | bool phy0_init; |
d2332303 HG |
143 | struct gpio_desc *id_det_gpio; |
144 | struct gpio_desc *vbus_det_gpio; | |
8665c18b HG |
145 | struct power_supply *vbus_power_supply; |
146 | struct notifier_block vbus_power_nb; | |
147 | bool vbus_power_nb_registered; | |
36f9159b | 148 | bool force_session_end; |
d2332303 HG |
149 | int id_det_irq; |
150 | int vbus_det_irq; | |
151 | int id_det; | |
152 | int vbus_det; | |
153 | struct delayed_work detect; | |
ba4bdc9e HG |
154 | }; |
155 | ||
156 | #define to_sun4i_usb_phy_data(phy) \ | |
157 | container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index]) | |
158 | ||
d2332303 HG |
159 | static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set) |
160 | { | |
161 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
162 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); | |
163 | u32 iscr; | |
164 | ||
165 | iscr = readl(data->base + REG_ISCR); | |
166 | iscr &= ~clr; | |
167 | iscr |= set; | |
168 | writel(iscr, data->base + REG_ISCR); | |
169 | } | |
170 | ||
171 | static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val) | |
172 | { | |
173 | if (val) | |
174 | val = ISCR_FORCE_ID_HIGH; | |
175 | else | |
176 | val = ISCR_FORCE_ID_LOW; | |
177 | ||
178 | sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val); | |
179 | } | |
180 | ||
181 | static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val) | |
182 | { | |
183 | if (val) | |
184 | val = ISCR_FORCE_VBUS_HIGH; | |
185 | else | |
186 | val = ISCR_FORCE_VBUS_LOW; | |
187 | ||
188 | sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val); | |
189 | } | |
190 | ||
ba4bdc9e HG |
191 | static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data, |
192 | int len) | |
193 | { | |
194 | struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy); | |
195 | u32 temp, usbc_bit = BIT(phy->index * 2); | |
d99cb378 | 196 | void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; |
919ab252 | 197 | unsigned long flags; |
ba4bdc9e HG |
198 | int i; |
199 | ||
919ab252 | 200 | spin_lock_irqsave(&phy_data->reg_lock, flags); |
ba4bdc9e | 201 | |
d699c1d0 IZ |
202 | if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) { |
203 | /* SoCs newer than A33 need us to set phyctl to 0 explicitly */ | |
fc1f45ed | 204 | writel(0, phyctl); |
fc1f45ed HG |
205 | } |
206 | ||
ba4bdc9e | 207 | for (i = 0; i < len; i++) { |
fc1f45ed | 208 | temp = readl(phyctl); |
ba4bdc9e HG |
209 | |
210 | /* clear the address portion */ | |
211 | temp &= ~(0xff << 8); | |
212 | ||
213 | /* set the address */ | |
214 | temp |= ((addr + i) << 8); | |
fc1f45ed | 215 | writel(temp, phyctl); |
ba4bdc9e HG |
216 | |
217 | /* set the data bit and clear usbc bit*/ | |
fc1f45ed | 218 | temp = readb(phyctl); |
ba4bdc9e HG |
219 | if (data & 0x1) |
220 | temp |= PHYCTL_DATA; | |
221 | else | |
222 | temp &= ~PHYCTL_DATA; | |
223 | temp &= ~usbc_bit; | |
fc1f45ed | 224 | writeb(temp, phyctl); |
ba4bdc9e HG |
225 | |
226 | /* pulse usbc_bit */ | |
fc1f45ed | 227 | temp = readb(phyctl); |
ba4bdc9e | 228 | temp |= usbc_bit; |
fc1f45ed | 229 | writeb(temp, phyctl); |
ba4bdc9e | 230 | |
fc1f45ed | 231 | temp = readb(phyctl); |
ba4bdc9e | 232 | temp &= ~usbc_bit; |
fc1f45ed | 233 | writeb(temp, phyctl); |
ba4bdc9e HG |
234 | |
235 | data >>= 1; | |
236 | } | |
919ab252 CYT |
237 | |
238 | spin_unlock_irqrestore(&phy_data->reg_lock, flags); | |
ba4bdc9e HG |
239 | } |
240 | ||
241 | static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable) | |
242 | { | |
4b63743c | 243 | struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy); |
ba4bdc9e HG |
244 | u32 bits, reg_value; |
245 | ||
246 | if (!phy->pmu) | |
247 | return; | |
248 | ||
249 | bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN | | |
250 | SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN; | |
251 | ||
4b63743c CYT |
252 | /* A83T USB2 is HSIC */ |
253 | if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2) | |
254 | bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT | | |
255 | SUNXI_HSIC; | |
256 | ||
ba4bdc9e HG |
257 | reg_value = readl(phy->pmu); |
258 | ||
259 | if (enable) | |
260 | reg_value |= bits; | |
261 | else | |
262 | reg_value &= ~bits; | |
263 | ||
264 | writel(reg_value, phy->pmu); | |
265 | } | |
266 | ||
267 | static int sun4i_usb_phy_init(struct phy *_phy) | |
268 | { | |
269 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
270 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); | |
271 | int ret; | |
626a630e | 272 | u32 val; |
ba4bdc9e | 273 | |
eadd4312 | 274 | ret = clk_prepare_enable(phy->clk); |
ba4bdc9e HG |
275 | if (ret) |
276 | return ret; | |
277 | ||
f0152c58 CYT |
278 | ret = clk_prepare_enable(phy->clk2); |
279 | if (ret) { | |
280 | clk_disable_unprepare(phy->clk); | |
281 | return ret; | |
282 | } | |
283 | ||
ba4bdc9e HG |
284 | ret = reset_control_deassert(phy->reset); |
285 | if (ret) { | |
f0152c58 | 286 | clk_disable_unprepare(phy->clk2); |
eadd4312 | 287 | clk_disable_unprepare(phy->clk); |
ba4bdc9e HG |
288 | return ret; |
289 | } | |
290 | ||
ae409cc7 IZ |
291 | if (data->cfg->type == sun8i_a83t_phy || |
292 | data->cfg->type == sun50i_h6_phy) { | |
4b63743c CYT |
293 | if (phy->index == 0) { |
294 | val = readl(data->base + data->cfg->phyctl_offset); | |
295 | val |= PHY_CTL_VBUSVLDEXT; | |
296 | val &= ~PHY_CTL_SIDDQ; | |
297 | writel(val, data->base + data->cfg->phyctl_offset); | |
298 | } | |
299 | } else { | |
300 | if (phy->pmu && data->cfg->enable_pmu_unk1) { | |
301 | val = readl(phy->pmu + REG_PMU_UNK1); | |
302 | writel(val & ~2, phy->pmu + REG_PMU_UNK1); | |
303 | } | |
b3e0d141 | 304 | |
4b63743c CYT |
305 | /* Enable USB 45 Ohm resistor calibration */ |
306 | if (phy->index == 0) | |
307 | sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1); | |
6827a46f | 308 | |
4b63743c CYT |
309 | /* Adjust PHY's magnitude and rate */ |
310 | sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5); | |
ba4bdc9e | 311 | |
4b63743c CYT |
312 | /* Disconnect threshold adjustment */ |
313 | sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, | |
314 | data->cfg->disc_thresh, 2); | |
315 | } | |
ba4bdc9e HG |
316 | |
317 | sun4i_usb_phy_passby(phy, 1); | |
318 | ||
d2332303 HG |
319 | if (phy->index == 0) { |
320 | data->phy0_init = true; | |
321 | ||
322 | /* Enable pull-ups */ | |
323 | sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN); | |
324 | sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN); | |
325 | ||
b33ecca8 HG |
326 | /* Force ISCR and cable state updates */ |
327 | data->id_det = -1; | |
328 | data->vbus_det = -1; | |
329 | queue_delayed_work(system_wq, &data->detect, 0); | |
d2332303 HG |
330 | } |
331 | ||
ba4bdc9e HG |
332 | return 0; |
333 | } | |
334 | ||
335 | static int sun4i_usb_phy_exit(struct phy *_phy) | |
336 | { | |
337 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
d2332303 HG |
338 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); |
339 | ||
340 | if (phy->index == 0) { | |
ae409cc7 IZ |
341 | if (data->cfg->type == sun8i_a83t_phy || |
342 | data->cfg->type == sun50i_h6_phy) { | |
4b63743c CYT |
343 | void __iomem *phyctl = data->base + |
344 | data->cfg->phyctl_offset; | |
345 | ||
346 | writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl); | |
347 | } | |
348 | ||
d2332303 HG |
349 | /* Disable pull-ups */ |
350 | sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0); | |
351 | sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0); | |
352 | data->phy0_init = false; | |
353 | } | |
ba4bdc9e HG |
354 | |
355 | sun4i_usb_phy_passby(phy, 0); | |
356 | reset_control_assert(phy->reset); | |
f0152c58 | 357 | clk_disable_unprepare(phy->clk2); |
eadd4312 | 358 | clk_disable_unprepare(phy->clk); |
ba4bdc9e HG |
359 | |
360 | return 0; | |
361 | } | |
362 | ||
b33ecca8 HG |
363 | static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data) |
364 | { | |
365 | switch (data->dr_mode) { | |
366 | case USB_DR_MODE_OTG: | |
5f90d31c HG |
367 | if (data->id_det_gpio) |
368 | return gpiod_get_value_cansleep(data->id_det_gpio); | |
369 | else | |
370 | return 1; /* Fallback to peripheral mode */ | |
b33ecca8 HG |
371 | case USB_DR_MODE_HOST: |
372 | return 0; | |
373 | case USB_DR_MODE_PERIPHERAL: | |
374 | default: | |
375 | return 1; | |
376 | } | |
377 | } | |
378 | ||
3d772c4a HG |
379 | static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data) |
380 | { | |
381 | if (data->vbus_det_gpio) | |
382 | return gpiod_get_value_cansleep(data->vbus_det_gpio); | |
383 | ||
384 | if (data->vbus_power_supply) { | |
385 | union power_supply_propval val; | |
386 | int r; | |
387 | ||
388 | r = power_supply_get_property(data->vbus_power_supply, | |
389 | POWER_SUPPLY_PROP_PRESENT, &val); | |
390 | if (r == 0) | |
391 | return val.intval; | |
392 | } | |
393 | ||
394 | /* Fallback: report vbus as high */ | |
395 | return 1; | |
396 | } | |
397 | ||
398 | static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data) | |
399 | { | |
400 | return data->vbus_det_gpio || data->vbus_power_supply; | |
401 | } | |
402 | ||
91d96f06 HG |
403 | static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data) |
404 | { | |
405 | if ((data->id_det_gpio && data->id_det_irq <= 0) || | |
406 | (data->vbus_det_gpio && data->vbus_det_irq <= 0)) | |
407 | return true; | |
408 | ||
409 | /* | |
d7119224 CYT |
410 | * The A31/A23/A33 companion pmics (AXP221/AXP223) do not |
411 | * generate vbus change interrupts when the board is driving | |
412 | * vbus using the N_VBUSEN pin on the pmic, so we must poll | |
91d96f06 HG |
413 | * when using the pmic for vbus-det _and_ we're driving vbus. |
414 | */ | |
d7119224 CYT |
415 | if ((data->cfg->type == sun6i_a31_phy || |
416 | data->cfg->type == sun8i_a33_phy) && | |
91d96f06 HG |
417 | data->vbus_power_supply && data->phys[0].regulator_on) |
418 | return true; | |
419 | ||
420 | return false; | |
421 | } | |
422 | ||
ba4bdc9e HG |
423 | static int sun4i_usb_phy_power_on(struct phy *_phy) |
424 | { | |
425 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
d2332303 HG |
426 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); |
427 | int ret; | |
428 | ||
429 | if (!phy->vbus || phy->regulator_on) | |
430 | return 0; | |
431 | ||
432 | /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ | |
8083526e | 433 | if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) && |
91d6e3b6 HG |
434 | data->vbus_det) { |
435 | dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n"); | |
d2332303 | 436 | return 0; |
91d6e3b6 | 437 | } |
ba4bdc9e | 438 | |
d2332303 HG |
439 | ret = regulator_enable(phy->vbus); |
440 | if (ret) | |
441 | return ret; | |
ba4bdc9e | 442 | |
d2332303 | 443 | phy->regulator_on = true; |
ba4bdc9e | 444 | |
d2332303 | 445 | /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */ |
91d96f06 | 446 | if (phy->index == 0 && sun4i_usb_phy0_poll(data)) |
d2332303 | 447 | mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); |
ba4bdc9e | 448 | |
d2332303 | 449 | return 0; |
ba4bdc9e HG |
450 | } |
451 | ||
452 | static int sun4i_usb_phy_power_off(struct phy *_phy) | |
453 | { | |
454 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
d2332303 HG |
455 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); |
456 | ||
457 | if (!phy->vbus || !phy->regulator_on) | |
458 | return 0; | |
ba4bdc9e | 459 | |
d2332303 HG |
460 | regulator_disable(phy->vbus); |
461 | phy->regulator_on = false; | |
ba4bdc9e | 462 | |
d2332303 HG |
463 | /* |
464 | * phy0 vbus typically slowly discharges, sometimes this causes the | |
465 | * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan. | |
466 | */ | |
91d96f06 | 467 | if (phy->index == 0 && !sun4i_usb_phy0_poll(data)) |
d2332303 | 468 | mod_delayed_work(system_wq, &data->detect, POLL_TIME); |
ba4bdc9e HG |
469 | |
470 | return 0; | |
471 | } | |
472 | ||
79a5a18a GS |
473 | static int sun4i_usb_phy_set_mode(struct phy *_phy, |
474 | enum phy_mode mode, int submode) | |
6ba43c29 HG |
475 | { |
476 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
477 | struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy); | |
5d04c883 | 478 | int new_mode; |
6ba43c29 | 479 | |
1396929e CYT |
480 | if (phy->index != 0) { |
481 | if (mode == PHY_MODE_USB_HOST) | |
482 | return 0; | |
6ba43c29 | 483 | return -EINVAL; |
1396929e | 484 | } |
6ba43c29 HG |
485 | |
486 | switch (mode) { | |
487 | case PHY_MODE_USB_HOST: | |
5d04c883 | 488 | new_mode = USB_DR_MODE_HOST; |
6ba43c29 HG |
489 | break; |
490 | case PHY_MODE_USB_DEVICE: | |
5d04c883 | 491 | new_mode = USB_DR_MODE_PERIPHERAL; |
6ba43c29 HG |
492 | break; |
493 | case PHY_MODE_USB_OTG: | |
5d04c883 | 494 | new_mode = USB_DR_MODE_OTG; |
6ba43c29 HG |
495 | break; |
496 | default: | |
497 | return -EINVAL; | |
498 | } | |
499 | ||
5d04c883 HG |
500 | if (new_mode != data->dr_mode) { |
501 | dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode); | |
502 | data->dr_mode = new_mode; | |
503 | } | |
504 | ||
505 | data->id_det = -1; /* Force reprocessing of id */ | |
6ba43c29 HG |
506 | data->force_session_end = true; |
507 | queue_delayed_work(system_wq, &data->detect, 0); | |
508 | ||
509 | return 0; | |
510 | } | |
511 | ||
24fe86a6 HG |
512 | void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled) |
513 | { | |
514 | struct sun4i_usb_phy *phy = phy_get_drvdata(_phy); | |
515 | ||
516 | sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2); | |
517 | } | |
7167bf8b | 518 | EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect); |
24fe86a6 | 519 | |
4a9e5ca1 | 520 | static const struct phy_ops sun4i_usb_phy_ops = { |
ba4bdc9e HG |
521 | .init = sun4i_usb_phy_init, |
522 | .exit = sun4i_usb_phy_exit, | |
523 | .power_on = sun4i_usb_phy_power_on, | |
524 | .power_off = sun4i_usb_phy_power_off, | |
6ba43c29 | 525 | .set_mode = sun4i_usb_phy_set_mode, |
ba4bdc9e HG |
526 | .owner = THIS_MODULE, |
527 | }; | |
528 | ||
3ecc25e1 IZ |
529 | static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det) |
530 | { | |
531 | u32 regval; | |
532 | ||
533 | regval = readl(data->base + REG_PHY_OTGCTL); | |
534 | if (id_det == 0) { | |
535 | /* Host mode. Route phy0 to EHCI/OHCI */ | |
536 | regval &= ~OTGCTL_ROUTE_MUSB; | |
537 | } else { | |
538 | /* Peripheral mode. Route phy0 to MUSB */ | |
539 | regval |= OTGCTL_ROUTE_MUSB; | |
540 | } | |
541 | writel(regval, data->base + REG_PHY_OTGCTL); | |
542 | } | |
543 | ||
d2332303 HG |
544 | static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work) |
545 | { | |
546 | struct sun4i_usb_phy_data *data = | |
547 | container_of(work, struct sun4i_usb_phy_data, detect.work); | |
548 | struct phy *phy0 = data->phys[0].phy; | |
38b1927e | 549 | struct sun4i_usb_phy *phy; |
36f9159b | 550 | bool force_session_end, id_notify = false, vbus_notify = false; |
9745ceeb | 551 | int id_det, vbus_det; |
d2332303 | 552 | |
38b1927e | 553 | if (!phy0) |
b33ecca8 HG |
554 | return; |
555 | ||
38b1927e | 556 | phy = phy_get_drvdata(phy0); |
b33ecca8 | 557 | id_det = sun4i_usb_phy0_get_id_det(data); |
8665c18b | 558 | vbus_det = sun4i_usb_phy0_get_vbus_det(data); |
d2332303 HG |
559 | |
560 | mutex_lock(&phy0->mutex); | |
561 | ||
562 | if (!data->phy0_init) { | |
563 | mutex_unlock(&phy0->mutex); | |
564 | return; | |
565 | } | |
566 | ||
36f9159b HG |
567 | force_session_end = data->force_session_end; |
568 | data->force_session_end = false; | |
569 | ||
d2332303 | 570 | if (id_det != data->id_det) { |
36f9159b | 571 | /* id-change, force session end if we've no vbus detection */ |
b33ecca8 | 572 | if (data->dr_mode == USB_DR_MODE_OTG && |
36f9159b HG |
573 | !sun4i_usb_phy0_have_vbus_det(data)) |
574 | force_session_end = true; | |
575 | ||
576 | /* When entering host mode (id = 0) force end the session now */ | |
577 | if (force_session_end && id_det == 0) { | |
1aedf3a7 HG |
578 | sun4i_usb_phy0_set_vbus_detect(phy0, 0); |
579 | msleep(200); | |
580 | sun4i_usb_phy0_set_vbus_detect(phy0, 1); | |
581 | } | |
d2332303 HG |
582 | sun4i_usb_phy0_set_id_detect(phy0, id_det); |
583 | data->id_det = id_det; | |
9745ceeb | 584 | id_notify = true; |
d2332303 HG |
585 | } |
586 | ||
587 | if (vbus_det != data->vbus_det) { | |
588 | sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det); | |
589 | data->vbus_det = vbus_det; | |
9745ceeb | 590 | vbus_notify = true; |
d2332303 HG |
591 | } |
592 | ||
593 | mutex_unlock(&phy0->mutex); | |
594 | ||
1aedf3a7 | 595 | if (id_notify) { |
66adb889 | 596 | extcon_set_state_sync(data->extcon, EXTCON_USB_HOST, |
1a52abe6 | 597 | !id_det); |
36f9159b HG |
598 | /* When leaving host mode force end the session here */ |
599 | if (force_session_end && id_det == 1) { | |
1aedf3a7 HG |
600 | mutex_lock(&phy0->mutex); |
601 | sun4i_usb_phy0_set_vbus_detect(phy0, 0); | |
602 | msleep(1000); | |
603 | sun4i_usb_phy0_set_vbus_detect(phy0, 1); | |
604 | mutex_unlock(&phy0->mutex); | |
605 | } | |
3ecc25e1 | 606 | |
e6f32efb PK |
607 | /* Enable PHY0 passby for host mode only. */ |
608 | sun4i_usb_phy_passby(phy, !id_det); | |
609 | ||
3ecc25e1 IZ |
610 | /* Re-route PHY0 if necessary */ |
611 | if (data->cfg->phy0_dual_route) | |
612 | sun4i_usb_phy0_reroute(data, id_det); | |
1aedf3a7 | 613 | } |
1a52abe6 HG |
614 | |
615 | if (vbus_notify) | |
66adb889 | 616 | extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det); |
1a52abe6 | 617 | |
91d96f06 | 618 | if (sun4i_usb_phy0_poll(data)) |
d2332303 HG |
619 | queue_delayed_work(system_wq, &data->detect, POLL_TIME); |
620 | } | |
621 | ||
622 | static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id) | |
623 | { | |
624 | struct sun4i_usb_phy_data *data = dev_id; | |
625 | ||
626 | /* vbus or id changed, let the pins settle and then scan them */ | |
627 | mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); | |
628 | ||
629 | return IRQ_HANDLED; | |
630 | } | |
631 | ||
8665c18b HG |
632 | static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb, |
633 | unsigned long val, void *v) | |
634 | { | |
635 | struct sun4i_usb_phy_data *data = | |
636 | container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb); | |
637 | struct power_supply *psy = v; | |
638 | ||
639 | /* Properties on the vbus_power_supply changed, scan vbus_det */ | |
640 | if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply) | |
641 | mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME); | |
642 | ||
643 | return NOTIFY_OK; | |
644 | } | |
645 | ||
ba4bdc9e HG |
646 | static struct phy *sun4i_usb_phy_xlate(struct device *dev, |
647 | struct of_phandle_args *args) | |
648 | { | |
649 | struct sun4i_usb_phy_data *data = dev_get_drvdata(dev); | |
650 | ||
5f90d31c | 651 | if (args->args[0] >= data->cfg->num_phys) |
ba4bdc9e HG |
652 | return ERR_PTR(-ENODEV); |
653 | ||
2659392e IZ |
654 | if (data->cfg->missing_phys & BIT(args->args[0])) |
655 | return ERR_PTR(-ENODEV); | |
656 | ||
ba4bdc9e HG |
657 | return data->phys[args->args[0]].phy; |
658 | } | |
659 | ||
d2332303 HG |
660 | static int sun4i_usb_phy_remove(struct platform_device *pdev) |
661 | { | |
662 | struct device *dev = &pdev->dev; | |
663 | struct sun4i_usb_phy_data *data = dev_get_drvdata(dev); | |
664 | ||
8665c18b HG |
665 | if (data->vbus_power_nb_registered) |
666 | power_supply_unreg_notifier(&data->vbus_power_nb); | |
04e59a02 | 667 | if (data->id_det_irq > 0) |
d2332303 | 668 | devm_free_irq(dev, data->id_det_irq, data); |
04e59a02 | 669 | if (data->vbus_det_irq > 0) |
d2332303 HG |
670 | devm_free_irq(dev, data->vbus_det_irq, data); |
671 | ||
672 | cancel_delayed_work_sync(&data->detect); | |
673 | ||
674 | return 0; | |
675 | } | |
676 | ||
1a52abe6 HG |
677 | static const unsigned int sun4i_usb_phy0_cable[] = { |
678 | EXTCON_USB, | |
679 | EXTCON_USB_HOST, | |
680 | EXTCON_NONE, | |
681 | }; | |
682 | ||
ba4bdc9e HG |
683 | static int sun4i_usb_phy_probe(struct platform_device *pdev) |
684 | { | |
685 | struct sun4i_usb_phy_data *data; | |
686 | struct device *dev = &pdev->dev; | |
687 | struct device_node *np = dev->of_node; | |
ba4bdc9e | 688 | struct phy_provider *phy_provider; |
ba4bdc9e | 689 | struct resource *res; |
d2332303 | 690 | int i, ret; |
ba4bdc9e HG |
691 | |
692 | data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); | |
693 | if (!data) | |
694 | return -ENOMEM; | |
695 | ||
919ab252 | 696 | spin_lock_init(&data->reg_lock); |
d2332303 HG |
697 | INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan); |
698 | dev_set_drvdata(dev, data); | |
68dbc2ce HG |
699 | data->cfg = of_device_get_match_data(dev); |
700 | if (!data->cfg) | |
701 | return -EINVAL; | |
fc1f45ed | 702 | |
ba4bdc9e HG |
703 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl"); |
704 | data->base = devm_ioremap_resource(dev, res); | |
705 | if (IS_ERR(data->base)) | |
706 | return PTR_ERR(data->base); | |
707 | ||
b2dfc34c AL |
708 | data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det", |
709 | GPIOD_IN); | |
e7cded27 QS |
710 | if (IS_ERR(data->id_det_gpio)) { |
711 | dev_err(dev, "Couldn't request ID GPIO\n"); | |
b2dfc34c | 712 | return PTR_ERR(data->id_det_gpio); |
e7cded27 | 713 | } |
b2dfc34c AL |
714 | |
715 | data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det", | |
716 | GPIOD_IN); | |
e7cded27 QS |
717 | if (IS_ERR(data->vbus_det_gpio)) { |
718 | dev_err(dev, "Couldn't request VBUS detect GPIO\n"); | |
b2dfc34c | 719 | return PTR_ERR(data->vbus_det_gpio); |
e7cded27 | 720 | } |
d2332303 | 721 | |
8665c18b HG |
722 | if (of_find_property(np, "usb0_vbus_power-supply", NULL)) { |
723 | data->vbus_power_supply = devm_power_supply_get_by_phandle(dev, | |
724 | "usb0_vbus_power-supply"); | |
e7cded27 QS |
725 | if (IS_ERR(data->vbus_power_supply)) { |
726 | dev_err(dev, "Couldn't get the VBUS power supply\n"); | |
8665c18b | 727 | return PTR_ERR(data->vbus_power_supply); |
e7cded27 | 728 | } |
8665c18b HG |
729 | |
730 | if (!data->vbus_power_supply) | |
731 | return -EPROBE_DEFER; | |
732 | } | |
733 | ||
b33ecca8 | 734 | data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0); |
5f90d31c HG |
735 | |
736 | data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable); | |
e7cded27 QS |
737 | if (IS_ERR(data->extcon)) { |
738 | dev_err(dev, "Couldn't allocate our extcon device\n"); | |
5f90d31c | 739 | return PTR_ERR(data->extcon); |
e7cded27 | 740 | } |
5f90d31c HG |
741 | |
742 | ret = devm_extcon_dev_register(dev, data->extcon); | |
743 | if (ret) { | |
744 | dev_err(dev, "failed to register extcon: %d\n", ret); | |
745 | return ret; | |
1a52abe6 HG |
746 | } |
747 | ||
5f90d31c | 748 | for (i = 0; i < data->cfg->num_phys; i++) { |
2a7f9982 MR |
749 | struct sun4i_usb_phy *phy = data->phys + i; |
750 | char name[16]; | |
751 | ||
2659392e IZ |
752 | if (data->cfg->missing_phys & BIT(i)) |
753 | continue; | |
754 | ||
ba4bdc9e | 755 | snprintf(name, sizeof(name), "usb%d_vbus", i); |
2a7f9982 MR |
756 | phy->vbus = devm_regulator_get_optional(dev, name); |
757 | if (IS_ERR(phy->vbus)) { | |
e7cded27 QS |
758 | if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) { |
759 | dev_err(dev, | |
760 | "Couldn't get regulator %s... Deferring probe\n", | |
761 | name); | |
ba4bdc9e | 762 | return -EPROBE_DEFER; |
e7cded27 QS |
763 | } |
764 | ||
2a7f9982 | 765 | phy->vbus = NULL; |
ba4bdc9e HG |
766 | } |
767 | ||
68dbc2ce | 768 | if (data->cfg->dedicated_clocks) |
eadd4312 MR |
769 | snprintf(name, sizeof(name), "usb%d_phy", i); |
770 | else | |
771 | strlcpy(name, "usb_phy", sizeof(name)); | |
772 | ||
773 | phy->clk = devm_clk_get(dev, name); | |
774 | if (IS_ERR(phy->clk)) { | |
775 | dev_err(dev, "failed to get clock %s\n", name); | |
776 | return PTR_ERR(phy->clk); | |
777 | } | |
778 | ||
f0152c58 CYT |
779 | /* The first PHY is always tied to OTG, and never HSIC */ |
780 | if (data->cfg->hsic_index && i == data->cfg->hsic_index) { | |
781 | /* HSIC needs secondary clock */ | |
782 | snprintf(name, sizeof(name), "usb%d_hsic_12M", i); | |
783 | phy->clk2 = devm_clk_get(dev, name); | |
784 | if (IS_ERR(phy->clk2)) { | |
785 | dev_err(dev, "failed to get clock %s\n", name); | |
786 | return PTR_ERR(phy->clk2); | |
787 | } | |
788 | } | |
789 | ||
ba4bdc9e | 790 | snprintf(name, sizeof(name), "usb%d_reset", i); |
2a7f9982 MR |
791 | phy->reset = devm_reset_control_get(dev, name); |
792 | if (IS_ERR(phy->reset)) { | |
ba4bdc9e | 793 | dev_err(dev, "failed to get reset %s\n", name); |
2a7f9982 | 794 | return PTR_ERR(phy->reset); |
ba4bdc9e HG |
795 | } |
796 | ||
3ecc25e1 | 797 | if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */ |
ba4bdc9e HG |
798 | snprintf(name, sizeof(name), "pmu%d", i); |
799 | res = platform_get_resource_byname(pdev, | |
800 | IORESOURCE_MEM, name); | |
2a7f9982 MR |
801 | phy->pmu = devm_ioremap_resource(dev, res); |
802 | if (IS_ERR(phy->pmu)) | |
803 | return PTR_ERR(phy->pmu); | |
ba4bdc9e HG |
804 | } |
805 | ||
dbc98635 | 806 | phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops); |
2a7f9982 | 807 | if (IS_ERR(phy->phy)) { |
ba4bdc9e | 808 | dev_err(dev, "failed to create PHY %d\n", i); |
2a7f9982 | 809 | return PTR_ERR(phy->phy); |
ba4bdc9e HG |
810 | } |
811 | ||
2a7f9982 MR |
812 | phy->index = i; |
813 | phy_set_drvdata(phy->phy, &data->phys[i]); | |
ba4bdc9e HG |
814 | } |
815 | ||
d2332303 | 816 | data->id_det_irq = gpiod_to_irq(data->id_det_gpio); |
5cf700ac | 817 | if (data->id_det_irq > 0) { |
d2332303 HG |
818 | ret = devm_request_irq(dev, data->id_det_irq, |
819 | sun4i_usb_phy0_id_vbus_det_irq, | |
820 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | |
821 | "usb0-id-det", data); | |
822 | if (ret) { | |
823 | dev_err(dev, "Err requesting id-det-irq: %d\n", ret); | |
824 | return ret; | |
825 | } | |
826 | } | |
827 | ||
91d96f06 | 828 | data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio); |
5cf700ac | 829 | if (data->vbus_det_irq > 0) { |
d2332303 HG |
830 | ret = devm_request_irq(dev, data->vbus_det_irq, |
831 | sun4i_usb_phy0_id_vbus_det_irq, | |
832 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | |
833 | "usb0-vbus-det", data); | |
834 | if (ret) { | |
835 | dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret); | |
836 | data->vbus_det_irq = -1; | |
837 | sun4i_usb_phy_remove(pdev); /* Stop detect work */ | |
838 | return ret; | |
839 | } | |
840 | } | |
841 | ||
8665c18b HG |
842 | if (data->vbus_power_supply) { |
843 | data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify; | |
844 | data->vbus_power_nb.priority = 0; | |
845 | ret = power_supply_reg_notifier(&data->vbus_power_nb); | |
846 | if (ret) { | |
847 | sun4i_usb_phy_remove(pdev); /* Stop detect work */ | |
848 | return ret; | |
849 | } | |
850 | data->vbus_power_nb_registered = true; | |
851 | } | |
852 | ||
ba4bdc9e | 853 | phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate); |
d2332303 HG |
854 | if (IS_ERR(phy_provider)) { |
855 | sun4i_usb_phy_remove(pdev); /* Stop detect work */ | |
856 | return PTR_ERR(phy_provider); | |
857 | } | |
ba4bdc9e | 858 | |
e7cded27 QS |
859 | dev_dbg(dev, "successfully loaded\n"); |
860 | ||
d2332303 | 861 | return 0; |
ba4bdc9e HG |
862 | } |
863 | ||
68dbc2ce HG |
864 | static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = { |
865 | .num_phys = 3, | |
866 | .type = sun4i_a10_phy, | |
867 | .disc_thresh = 3, | |
868 | .phyctl_offset = REG_PHYCTL_A10, | |
869 | .dedicated_clocks = false, | |
b3e0d141 | 870 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
871 | }; |
872 | ||
873 | static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = { | |
874 | .num_phys = 2, | |
875 | .type = sun4i_a10_phy, | |
876 | .disc_thresh = 2, | |
877 | .phyctl_offset = REG_PHYCTL_A10, | |
878 | .dedicated_clocks = false, | |
b3e0d141 | 879 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
880 | }; |
881 | ||
882 | static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = { | |
883 | .num_phys = 3, | |
91d96f06 | 884 | .type = sun6i_a31_phy, |
68dbc2ce HG |
885 | .disc_thresh = 3, |
886 | .phyctl_offset = REG_PHYCTL_A10, | |
887 | .dedicated_clocks = true, | |
b3e0d141 | 888 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
889 | }; |
890 | ||
891 | static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = { | |
892 | .num_phys = 3, | |
893 | .type = sun4i_a10_phy, | |
894 | .disc_thresh = 2, | |
895 | .phyctl_offset = REG_PHYCTL_A10, | |
896 | .dedicated_clocks = false, | |
b3e0d141 | 897 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
898 | }; |
899 | ||
900 | static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = { | |
901 | .num_phys = 2, | |
d7119224 | 902 | .type = sun6i_a31_phy, |
68dbc2ce HG |
903 | .disc_thresh = 3, |
904 | .phyctl_offset = REG_PHYCTL_A10, | |
905 | .dedicated_clocks = true, | |
b3e0d141 | 906 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
907 | }; |
908 | ||
909 | static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = { | |
910 | .num_phys = 2, | |
911 | .type = sun8i_a33_phy, | |
912 | .disc_thresh = 3, | |
913 | .phyctl_offset = REG_PHYCTL_A33, | |
914 | .dedicated_clocks = true, | |
b3e0d141 | 915 | .enable_pmu_unk1 = false, |
68dbc2ce HG |
916 | }; |
917 | ||
4b63743c CYT |
918 | static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = { |
919 | .num_phys = 3, | |
920 | .hsic_index = 2, | |
921 | .type = sun8i_a83t_phy, | |
922 | .phyctl_offset = REG_PHYCTL_A33, | |
923 | .dedicated_clocks = true, | |
924 | }; | |
925 | ||
626a630e RH |
926 | static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = { |
927 | .num_phys = 4, | |
928 | .type = sun8i_h3_phy, | |
929 | .disc_thresh = 3, | |
864ebdf0 | 930 | .phyctl_offset = REG_PHYCTL_A33, |
626a630e | 931 | .dedicated_clocks = true, |
b3e0d141 | 932 | .enable_pmu_unk1 = true, |
3ecc25e1 | 933 | .phy0_dual_route = true, |
b3e0d141 IZ |
934 | }; |
935 | ||
f3d96f8d IZ |
936 | static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = { |
937 | .num_phys = 3, | |
938 | .type = sun8i_r40_phy, | |
939 | .disc_thresh = 3, | |
940 | .phyctl_offset = REG_PHYCTL_A33, | |
941 | .dedicated_clocks = true, | |
942 | .enable_pmu_unk1 = true, | |
943 | .phy0_dual_route = true, | |
944 | }; | |
945 | ||
16c40361 IZ |
946 | static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = { |
947 | .num_phys = 1, | |
948 | .type = sun8i_v3s_phy, | |
949 | .disc_thresh = 3, | |
950 | .phyctl_offset = REG_PHYCTL_A33, | |
951 | .dedicated_clocks = true, | |
952 | .enable_pmu_unk1 = true, | |
a06173ba | 953 | .phy0_dual_route = true, |
16c40361 IZ |
954 | }; |
955 | ||
b3e0d141 IZ |
956 | static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { |
957 | .num_phys = 2, | |
958 | .type = sun50i_a64_phy, | |
959 | .disc_thresh = 3, | |
960 | .phyctl_offset = REG_PHYCTL_A33, | |
961 | .dedicated_clocks = true, | |
962 | .enable_pmu_unk1 = true, | |
c957b7d2 | 963 | .phy0_dual_route = true, |
626a630e RH |
964 | }; |
965 | ||
ae409cc7 IZ |
966 | static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = { |
967 | .num_phys = 4, | |
968 | .type = sun50i_h6_phy, | |
969 | .disc_thresh = 3, | |
970 | .phyctl_offset = REG_PHYCTL_A33, | |
971 | .dedicated_clocks = true, | |
972 | .enable_pmu_unk1 = true, | |
973 | .phy0_dual_route = true, | |
974 | .missing_phys = BIT(1) | BIT(2), | |
975 | }; | |
976 | ||
ba4bdc9e | 977 | static const struct of_device_id sun4i_usb_phy_of_match[] = { |
68dbc2ce HG |
978 | { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg }, |
979 | { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg }, | |
980 | { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg }, | |
981 | { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg }, | |
982 | { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg }, | |
983 | { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg }, | |
4b63743c | 984 | { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg }, |
626a630e | 985 | { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg }, |
f3d96f8d | 986 | { .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg }, |
16c40361 | 987 | { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg }, |
b3e0d141 IZ |
988 | { .compatible = "allwinner,sun50i-a64-usb-phy", |
989 | .data = &sun50i_a64_cfg}, | |
ae409cc7 | 990 | { .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg }, |
ba4bdc9e HG |
991 | { }, |
992 | }; | |
993 | MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match); | |
994 | ||
995 | static struct platform_driver sun4i_usb_phy_driver = { | |
996 | .probe = sun4i_usb_phy_probe, | |
d2332303 | 997 | .remove = sun4i_usb_phy_remove, |
ba4bdc9e HG |
998 | .driver = { |
999 | .of_match_table = sun4i_usb_phy_of_match, | |
1000 | .name = "sun4i-usb-phy", | |
ba4bdc9e HG |
1001 | } |
1002 | }; | |
1003 | module_platform_driver(sun4i_usb_phy_driver); | |
1004 | ||
1005 | MODULE_DESCRIPTION("Allwinner sun4i USB phy driver"); | |
1006 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | |
1007 | MODULE_LICENSE("GPL v2"); |