[mirror_ubuntu-artful-kernel.git] / drivers / phy / phy-rockchip-usb.c

/*
 * Rockchip usb PHY driver
 *
 * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
 * Copyright (C) 2014 ROCKCHIP, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/clk.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>

/*
 * The higher 16-bit of this register is used for write protection
 * only if BIT(13 + 16) set to 1 the BIT(13) can be written.
 */
#define SIDDQ_WRITE_ENA	BIT(29)
#define SIDDQ_ON		BIT(13)
#define SIDDQ_OFF		(0 << 13)

struct rockchip_usb_phy {
	unsigned int	reg_offset;
	struct regmap	*reg_base;
	struct clk	*clk;
	struct phy	*phy;
};

static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
					   bool siddq)
{
	return regmap_write(phy->reg_base, phy->reg_offset,
			    SIDDQ_WRITE_ENA | (siddq ? SIDDQ_ON : SIDDQ_OFF));
}

static int rockchip_usb_phy_power_off(struct phy *_phy)
{
	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
	int ret = 0;

	/* Power down usb phy analog blocks by set siddq 1 */
	ret = rockchip_usb_phy_power(phy, 1);
	if (ret)
		return ret;

	clk_disable_unprepare(phy->clk);

	return 0;
}

static int rockchip_usb_phy_power_on(struct phy *_phy)
{
	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
	int ret = 0;

	ret = clk_prepare_enable(phy->clk);
	if (ret)
		return ret;

	/* Power up usb phy analog blocks by set siddq 0 */
	ret = rockchip_usb_phy_power(phy, 0);
	if (ret) {
		clk_disable_unprepare(phy->clk);
		return ret;
	}

	return 0;
}

static const struct phy_ops ops = {
	.power_on	= rockchip_usb_phy_power_on,
	.power_off	= rockchip_usb_phy_power_off,
	.owner		= THIS_MODULE,
};

static int rockchip_usb_phy_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rockchip_usb_phy *rk_phy;
	struct phy_provider *phy_provider;
	struct device_node *child;
	struct regmap *grf;
	unsigned int reg_offset;
	int err;

	grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
	if (IS_ERR(grf)) {
		dev_err(&pdev->dev, "Missing rockchip,grf property\n");
		return PTR_ERR(grf);
	}

	for_each_available_child_of_node(dev->of_node, child) {
		rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
		if (!rk_phy) {
			err = -ENOMEM;
			goto put_child;
		}

		if (of_property_read_u32(child, "reg", &reg_offset)) {
			dev_err(dev, "missing reg property in node %s\n",
				child->name);
			err = -EINVAL;
			goto put_child;
		}

		rk_phy->reg_offset = reg_offset;
		rk_phy->reg_base = grf;

		rk_phy->clk = of_clk_get_by_name(child, "phyclk");
		if (IS_ERR(rk_phy->clk))
			rk_phy->clk = NULL;

		rk_phy->phy = devm_phy_create(dev, child, &ops);
		if (IS_ERR(rk_phy->phy)) {
			dev_err(dev, "failed to create PHY\n");
			err = PTR_ERR(rk_phy->phy);
			goto put_child;
		}
		phy_set_drvdata(rk_phy->phy, rk_phy);

		/* only power up usb phy when it use, so disable it when init*/
		err = rockchip_usb_phy_power(rk_phy, 1);
		if (err)
			goto put_child;
	}

	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	return PTR_ERR_OR_ZERO(phy_provider);
put_child:
	of_node_put(child);
	return err;
}

static const struct of_device_id rockchip_usb_phy_dt_ids[] = {
	{ .compatible = "rockchip,rk3288-usb-phy" },
	{}
};

MODULE_DEVICE_TABLE(of, rockchip_usb_phy_dt_ids);

static struct platform_driver rockchip_usb_driver = {
	.probe		= rockchip_usb_phy_probe,
	.driver		= {
		.name	= "rockchip-usb-phy",
		.of_match_table = rockchip_usb_phy_dt_ids,
	},
};

module_platform_driver(rockchip_usb_driver);

MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
64d11406 YL	1	/*
	2	* Rockchip usb PHY driver
	3	*
	4	* Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com>
	5	* Copyright (C) 2014 ROCKCHIP, Inc.
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#include <linux/clk.h>
	18	#include <linux/io.h>
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/mutex.h>
	22	#include <linux/of.h>
	23	#include <linux/of_address.h>
	24	#include <linux/phy/phy.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/regulator/consumer.h>
	27	#include <linux/reset.h>
	28	#include <linux/regmap.h>
	29	#include <linux/mfd/syscon.h>
	30
	31	/*
	32	* The higher 16-bit of this register is used for write protection
	33	* only if BIT(13 + 16) set to 1 the BIT(13) can be written.
	34	*/
	35	#define SIDDQ_WRITE_ENA BIT(29)
	36	#define SIDDQ_ON BIT(13)
	37	#define SIDDQ_OFF (0 << 13)
	38
	39	struct rockchip_usb_phy {
	40	unsigned int reg_offset;
	41	struct regmap *reg_base;
	42	struct clk *clk;
	43	struct phy *phy;
	44	};
	45
	46	static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
	47	bool siddq)
	48	{
	49	return regmap_write(phy->reg_base, phy->reg_offset,
	50	SIDDQ_WRITE_ENA \| (siddq ? SIDDQ_ON : SIDDQ_OFF));
	51	}
	52
	53	static int rockchip_usb_phy_power_off(struct phy *_phy)
	54	{
	55	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
	56	int ret = 0;
	57
	58	/* Power down usb phy analog blocks by set siddq 1 */
	59	ret = rockchip_usb_phy_power(phy, 1);
	60	if (ret)
	61	return ret;
	62
	63	clk_disable_unprepare(phy->clk);
64d11406 YL	64
	65	return 0;
	66	}
	67
	68	static int rockchip_usb_phy_power_on(struct phy *_phy)
	69	{
	70	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
	71	int ret = 0;
	72
	73	ret = clk_prepare_enable(phy->clk);
	74	if (ret)
	75	return ret;
	76
	77	/* Power up usb phy analog blocks by set siddq 0 */
	78	ret = rockchip_usb_phy_power(phy, 0);
6b08e36b AL	79	if (ret) {
6b08e36b AL	80	clk_disable_unprepare(phy->clk);
64d11406	81	return ret;
6b08e36b	82	}
64d11406 YL	83
	84	return 0;
	85	}
	86
4a9e5ca1	87	static const struct phy_ops ops = {
64d11406 YL	88	.power_on = rockchip_usb_phy_power_on,
	89	.power_off = rockchip_usb_phy_power_off,
	90	.owner = THIS_MODULE,
	91	};
	92
	93	static int rockchip_usb_phy_probe(struct platform_device *pdev)
	94	{
	95	struct device *dev = &pdev->dev;
	96	struct rockchip_usb_phy *rk_phy;
	97	struct phy_provider *phy_provider;
	98	struct device_node *child;
	99	struct regmap *grf;
	100	unsigned int reg_offset;
08db7e5c	101	int err;
64d11406 YL	102
	103	grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
	104	if (IS_ERR(grf)) {
	105	dev_err(&pdev->dev, "Missing rockchip,grf property\n");
	106	return PTR_ERR(grf);
	107	}
	108
	109	for_each_available_child_of_node(dev->of_node, child) {
	110	rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
f6f31af8 JL	111	if (!rk_phy) {
	112	err = -ENOMEM;
	113	goto put_child;
	114	}
64d11406 YL	115
	116	if (of_property_read_u32(child, "reg", &reg_offset)) {
	117	dev_err(dev, "missing reg property in node %s\n",
	118	child->name);
f6f31af8 JL	119	err = -EINVAL;
f6f31af8 JL	120	goto put_child;
64d11406 YL	121	}
	122
	123	rk_phy->reg_offset = reg_offset;
	124	rk_phy->reg_base = grf;
	125
	126	rk_phy->clk = of_clk_get_by_name(child, "phyclk");
	127	if (IS_ERR(rk_phy->clk))
	128	rk_phy->clk = NULL;
	129
	130	rk_phy->phy = devm_phy_create(dev, child, &ops);
	131	if (IS_ERR(rk_phy->phy)) {
	132	dev_err(dev, "failed to create PHY\n");
f6f31af8 JL	133	err = PTR_ERR(rk_phy->phy);
f6f31af8 JL	134	goto put_child;
64d11406 YL	135	}
64d11406 YL	136	phy_set_drvdata(rk_phy->phy, rk_phy);
08db7e5c	137
	138	/* only power up usb phy when it use, so disable it when init*/
	139	err = rockchip_usb_phy_power(rk_phy, 1);
	140	if (err)
f6f31af8	141	goto put_child;
64d11406 YL	142	}
	143
	144	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	145	return PTR_ERR_OR_ZERO(phy_provider);
f6f31af8 JL	146	put_child:
	147	of_node_put(child);
	148	return err;
64d11406 YL	149	}
	150
	151	static const struct of_device_id rockchip_usb_phy_dt_ids[] = {
	152	{ .compatible = "rockchip,rk3288-usb-phy" },
	153	{}
	154	};
	155
	156	MODULE_DEVICE_TABLE(of, rockchip_usb_phy_dt_ids);
	157
	158	static struct platform_driver rockchip_usb_driver = {
	159	.probe = rockchip_usb_phy_probe,
	160	.driver = {
	161	.name = "rockchip-usb-phy",
64d11406 YL	162	.of_match_table = rockchip_usb_phy_dt_ids,
	163	},
	164	};
	165
	166	module_platform_driver(rockchip_usb_driver);
	167
	168	MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>");
	169	MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver");
	170	MODULE_LICENSE("GPL v2");