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Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | # |
2 | # PINCTRL infrastructure and drivers | |
3 | # | |
4 | ||
45f034ef LW |
5 | config PINCTRL |
6 | bool | |
2744e8af LW |
7 | |
8 | if PINCTRL | |
9 | ||
45f034ef LW |
10 | menu "Pin controllers" |
11 | depends on PINCTRL | |
12 | ||
2744e8af | 13 | config PINMUX |
244e95a7 | 14 | bool "Support pin multiplexing controllers" if COMPILE_TEST |
ae6b4d85 LW |
15 | |
16 | config PINCONF | |
244e95a7 | 17 | bool "Support pin configuration controllers" if COMPILE_TEST |
2744e8af | 18 | |
394349f7 LW |
19 | config GENERIC_PINCONF |
20 | bool | |
21 | select PINCONF | |
22 | ||
2744e8af LW |
23 | config DEBUG_PINCTRL |
24 | bool "Debug PINCTRL calls" | |
25 | depends on DEBUG_KERNEL | |
26 | help | |
27 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. | |
28 | ||
e9a03add SZ |
29 | config PINCTRL_ADI2 |
30 | bool "ADI pin controller driver" | |
9d7278d0 | 31 | depends on BLACKFIN |
e9a03add SZ |
32 | select PINMUX |
33 | select IRQ_DOMAIN | |
34 | help | |
35 | This is the pin controller and gpio driver for ADI BF54x, BF60x and | |
36 | future processors. This option is selected automatically when specific | |
37 | machine and arch are selected to build. | |
38 | ||
c8ce8782 LD |
39 | config PINCTRL_AS3722 |
40 | bool "Pinctrl and GPIO driver for ams AS3722 PMIC" | |
41 | depends on MFD_AS3722 && GPIOLIB | |
42 | select PINMUX | |
43 | select GENERIC_PINCONF | |
44 | help | |
45 | AS3722 device supports the configuration of GPIO pins for different | |
46 | functionality. This driver supports the pinmux, push-pull and | |
47 | open drain configuration for the GPIO pins of AS3722 devices. It also | |
48 | supports the GPIO functionality through gpiolib. | |
49 | ||
e9a03add SZ |
50 | config PINCTRL_BF54x |
51 | def_bool y if BF54x | |
52 | select PINCTRL_ADI2 | |
53 | ||
54 | config PINCTRL_BF60x | |
55 | def_bool y if BF60x | |
56 | select PINCTRL_ADI2 | |
57 | ||
6732ae5c JCPV |
58 | config PINCTRL_AT91 |
59 | bool "AT91 pinctrl driver" | |
60 | depends on OF | |
61 | depends on ARCH_AT91 | |
62 | select PINMUX | |
63 | select PINCONF | |
80cc3732 AS |
64 | select GPIOLIB |
65 | select OF_GPIO | |
66 | select GPIOLIB_IRQCHIP | |
6732ae5c JCPV |
67 | help |
68 | Say Y here to enable the at91 pinctrl driver | |
69 | ||
77618084 LD |
70 | config PINCTRL_AT91PIO4 |
71 | bool "AT91 PIO4 pinctrl driver" | |
72 | depends on OF | |
73 | depends on ARCH_AT91 | |
74 | select PINMUX | |
75 | select GENERIC_PINCONF | |
76 | select GPIOLIB | |
77 | select GPIOLIB_IRQCHIP | |
78 | select OF_GPIO | |
79 | help | |
80 | Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4 | |
81 | controller available on sama5d2 SoC. | |
82 | ||
dbad75dd KX |
83 | config PINCTRL_AMD |
84 | bool "AMD GPIO pin control" | |
85 | depends on GPIOLIB | |
86 | select GPIOLIB_IRQCHIP | |
87 | select PINCONF | |
88 | select GENERIC_PINCONF | |
89 | help | |
90 | driver for memory mapped GPIO functionality on AMD platforms | |
91 | (x86 or arm).Most pins are usually muxed to some other | |
92 | functionality by firmware,so only a small amount is available | |
93 | for gpio use. | |
94 | ||
95 | Requires ACPI/FDT device enumeration code to set up a platform | |
96 | device. | |
97 | ||
38b0e507 BS |
98 | config PINCTRL_DIGICOLOR |
99 | bool | |
100 | depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST) | |
101 | select PINMUX | |
102 | select GENERIC_PINCONF | |
103 | ||
3f8c50c9 JC |
104 | config PINCTRL_LANTIQ |
105 | bool | |
106 | depends on LANTIQ | |
107 | select PINMUX | |
108 | select PINCONF | |
109 | ||
2f77ac93 JE |
110 | config PINCTRL_LPC18XX |
111 | bool "NXP LPC18XX/43XX SCU pinctrl driver" | |
112 | depends on OF && (ARCH_LPC18XX || COMPILE_TEST) | |
113 | default ARCH_LPC18XX | |
114 | select PINMUX | |
115 | select GENERIC_PINCONF | |
116 | help | |
117 | Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU). | |
118 | ||
e316cb2b JC |
119 | config PINCTRL_FALCON |
120 | bool | |
121 | depends on SOC_FALCON | |
122 | depends on PINCTRL_LANTIQ | |
123 | ||
6ac73095 BG |
124 | config PINCTRL_MESON |
125 | bool | |
b99e6fb8 | 126 | depends on OF |
6ac73095 BG |
127 | select PINMUX |
128 | select PINCONF | |
129 | select GENERIC_PINCONF | |
b99e6fb8 | 130 | select GPIOLIB |
6ac73095 BG |
131 | select OF_GPIO |
132 | select REGMAP_MMIO | |
133 | ||
d3e51161 HS |
134 | config PINCTRL_ROCKCHIP |
135 | bool | |
136 | select PINMUX | |
137 | select GENERIC_PINCONF | |
138 | select GENERIC_IRQ_CHIP | |
751a99ab | 139 | select MFD_SYSCON |
d3e51161 | 140 | |
8b8b091b TL |
141 | config PINCTRL_SINGLE |
142 | tristate "One-register-per-pin type device tree based pinctrl driver" | |
143 | depends on OF | |
144 | select PINMUX | |
145 | select PINCONF | |
9dddb4df | 146 | select GENERIC_PINCONF |
8b8b091b TL |
147 | help |
148 | This selects the device tree based generic pinctrl driver. | |
149 | ||
3bece55a | 150 | config PINCTRL_SIRF |
a17272a4 | 151 | bool "CSR SiRFprimaII pin controller driver" |
d3e26f2f | 152 | depends on ARCH_SIRF |
393daa81 | 153 | select PINMUX |
f9367793 WC |
154 | select PINCONF |
155 | select GENERIC_PINCONF | |
7420d2d0 | 156 | select GPIOLIB_IRQCHIP |
393daa81 | 157 | |
cefc03e5 AB |
158 | config PINCTRL_PISTACHIO |
159 | def_bool y if MACH_PISTACHIO | |
160 | depends on GPIOLIB | |
161 | select PINMUX | |
162 | select GENERIC_PINCONF | |
163 | select GPIOLIB_IRQCHIP | |
164 | select OF_GPIO | |
165 | ||
701016c0 SK |
166 | config PINCTRL_ST |
167 | bool | |
168 | depends on OF | |
169 | select PINMUX | |
170 | select PINCONF | |
130cbe30 | 171 | select GPIOLIB_IRQCHIP |
701016c0 | 172 | |
971dac71 SW |
173 | config PINCTRL_TEGRA |
174 | bool | |
507ccdbf AL |
175 | select PINMUX |
176 | select PINCONF | |
971dac71 SW |
177 | |
178 | config PINCTRL_TEGRA20 | |
179 | bool | |
971dac71 SW |
180 | select PINCTRL_TEGRA |
181 | ||
182 | config PINCTRL_TEGRA30 | |
183 | bool | |
971dac71 SW |
184 | select PINCTRL_TEGRA |
185 | ||
b6ae7a26 PR |
186 | config PINCTRL_TEGRA114 |
187 | bool | |
188 | select PINCTRL_TEGRA | |
189 | ||
1a16bee6 AG |
190 | config PINCTRL_TEGRA124 |
191 | bool | |
192 | select PINCTRL_TEGRA | |
193 | ||
9184f756 SW |
194 | config PINCTRL_TEGRA210 |
195 | bool | |
196 | select PINCTRL_TEGRA | |
197 | ||
dc0a3938 TR |
198 | config PINCTRL_TEGRA_XUSB |
199 | def_bool y if ARCH_TEGRA | |
200 | select GENERIC_PHY | |
201 | select PINCONF | |
202 | select PINMUX | |
203 | ||
d5025f9f JH |
204 | config PINCTRL_TZ1090 |
205 | bool "Toumaz Xenif TZ1090 pin control driver" | |
206 | depends on SOC_TZ1090 | |
207 | select PINMUX | |
208 | select GENERIC_PINCONF | |
209 | ||
b58f0273 JH |
210 | config PINCTRL_TZ1090_PDC |
211 | bool "Toumaz Xenif TZ1090 PDC pin control driver" | |
212 | depends on SOC_TZ1090 | |
213 | select PINMUX | |
214 | select PINCONF | |
215 | ||
3bece55a LW |
216 | config PINCTRL_U300 |
217 | bool "U300 pin controller driver" | |
98da3529 LW |
218 | depends on ARCH_U300 |
219 | select PINMUX | |
dc0b1aa3 | 220 | select GENERIC_PINCONF |
45f034ef | 221 | |
ca402d37 LW |
222 | config PINCTRL_COH901 |
223 | bool "ST-Ericsson U300 COH 901 335/571 GPIO" | |
3c94d1bb | 224 | depends on GPIOLIB && ARCH_U300 && PINCTRL_U300 |
523dcce7 | 225 | select GPIOLIB_IRQCHIP |
ca402d37 LW |
226 | help |
227 | Say yes here to support GPIO interface on ST-Ericsson U300. | |
228 | The names of the two IP block variants supported are | |
229 | COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 | |
230 | ports of 8 GPIO pins each. | |
231 | ||
0a8d3e24 | 232 | config PINCTRL_PALMAS |
736658c5 | 233 | bool "Pinctrl driver for the PALMAS Series MFD devices" |
0a8d3e24 | 234 | depends on OF && MFD_PALMAS |
63ca8db7 | 235 | select PINMUX |
0a8d3e24 LD |
236 | select GENERIC_PINCONF |
237 | help | |
238 | Palmas device supports the configuration of pins for different | |
239 | functionality. This driver supports the pinmux, push-pull and | |
240 | open drain configuration for the Palmas series devices like | |
241 | TPS65913, TPS80036 etc. | |
242 | ||
add958ce SB |
243 | config PINCTRL_ZYNQ |
244 | bool "Pinctrl driver for Xilinx Zynq" | |
245 | depends on ARCH_ZYNQ | |
246 | select PINMUX | |
247 | select GENERIC_PINCONF | |
248 | help | |
249 | This selectes the pinctrl driver for Xilinx Zynq. | |
250 | ||
b17f2f9b | 251 | source "drivers/pinctrl/bcm/Kconfig" |
3de68d33 | 252 | source "drivers/pinctrl/berlin/Kconfig" |
edad3b2a | 253 | source "drivers/pinctrl/freescale/Kconfig" |
5fae8b86 | 254 | source "drivers/pinctrl/intel/Kconfig" |
06763c74 | 255 | source "drivers/pinctrl/mvebu/Kconfig" |
3a198059 | 256 | source "drivers/pinctrl/nomadik/Kconfig" |
69b78b8d | 257 | source "drivers/pinctrl/qcom/Kconfig" |
ebe629a3 | 258 | source "drivers/pinctrl/samsung/Kconfig" |
6e54d8d2 | 259 | source "drivers/pinctrl/sh-pfc/Kconfig" |
deda8287 | 260 | source "drivers/pinctrl/spear/Kconfig" |
5f910777 | 261 | source "drivers/pinctrl/sunxi/Kconfig" |
6e908892 | 262 | source "drivers/pinctrl/uniphier/Kconfig" |
170c6152 | 263 | source "drivers/pinctrl/vt8500/Kconfig" |
a6df410d | 264 | source "drivers/pinctrl/mediatek/Kconfig" |
deda8287 | 265 | |
3f8c50c9 JC |
266 | config PINCTRL_XWAY |
267 | bool | |
268 | depends on SOC_TYPE_XWAY | |
269 | depends on PINCTRL_LANTIQ | |
270 | ||
5aad0db1 CR |
271 | config PINCTRL_TB10X |
272 | bool | |
b99e6fb8 LW |
273 | depends on OF && ARC_PLAT_TB10X |
274 | select GPIOLIB | |
5aad0db1 | 275 | |
45f034ef | 276 | endmenu |
98da3529 | 277 | |
2744e8af | 278 | endif |