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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
b17f2f9b RJ |
2 | # |
3 | # Broadcom pinctrl drivers | |
4 | # | |
5 | ||
6 | config PINCTRL_BCM281XX | |
7 | bool "Broadcom BCM281xx pinctrl driver" | |
8 | depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST) | |
9 | select PINMUX | |
10 | select PINCONF | |
11 | select GENERIC_PINCONF | |
12 | select REGMAP_MMIO | |
652da824 | 13 | default ARCH_BCM_MOBILE |
b17f2f9b RJ |
14 | help |
15 | Say Y here to support Broadcom BCM281xx pinctrl driver, which is used | |
16 | for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351, | |
17 | BCM28145, and BCM28155 SoCs. This driver requires the pinctrl | |
18 | framework. GPIO is provided by a separate GPIO driver. | |
19 | ||
20 | config PINCTRL_BCM2835 | |
21 | bool | |
22 | select PINMUX | |
23 | select PINCONF | |
0de70495 | 24 | select GENERIC_PINCONF |
85ae9e51 | 25 | select GPIOLIB_IRQCHIP |
cbd159ed | 26 | |
616043d5 PK |
27 | config PINCTRL_IPROC_GPIO |
28 | bool "Broadcom iProc GPIO (with PINCONF) driver" | |
29 | depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST) | |
b64333ce RJ |
30 | select GPIOLIB_IRQCHIP |
31 | select PINCONF | |
32 | select GENERIC_PINCONF | |
616043d5 | 33 | default ARCH_BCM_IPROC |
b64333ce | 34 | help |
616043d5 PK |
35 | Say yes here to enable the Broadcom iProc GPIO driver. |
36 | ||
37 | The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use | |
38 | same GPIO Controller IP hence this driver could be used for all. | |
b64333ce RJ |
39 | |
40 | The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU | |
41 | GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and | |
42 | the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are | |
43 | supported by this driver. | |
44 | ||
616043d5 PK |
45 | The Broadcom NSP has two GPIO controllers including the ChipcommonA |
46 | GPIO, the ChipcommonB GPIO. Later controller is supported by this | |
47 | driver. | |
48 | ||
49 | The Broadcom NS2 has two GPIO controller including the CRMU GPIO, | |
50 | the ChipcommonG GPIO. Both controllers are supported by this driver. | |
51 | ||
52 | The Broadcom Stingray GPIO controllers are supported by this driver. | |
53 | ||
54 | All above SoCs GPIO controllers support basic PINCONF functions such | |
b64333ce RJ |
55 | as bias pull up, pull down, and drive strength configurations, when |
56 | these pins are muxed to GPIO. | |
57 | ||
616043d5 PK |
58 | It provides the framework where pins from the individual GPIO can be |
59 | individually muxed to GPIO function, through interaction with the | |
60 | SoCs IOMUX controller. This features could be used only on SoCs which | |
61 | support individual pin muxing. | |
b64333ce | 62 | |
cbd159ed RJ |
63 | config PINCTRL_CYGNUS_MUX |
64 | bool "Broadcom Cygnus IOMUX driver" | |
65 | depends on (ARCH_BCM_CYGNUS || COMPILE_TEST) | |
53056f59 | 66 | depends on OF |
cbd159ed RJ |
67 | select PINMUX |
68 | select GENERIC_PINCONF | |
69 | default ARCH_BCM_CYGNUS | |
70 | help | |
71 | Say yes here to enable the Broadcom Cygnus IOMUX driver. | |
72 | ||
73 | The Broadcom Cygnus IOMUX driver supports group based IOMUX | |
74 | configuration, with the exception that certain individual pins | |
03671057 | 75 | can be overridden to GPIO function |
8bfcbbbc | 76 | |
c12fb177 RM |
77 | config PINCTRL_NS |
78 | bool "Broadcom Northstar pins driver" | |
79 | depends on OF && (ARCH_BCM_5301X || COMPILE_TEST) | |
80 | select PINMUX | |
81 | select GENERIC_PINCONF | |
82 | default ARCH_BCM_5301X | |
83 | help | |
84 | Say yes here to enable the Broadcom NS SoC pins driver. | |
85 | ||
86 | The Broadcom Northstar pins driver supports muxing multi-purpose pins | |
87 | that can be used for various functions (e.g. SPI, I2C, UART) as well | |
88 | as GPIOs. | |
89 | ||
8bfcbbbc YRDR |
90 | config PINCTRL_NSP_GPIO |
91 | bool "Broadcom NSP GPIO (with PINCONF) driver" | |
92 | depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST) | |
93 | select GPIOLIB_IRQCHIP | |
94 | select PINCONF | |
95 | select GENERIC_PINCONF | |
96 | default ARCH_BCM_NSP | |
97 | help | |
98 | Say yes here to enable the Broadcom NSP GPIO driver. | |
99 | ||
100 | The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is | |
101 | supported by this driver. | |
102 | ||
103 | The ChipcommonA GPIO controller support basic PINCONF functions such | |
104 | as bias pull up, pull down, and drive strength configurations, when | |
105 | these pins are muxed to GPIO. | |
b5aa1006 YRDR |
106 | |
107 | config PINCTRL_NS2_MUX | |
108 | bool "Broadcom Northstar2 pinmux driver" | |
109 | depends on OF | |
110 | depends on ARCH_BCM_IPROC || COMPILE_TEST | |
111 | select PINMUX | |
112 | select GENERIC_PINCONF | |
113 | default ARM64 && ARCH_BCM_IPROC | |
114 | help | |
115 | Say yes here to enable the Broadcom NS2 MUX driver. | |
116 | ||
117 | The Broadcom Northstar2 IOMUX driver supports group based IOMUX | |
118 | configuration. | |
cc4fa83f YRDR |
119 | |
120 | config PINCTRL_NSP_MUX | |
121 | bool "Broadcom NSP IOMUX driver" | |
122 | depends on (ARCH_BCM_NSP || COMPILE_TEST) | |
53056f59 | 123 | depends on OF |
cc4fa83f YRDR |
124 | select PINMUX |
125 | select GENERIC_PINCONF | |
126 | default ARCH_BCM_NSP | |
127 | help | |
128 | Say yes here to enable the Broadcom NSP SOC IOMUX driver. | |
129 | ||
130 | The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX | |
131 | configuration, with certain individual pins can be overridden | |
132 | to GPIO function. |