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218d72a7 RF |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Pinctrl for Cirrus Logic CS47L90 | |
4 | * | |
5 | * Copyright (C) 2016-2017 Cirrus Logic | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; version 2. | |
10 | */ | |
11 | ||
12 | #include <linux/err.h> | |
13 | #include <linux/mfd/madera/core.h> | |
14 | ||
15 | #include "pinctrl-madera.h" | |
16 | ||
17 | /* | |
18 | * The alt func groups are the most commonly used functions we place these at | |
19 | * the lower function indexes for convenience, and the less commonly used gpio | |
20 | * functions at higher indexes. | |
21 | * | |
22 | * To stay consistent with the datasheet the function names are the same as | |
23 | * the group names for that function's pins | |
24 | * | |
25 | * Note - all 1 less than in datasheet because these are zero-indexed | |
26 | */ | |
27 | static const unsigned int cs47l90_mif1_pins[] = { 8, 9 }; | |
28 | static const unsigned int cs47l90_mif2_pins[] = { 10, 11 }; | |
29 | static const unsigned int cs47l90_mif3_pins[] = { 12, 13 }; | |
30 | static const unsigned int cs47l90_aif1_pins[] = { 14, 15, 16, 17 }; | |
31 | static const unsigned int cs47l90_aif2_pins[] = { 18, 19, 20, 21 }; | |
32 | static const unsigned int cs47l90_aif3_pins[] = { 22, 23, 24, 25 }; | |
33 | static const unsigned int cs47l90_aif4_pins[] = { 26, 27, 28, 29 }; | |
34 | static const unsigned int cs47l90_dmic4_pins[] = { 30, 31 }; | |
35 | static const unsigned int cs47l90_dmic5_pins[] = { 32, 33 }; | |
36 | static const unsigned int cs47l90_dmic3_pins[] = { 34, 35 }; | |
37 | static const unsigned int cs47l90_spk1_pins[] = { 36, 37 }; | |
38 | ||
39 | static const struct madera_pin_groups cs47l90_pin_groups[] = { | |
40 | { "aif1", cs47l90_aif1_pins, ARRAY_SIZE(cs47l90_aif1_pins) }, | |
41 | { "aif2", cs47l90_aif2_pins, ARRAY_SIZE(cs47l90_aif2_pins) }, | |
42 | { "aif3", cs47l90_aif3_pins, ARRAY_SIZE(cs47l90_aif3_pins) }, | |
43 | { "aif4", cs47l90_aif4_pins, ARRAY_SIZE(cs47l90_aif4_pins) }, | |
44 | { "mif1", cs47l90_mif1_pins, ARRAY_SIZE(cs47l90_mif1_pins) }, | |
45 | { "mif2", cs47l90_mif2_pins, ARRAY_SIZE(cs47l90_mif2_pins) }, | |
46 | { "mif3", cs47l90_mif3_pins, ARRAY_SIZE(cs47l90_mif3_pins) }, | |
47 | { "dmic3", cs47l90_dmic3_pins, ARRAY_SIZE(cs47l90_dmic3_pins) }, | |
48 | { "dmic4", cs47l90_dmic4_pins, ARRAY_SIZE(cs47l90_dmic4_pins) }, | |
49 | { "dmic5", cs47l90_dmic5_pins, ARRAY_SIZE(cs47l90_dmic5_pins) }, | |
50 | { "pdmspk1", cs47l90_spk1_pins, ARRAY_SIZE(cs47l90_spk1_pins) }, | |
51 | }; | |
52 | ||
53 | const struct madera_pin_chip cs47l90_pin_chip = { | |
54 | .n_pins = CS47L90_NUM_GPIOS, | |
55 | .pin_groups = cs47l90_pin_groups, | |
56 | .n_pin_groups = ARRAY_SIZE(cs47l90_pin_groups), | |
57 | }; |