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[mirror_ubuntu-focal-kernel.git] / drivers / pinctrl / cirrus / pinctrl-madera-core.c
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218d72a7
RF		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Pinctrl for Cirrus Logic Madera codecs
4 *
5 * Copyright (C) 2016-2018 Cirrus Logic
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2.
10 */
11
12#include <linux/err.h>
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/regmap.h>
16#include <linux/slab.h>
87eff9af 17#include <linux/pinctrl/machine.h>
218d72a7
RF		 18#include <linux/pinctrl/pinctrl.h>
19#include <linux/pinctrl/pinmux.h>
20#include <linux/pinctrl/pinconf.h>
21#include <linux/pinctrl/pinconf-generic.h>
22
23#include <linux/mfd/madera/core.h>
24#include <linux/mfd/madera/registers.h>
25
26#include "../pinctrl-utils.h"
27
28#include "pinctrl-madera.h"
29
30/*
31 * Use pin GPIO names for consistency
32 * NOTE: IDs are zero-indexed for coding convenience
33 */
34static const struct pinctrl_pin_desc madera_pins[] = {
35 PINCTRL_PIN(0, "gpio1"),
36 PINCTRL_PIN(1, "gpio2"),
37 PINCTRL_PIN(2, "gpio3"),
38 PINCTRL_PIN(3, "gpio4"),
39 PINCTRL_PIN(4, "gpio5"),
40 PINCTRL_PIN(5, "gpio6"),
41 PINCTRL_PIN(6, "gpio7"),
42 PINCTRL_PIN(7, "gpio8"),
43 PINCTRL_PIN(8, "gpio9"),
44 PINCTRL_PIN(9, "gpio10"),
45 PINCTRL_PIN(10, "gpio11"),
46 PINCTRL_PIN(11, "gpio12"),
47 PINCTRL_PIN(12, "gpio13"),
48 PINCTRL_PIN(13, "gpio14"),
49 PINCTRL_PIN(14, "gpio15"),
50 PINCTRL_PIN(15, "gpio16"),
51 PINCTRL_PIN(16, "gpio17"),
52 PINCTRL_PIN(17, "gpio18"),
53 PINCTRL_PIN(18, "gpio19"),
54 PINCTRL_PIN(19, "gpio20"),
55 PINCTRL_PIN(20, "gpio21"),
56 PINCTRL_PIN(21, "gpio22"),
57 PINCTRL_PIN(22, "gpio23"),
58 PINCTRL_PIN(23, "gpio24"),
59 PINCTRL_PIN(24, "gpio25"),
60 PINCTRL_PIN(25, "gpio26"),
61 PINCTRL_PIN(26, "gpio27"),
62 PINCTRL_PIN(27, "gpio28"),
63 PINCTRL_PIN(28, "gpio29"),
64 PINCTRL_PIN(29, "gpio30"),
65 PINCTRL_PIN(30, "gpio31"),
66 PINCTRL_PIN(31, "gpio32"),
67 PINCTRL_PIN(32, "gpio33"),
68 PINCTRL_PIN(33, "gpio34"),
69 PINCTRL_PIN(34, "gpio35"),
70 PINCTRL_PIN(35, "gpio36"),
71 PINCTRL_PIN(36, "gpio37"),
72 PINCTRL_PIN(37, "gpio38"),
73 PINCTRL_PIN(38, "gpio39"),
74 PINCTRL_PIN(39, "gpio40"),
75};
76
77/*
78 * All single-pin functions can be mapped to any GPIO, however pinmux applies
79 * functions to pin groups and only those groups declared as supporting that
80 * function. To make this work we must put each pin in its own dummy group so
81 * that the functions can be described as applying to all pins.
82 * Since these do not correspond to anything in the actual hardware - they are
83 * merely an adaptation to pinctrl's view of the world - we use the same name
84 * as the pin to avoid confusion when comparing with datasheet instructions
85 */
86static const char * const madera_pin_single_group_names[] = {
87 "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
88 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
89 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
90 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
91 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
92 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40",
93};
94
95/* set of pin numbers for single-pin groups, zero-indexed */
96static const unsigned int madera_pin_single_group_pins[] = {
97 0, 1, 2, 3, 4, 5, 6,
98 7, 8, 9, 10, 11, 12, 13,
99 14, 15, 16, 17, 18, 19, 20,
100 21, 22, 23, 24, 25, 26, 27,
101 28, 29, 30, 31, 32, 33, 34,
102 35, 36, 37, 38, 39,
103};
104
105static const char * const madera_aif1_group_names[] = { "aif1" };
106static const char * const madera_aif2_group_names[] = { "aif2" };
107static const char * const madera_aif3_group_names[] = { "aif3" };
108static const char * const madera_aif4_group_names[] = { "aif4" };
109static const char * const madera_mif1_group_names[] = { "mif1" };
110static const char * const madera_mif2_group_names[] = { "mif2" };
111static const char * const madera_mif3_group_names[] = { "mif3" };
112static const char * const madera_dmic3_group_names[] = { "dmic3" };
113static const char * const madera_dmic4_group_names[] = { "dmic4" };
114static const char * const madera_dmic5_group_names[] = { "dmic5" };
115static const char * const madera_dmic6_group_names[] = { "dmic6" };
116static const char * const madera_spk1_group_names[] = { "pdmspk1" };
117static const char * const madera_spk2_group_names[] = { "pdmspk2" };
118
119/*
120 * alt-functions always apply to a single pin group, other functions always
121 * apply to all pins
122 */
123static const struct {
124 const char *name;
125 const char * const *group_names;
126 u32 func;
127} madera_mux_funcs[] = {
128 {
129 .name = "aif1",
130 .group_names = madera_aif1_group_names,
131 .func = 0x000
132 },
133 {
134 .name = "aif2",
135 .group_names = madera_aif2_group_names,
136 .func = 0x000
137 },
138 {
139 .name = "aif3",
140 .group_names = madera_aif3_group_names,
141 .func = 0x000
142 },
143 {
144 .name = "aif4",
145 .group_names = madera_aif4_group_names,
146 .func = 0x000
147 },
148 {
149 .name = "mif1",
150 .group_names = madera_mif1_group_names,
151 .func = 0x000
152 },
153 {
154 .name = "mif2",
155 .group_names = madera_mif2_group_names,
156 .func = 0x000
157 },
158 {
159 .name = "mif3",
160 .group_names = madera_mif3_group_names,
161 .func = 0x000
162 },
163 {
164 .name = "dmic3",
165 .group_names = madera_dmic3_group_names,
166 .func = 0x000
167 },
168 {
169 .name = "dmic4",
170 .group_names = madera_dmic4_group_names,
171 .func = 0x000
172 },
173 {
174 .name = "dmic5",
175 .group_names = madera_dmic5_group_names,
176 .func = 0x000
177 },
178 {
179 .name = "dmic6",
180 .group_names = madera_dmic6_group_names,
181 .func = 0x000
182 },
183 {
184 .name = "pdmspk1",
185 .group_names = madera_spk1_group_names,
186 .func = 0x000
187 },
188 {
189 .name = "pdmspk2",
190 .group_names = madera_spk2_group_names,
191 .func = 0x000
192 },
193 {
194 .name = "io",
195 .group_names = madera_pin_single_group_names,
196 .func = 0x001
197 },
198 {
199 .name = "dsp-gpio",
200 .group_names = madera_pin_single_group_names,
201 .func = 0x002
202 },
203 {
204 .name = "irq1",
205 .group_names = madera_pin_single_group_names,
206 .func = 0x003
207 },
208 {
209 .name = "irq2",
210 .group_names = madera_pin_single_group_names,
211 .func = 0x004
212 },
213 {
214 .name = "fll1-clk",
215 .group_names = madera_pin_single_group_names,
216 .func = 0x010
217 },
218 {
219 .name = "fll2-clk",
220 .group_names = madera_pin_single_group_names,
221 .func = 0x011
222 },
223 {
224 .name = "fll3-clk",
225 .group_names = madera_pin_single_group_names,
226 .func = 0x012
227 },
228 {
229 .name = "fllao-clk",
230 .group_names = madera_pin_single_group_names,
231 .func = 0x013
232 },
233 {
234 .name = "fll1-lock",
235 .group_names = madera_pin_single_group_names,
236 .func = 0x018
237 },
238 {
239 .name = "fll2-lock",
240 .group_names = madera_pin_single_group_names,
241 .func = 0x019
242 },
243 {
244 .name = "fll3-lock",
245 .group_names = madera_pin_single_group_names,
246 .func = 0x01a
247 },
248 {
249 .name = "fllao-lock",
250 .group_names = madera_pin_single_group_names,
251 .func = 0x01b
252 },
253 {
254 .name = "opclk",
255 .group_names = madera_pin_single_group_names,
256 .func = 0x040
257 },
258 {
259 .name = "opclk-async",
260 .group_names = madera_pin_single_group_names,
261 .func = 0x041
262 },
263 {
264 .name = "pwm1",
265 .group_names = madera_pin_single_group_names,
266 .func = 0x048
267 },
268 {
269 .name = "pwm2",
270 .group_names = madera_pin_single_group_names,
271 .func = 0x049
272 },
273 {
274 .name = "spdif",
275 .group_names = madera_pin_single_group_names,
276 .func = 0x04c
277 },
278 {
279 .name = "asrc1-in1-lock",
280 .group_names = madera_pin_single_group_names,
281 .func = 0x088
282 },
283 {
284 .name = "asrc1-in2-lock",
285 .group_names = madera_pin_single_group_names,
286 .func = 0x089
287 },
288 {
289 .name = "asrc2-in1-lock",
290 .group_names = madera_pin_single_group_names,
291 .func = 0x08a
292 },
293 {
294 .name = "asrc2-in2-lock",
295 .group_names = madera_pin_single_group_names,
296 .func = 0x08b
297 },
298 {
299 .name = "spkl-short-circuit",
300 .group_names = madera_pin_single_group_names,
301 .func = 0x0b6
302 },
303 {
304 .name = "spkr-short-circuit",
305 .group_names = madera_pin_single_group_names,
306 .func = 0x0b7
307 },
308 {
309 .name = "spk-shutdown",
310 .group_names = madera_pin_single_group_names,
311 .func = 0x0e0
312 },
313 {
314 .name = "spk-overheat-shutdown",
315 .group_names = madera_pin_single_group_names,
316 .func = 0x0e1
317 },
318 {
319 .name = "spk-overheat-warn",
320 .group_names = madera_pin_single_group_names,
321 .func = 0x0e2
322 },
323 {
324 .name = "timer1-sts",
325 .group_names = madera_pin_single_group_names,
326 .func = 0x140
327 },
328 {
329 .name = "timer2-sts",
330 .group_names = madera_pin_single_group_names,
331 .func = 0x141
332 },
333 {
334 .name = "timer3-sts",
335 .group_names = madera_pin_single_group_names,
336 .func = 0x142
337 },
338 {
339 .name = "timer4-sts",
340 .group_names = madera_pin_single_group_names,
341 .func = 0x143
342 },
343 {
344 .name = "timer5-sts",
345 .group_names = madera_pin_single_group_names,
346 .func = 0x144
347 },
348 {
349 .name = "timer6-sts",
350 .group_names = madera_pin_single_group_names,
351 .func = 0x145
352 },
353 {
354 .name = "timer7-sts",
355 .group_names = madera_pin_single_group_names,
356 .func = 0x146
357 },
358 {
359 .name = "timer8-sts",
360 .group_names = madera_pin_single_group_names,
361 .func = 0x147
362 },
363 {
364 .name = "log1-fifo-ne",
365 .group_names = madera_pin_single_group_names,
366 .func = 0x150
367 },
368 {
369 .name = "log2-fifo-ne",
370 .group_names = madera_pin_single_group_names,
371 .func = 0x151
372 },
373 {
374 .name = "log3-fifo-ne",
375 .group_names = madera_pin_single_group_names,
376 .func = 0x152
377 },
378 {
379 .name = "log4-fifo-ne",
380 .group_names = madera_pin_single_group_names,
381 .func = 0x153
382 },
383 {
384 .name = "log5-fifo-ne",
385 .group_names = madera_pin_single_group_names,
386 .func = 0x154
387 },
388 {
389 .name = "log6-fifo-ne",
390 .group_names = madera_pin_single_group_names,
391 .func = 0x155
392 },
393 {
394 .name = "log7-fifo-ne",
395 .group_names = madera_pin_single_group_names,
396 .func = 0x156
397 },
398 {
399 .name = "log8-fifo-ne",
400 .group_names = madera_pin_single_group_names,
401 .func = 0x157
402 },
403};
404
405static u16 madera_pin_make_drv_str(struct madera_pin_private *priv,
406 unsigned int milliamps)
407{
408 switch (milliamps) {
409 case 4:
410 return 0;
411 case 8:
412 return 2 << MADERA_GP1_DRV_STR_SHIFT;
413 default:
414 break;
415 }
416
417 dev_warn(priv->dev, "%u mA not a valid drive strength", milliamps);
418
419 return 0;
420}
421
422static unsigned int madera_pin_unmake_drv_str(struct madera_pin_private *priv,
423 u16 regval)
424{
425 regval = (regval & MADERA_GP1_DRV_STR_MASK) >> MADERA_GP1_DRV_STR_SHIFT;
426
427 switch (regval) {
428 case 0:
429 return 4;
430 case 2:
431 return 8;
432 default:
433 return 0;
434 }
435}
436
437static int madera_get_groups_count(struct pinctrl_dev *pctldev)
438{
439 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
440
441 /* Number of alt function groups plus number of single-pin groups */
442 return priv->chip->n_pin_groups + priv->chip->n_pins;
443}
444
445static const char *madera_get_group_name(struct pinctrl_dev *pctldev,
446 unsigned int selector)
447{
448 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
449
450 if (selector < priv->chip->n_pin_groups)
451 return priv->chip->pin_groups[selector].name;
452
453 selector -= priv->chip->n_pin_groups;
454 return madera_pin_single_group_names[selector];
455}
456
457static int madera_get_group_pins(struct pinctrl_dev *pctldev,
458 unsigned int selector,
459 const unsigned int **pins,
460 unsigned int *num_pins)
461{
462 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
463
464 if (selector < priv->chip->n_pin_groups) {
465 *pins = priv->chip->pin_groups[selector].pins;
466 *num_pins = priv->chip->pin_groups[selector].n_pins;
467 } else {
468 /* return the dummy group for a single pin */
469 selector -= priv->chip->n_pin_groups;
470 *pins = &madera_pin_single_group_pins[selector];
471 *num_pins = 1;
472 }
473 return 0;
474}
475
476static void madera_pin_dbg_show_fn(struct madera_pin_private *priv,
477 struct seq_file *s,
478 unsigned int pin, unsigned int fn)
479{
480 const struct madera_pin_chip *chip = priv->chip;
481 int i, g_pin;
482
483 if (fn != 0) {
484 for (i = 0; i < ARRAY_SIZE(madera_mux_funcs); ++i) {
485 if (madera_mux_funcs[i].func == fn) {
486 seq_printf(s, " FN=%s",
487 madera_mux_funcs[i].name);
488 return;
489 }
490 }
491 return; /* ignore unknown function values */
492 }
493
494 /* alt function */
495 for (i = 0; i < chip->n_pin_groups; ++i) {
496 for (g_pin = 0; g_pin < chip->pin_groups[i].n_pins; ++g_pin) {
497 if (chip->pin_groups[i].pins[g_pin] == pin) {
498 seq_printf(s, " FN=%s",
499 chip->pin_groups[i].name);
500 return;
501 }
502 }
503 }
504}
505
506static void __maybe_unused madera_pin_dbg_show(struct pinctrl_dev *pctldev,
507 struct seq_file *s,
508 unsigned int pin)
509{
510 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
511 unsigned int conf[2];
512 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
513 unsigned int fn;
514 int ret;
515
516 ret = regmap_read(priv->madera->regmap, reg, &conf[0]);
517 if (ret)
518 return;
519
520 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]);
521 if (ret)
522 return;
523
524 seq_printf(s, "%04x:%04x", conf[0], conf[1]);
525
526 fn = (conf[0] & MADERA_GP1_FN_MASK) >> MADERA_GP1_FN_SHIFT;
527 madera_pin_dbg_show_fn(priv, s, pin, fn);
528
529 /* State of direction bit is only relevant if function==1 */
530 if (fn == 1) {
531 if (conf[1] & MADERA_GP1_DIR_MASK)
532 seq_puts(s, " IN");
533 else
534 seq_puts(s, " OUT");
535 }
536
537 if (conf[1] & MADERA_GP1_PU_MASK)
538 seq_puts(s, " PU");
539
540 if (conf[1] & MADERA_GP1_PD_MASK)
541 seq_puts(s, " PD");
542
543 if (conf[0] & MADERA_GP1_DB_MASK)
544 seq_puts(s, " DB");
545
546 if (conf[0] & MADERA_GP1_OP_CFG_MASK)
547 seq_puts(s, " OD");
548 else
549 seq_puts(s, " CMOS");
550
551 seq_printf(s, " DRV=%umA", madera_pin_unmake_drv_str(priv, conf[1]));
552
553 if (conf[0] & MADERA_GP1_IP_CFG_MASK)
305fa67e 554 seq_puts(s, " SCHMITT");
218d72a7
RF		 555}
556
557
558static const struct pinctrl_ops madera_pin_group_ops = {
559 .get_groups_count = madera_get_groups_count,
560 .get_group_name = madera_get_group_name,
561 .get_group_pins = madera_get_group_pins,
562#if IS_ENABLED(CONFIG_OF)
563 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
564 .dt_free_map = pinctrl_utils_free_map,
565#endif
566#if IS_ENABLED(CONFIG_DEBUG_FS)
567 .pin_dbg_show = madera_pin_dbg_show,
568#endif
569};
570
571static int madera_mux_get_funcs_count(struct pinctrl_dev *pctldev)
572{
573 return ARRAY_SIZE(madera_mux_funcs);
574}
575
576static const char *madera_mux_get_func_name(struct pinctrl_dev *pctldev,
577 unsigned int selector)
578{
579 return madera_mux_funcs[selector].name;
580}
581
582static int madera_mux_get_groups(struct pinctrl_dev *pctldev,
583 unsigned int selector,
584 const char * const **groups,
585 unsigned int * const num_groups)
586{
587 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
588
589 *groups = madera_mux_funcs[selector].group_names;
590
591 if (madera_mux_funcs[selector].func == 0) {
592 /* alt func always maps to a single group */
593 *num_groups = 1;
594 } else {
595 /* other funcs map to all available gpio pins */
596 *num_groups = priv->chip->n_pins;
597 }
598
599 return 0;
600}
601
602static int madera_mux_set_mux(struct pinctrl_dev *pctldev,
603 unsigned int selector,
604 unsigned int group)
605{
606 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
607 struct madera *madera = priv->madera;
608 const struct madera_pin_groups *pin_group = priv->chip->pin_groups;
609 unsigned int n_chip_groups = priv->chip->n_pin_groups;
610 const char *func_name = madera_mux_funcs[selector].name;
611 unsigned int reg;
4fe81669 612 int i, ret = 0;
218d72a7
RF		 613
614 dev_dbg(priv->dev, "%s selecting %u (%s) for group %u (%s)\n",
615 __func__, selector, func_name, group,
616 madera_get_group_name(pctldev, group));
617
618 if (madera_mux_funcs[selector].func == 0) {
619 /* alt func pin assignments are codec-specific */
620 for (i = 0; i < n_chip_groups; ++i) {
621 if (strcmp(func_name, pin_group->name) == 0)
622 break;
623
624 ++pin_group;
625 }
626
627 if (i == n_chip_groups)
628 return -EINVAL;
629
630 for (i = 0; i < pin_group->n_pins; ++i) {
631 reg = MADERA_GPIO1_CTRL_1 + (2 * pin_group->pins[i]);
632
633 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0\n",
634 __func__, reg);
635
636 ret = regmap_update_bits(madera->regmap, reg,
637 MADERA_GP1_FN_MASK, 0);
638 if (ret)
639 break;
640
641 }
642 } else {
643 /*
644 * for other funcs the group will be the gpio number and will
645 * be offset by the number of chip-specific functions at the
646 * start of the group list
647 */
648 group -= n_chip_groups;
649 reg = MADERA_GPIO1_CTRL_1 + (2 * group);
650
651 dev_dbg(priv->dev, "%s setting 0x%x func bits to 0x%x\n",
652 __func__, reg, madera_mux_funcs[selector].func);
653
654 ret = regmap_update_bits(madera->regmap,
655 reg,
656 MADERA_GP1_FN_MASK,
657 madera_mux_funcs[selector].func);
658 }
659
660 if (ret)
661 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
662
663 return ret;
664}
665
666static int madera_gpio_set_direction(struct pinctrl_dev *pctldev,
667 struct pinctrl_gpio_range *range,
668 unsigned int offset,
669 bool input)
670{
671 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
672 struct madera *madera = priv->madera;
673 unsigned int reg = MADERA_GPIO1_CTRL_2 + (2 * offset);
674 unsigned int val;
675 int ret;
676
677 if (input)
678 val = MADERA_GP1_DIR;
679 else
680 val = 0;
681
682 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_DIR_MASK, val);
683 if (ret)
684 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
685
686 return ret;
687}
688
689static int madera_gpio_request_enable(struct pinctrl_dev *pctldev,
690 struct pinctrl_gpio_range *range,
691 unsigned int offset)
692{
693 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
694 struct madera *madera = priv->madera;
695 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset);
696 int ret;
697
698 /* put the pin into GPIO mode */
699 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1);
700 if (ret)
701 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
702
703 return ret;
704}
705
706static void madera_gpio_disable_free(struct pinctrl_dev *pctldev,
707 struct pinctrl_gpio_range *range,
708 unsigned int offset)
709{
710 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
711 struct madera *madera = priv->madera;
712 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset);
713 int ret;
714
715 /* disable GPIO by setting to GPIO IN */
716 madera_gpio_set_direction(pctldev, range, offset, true);
717
718 ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1);
719 if (ret)
720 dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret);
721}
722
723static const struct pinmux_ops madera_pin_mux_ops = {
724 .get_functions_count = madera_mux_get_funcs_count,
725 .get_function_name = madera_mux_get_func_name,
726 .get_function_groups = madera_mux_get_groups,
727 .set_mux = madera_mux_set_mux,
728 .gpio_request_enable = madera_gpio_request_enable,
729 .gpio_disable_free = madera_gpio_disable_free,
730 .gpio_set_direction = madera_gpio_set_direction,
731 .strict = true, /* GPIO and other functions are exclusive */
732};
733
734static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin,
735 unsigned long *config)
736{
737 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
738 unsigned int param = pinconf_to_config_param(*config);
739 unsigned int result = 0;
740 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
741 unsigned int conf[2];
742 int ret;
743
744 ret = regmap_read(priv->madera->regmap, reg, &conf[0]);
745 if (!ret)
746 ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]);
747
748 if (ret) {
749 dev_err(priv->dev, "Failed to read GP%d conf (%d)\n",
750 pin + 1, ret);
751 return ret;
752 }
753
754 switch (param) {
755 case PIN_CONFIG_BIAS_BUS_HOLD:
756 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
757 if (conf[1] == (MADERA_GP1_PU | MADERA_GP1_PD))
758 result = 1;
759 break;
760 case PIN_CONFIG_BIAS_DISABLE:
761 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
762 if (!conf[1])
763 result = 1;
764 break;
765 case PIN_CONFIG_BIAS_PULL_DOWN:
766 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
767 if (conf[1] == MADERA_GP1_PD_MASK)
768 result = 1;
769 break;
770 case PIN_CONFIG_BIAS_PULL_UP:
771 conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
772 if (conf[1] == MADERA_GP1_PU_MASK)
773 result = 1;
774 break;
775 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
776 if (conf[0] & MADERA_GP1_OP_CFG_MASK)
777 result = 1;
778 break;
779 case PIN_CONFIG_DRIVE_PUSH_PULL:
780 if (!(conf[0] & MADERA_GP1_OP_CFG_MASK))
781 result = 1;
782 break;
783 case PIN_CONFIG_DRIVE_STRENGTH:
784 result = madera_pin_unmake_drv_str(priv, conf[1]);
785 break;
786 case PIN_CONFIG_INPUT_DEBOUNCE:
787 if (conf[0] & MADERA_GP1_DB_MASK)
788 result = 1;
789 break;
790 case PIN_CONFIG_INPUT_ENABLE:
791 if (conf[0] & MADERA_GP1_DIR_MASK)
792 result = 1;
793 break;
794 case PIN_CONFIG_INPUT_SCHMITT:
795 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
796 if (conf[0] & MADERA_GP1_IP_CFG_MASK)
797 result = 1;
798 break;
799 case PIN_CONFIG_OUTPUT:
800 if ((conf[1] & MADERA_GP1_DIR_MASK) &&
801 (conf[0] & MADERA_GP1_LVL_MASK))
802 result = 1;
803 break;
804 default:
d2f7a822 805 return -ENOTSUPP;
218d72a7
RF		 806 }
807
808 *config = pinconf_to_config_packed(param, result);
809
810 return 0;
811}
812
813static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin,
814 unsigned long *configs, unsigned int num_configs)
815{
816 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
817 u16 conf[2] = {0, 0};
818 u16 mask[2] = {0, 0};
819 unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin);
820 unsigned int val;
821 int ret;
822
823 while (num_configs) {
824 dev_dbg(priv->dev, "%s config 0x%lx\n", __func__, *configs);
825
826 switch (pinconf_to_config_param(*configs)) {
827 case PIN_CONFIG_BIAS_BUS_HOLD:
828 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
829 conf[1] |= MADERA_GP1_PU | MADERA_GP1_PD;
830 break;
831 case PIN_CONFIG_BIAS_DISABLE:
832 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
833 conf[1] &= ~(MADERA_GP1_PU | MADERA_GP1_PD);
834 break;
835 case PIN_CONFIG_BIAS_PULL_DOWN:
836 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
837 conf[1] |= MADERA_GP1_PD;
838 conf[1] &= ~MADERA_GP1_PU;
839 break;
840 case PIN_CONFIG_BIAS_PULL_UP:
841 mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK;
842 conf[1] |= MADERA_GP1_PU;
843 conf[1] &= ~MADERA_GP1_PD;
844 break;
845 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
846 mask[0] |= MADERA_GP1_OP_CFG_MASK;
847 conf[0] |= MADERA_GP1_OP_CFG;
848 break;
849 case PIN_CONFIG_DRIVE_PUSH_PULL:
850 mask[0] |= MADERA_GP1_OP_CFG_MASK;
851 conf[0] &= ~MADERA_GP1_OP_CFG;
852 break;
853 case PIN_CONFIG_DRIVE_STRENGTH:
854 val = pinconf_to_config_argument(*configs);
855 mask[1] |= MADERA_GP1_DRV_STR_MASK;
856 conf[1] &= ~MADERA_GP1_DRV_STR_MASK;
857 conf[1] |= madera_pin_make_drv_str(priv, val);
858 break;
859 case PIN_CONFIG_INPUT_DEBOUNCE:
860 mask[0] |= MADERA_GP1_DB_MASK;
861
862 /*
863 * we can't configure debounce time per-pin so value
864 * is just a flag
865 */
866 val = pinconf_to_config_argument(*configs);
867 if (val)
868 conf[0] |= MADERA_GP1_DB;
869 else
870 conf[0] &= ~MADERA_GP1_DB;
871 break;
872 case PIN_CONFIG_INPUT_ENABLE:
873 val = pinconf_to_config_argument(*configs);
874 mask[1] |= MADERA_GP1_DIR_MASK;
875 if (val)
876 conf[1] |= MADERA_GP1_DIR;
877 else
878 conf[1] &= ~MADERA_GP1_DIR;
879 break;
880 case PIN_CONFIG_INPUT_SCHMITT:
881 val = pinconf_to_config_argument(*configs);
882 mask[0] |= MADERA_GP1_IP_CFG;
883 if (val)
884 conf[0] |= MADERA_GP1_IP_CFG;
885 else
886 conf[0] &= ~MADERA_GP1_IP_CFG;
887
888 mask[1] |= MADERA_GP1_DIR_MASK;
889 conf[1] |= MADERA_GP1_DIR;
890 break;
891 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
892 mask[0] |= MADERA_GP1_IP_CFG;
893 conf[0] |= MADERA_GP1_IP_CFG;
894 mask[1] |= MADERA_GP1_DIR_MASK;
895 conf[1] |= MADERA_GP1_DIR;
896 break;
897 case PIN_CONFIG_OUTPUT:
898 val = pinconf_to_config_argument(*configs);
899 mask[0] |= MADERA_GP1_LVL_MASK;
900 if (val)
901 conf[0] |= MADERA_GP1_LVL;
902 else
903 conf[0] &= ~MADERA_GP1_LVL;
904
905 mask[1] |= MADERA_GP1_DIR_MASK;
906 conf[1] &= ~MADERA_GP1_DIR;
907 break;
908 default:
d2f7a822 909 return -ENOTSUPP;
218d72a7
RF		 910 }
911
912 ++configs;
913 --num_configs;
914 }
915
916 dev_dbg(priv->dev,
917 "%s gpio%d 0x%x:0x%x 0x%x:0x%x\n",
918 __func__, pin + 1, reg, conf[0], reg + 1, conf[1]);
919
920 ret = regmap_update_bits(priv->madera->regmap, reg, mask[0], conf[0]);
921 if (ret)
922 goto err;
923
924 ++reg;
925 ret = regmap_update_bits(priv->madera->regmap, reg, mask[1], conf[1]);
926 if (ret)
927 goto err;
928
929 return 0;
930
931err:
932 dev_err(priv->dev,
933 "Failed to write GPIO%d conf (%d) reg 0x%x\n",
934 pin + 1, ret, reg);
935
936 return ret;
937}
938
939static int madera_pin_conf_group_set(struct pinctrl_dev *pctldev,
940 unsigned int selector,
941 unsigned long *configs,
942 unsigned int num_configs)
943{
944 struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev);
945 const struct madera_pin_groups *pin_group;
946 unsigned int n_groups = priv->chip->n_pin_groups;
947 int i, ret;
948
949 dev_dbg(priv->dev, "%s setting group %s\n", __func__,
950 madera_get_group_name(pctldev, selector));
951
952 if (selector >= n_groups) {
953 /* group is a single pin, convert to pin number and set */
954 return madera_pin_conf_set(pctldev,
955 selector - n_groups,
956 configs,
957 num_configs);
958 } else {
959 pin_group = &priv->chip->pin_groups[selector];
960
961 for (i = 0; i < pin_group->n_pins; ++i) {
962 ret = madera_pin_conf_set(pctldev,
963 pin_group->pins[i],
964 configs,
965 num_configs);
966 if (ret)
967 return ret;
968 }
969 }
970
971 return 0;
972}
973
974static const struct pinconf_ops madera_pin_conf_ops = {
25cb9e5a 975 .is_generic = true,
218d72a7
RF		 976 .pin_config_get = madera_pin_conf_get,
977 .pin_config_set = madera_pin_conf_set,
978 .pin_config_group_set = madera_pin_conf_group_set,
218d72a7
RF		 979};
980
981static struct pinctrl_desc madera_pin_desc = {
982 .name = "madera-pinctrl",
983 .pins = madera_pins,
984 .pctlops = &madera_pin_group_ops,
985 .pmxops = &madera_pin_mux_ops,
986 .confops = &madera_pin_conf_ops,
987 .owner = THIS_MODULE,
988};
989
990static int madera_pin_probe(struct platform_device *pdev)
991{
992 struct madera *madera = dev_get_drvdata(pdev->dev.parent);
993 const struct madera_pdata *pdata = dev_get_platdata(madera->dev);
994 struct madera_pin_private *priv;
995 int ret;
996
997 BUILD_BUG_ON(ARRAY_SIZE(madera_pin_single_group_names) !=
998 ARRAY_SIZE(madera_pin_single_group_pins));
999
1000 dev_dbg(&pdev->dev, "%s\n", __func__);
1001
1002 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1003 if (!priv)
1004 return -ENOMEM;
1005
1006 priv->dev = &pdev->dev;
1007 priv->madera = madera;
1008 pdev->dev.of_node = madera->dev->of_node;
1009
1010 switch (madera->type) {
1011 case CS47L35:
1012 if (IS_ENABLED(CONFIG_PINCTRL_CS47L35))
1013 priv->chip = &cs47l35_pin_chip;
1014 break;
1015 case CS47L85:
1016 case WM1840:
1017 if (IS_ENABLED(CONFIG_PINCTRL_CS47L85))
1018 priv->chip = &cs47l85_pin_chip;
1019 break;
1020 case CS47L90:
1021 case CS47L91:
1022 if (IS_ENABLED(CONFIG_PINCTRL_CS47L90))
1023 priv->chip = &cs47l90_pin_chip;
1024 break;
1025 default:
1026 break;
1027 }
1028
1029 if (!priv->chip)
1030 return -ENODEV;
1031
1032 madera_pin_desc.npins = priv->chip->n_pins;
1033
1034 ret = devm_pinctrl_register_and_init(&pdev->dev,
1035 &madera_pin_desc,
1036 priv,
1037 &priv->pctl);
1038 if (ret) {
1039 dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret);
1040 return ret;
1041 }
1042
1043 /* if the configuration is provided through pdata, apply it */
5bc5a671 1044 if (pdata && pdata->gpio_configs) {
218d72a7
RF		 1045 ret = pinctrl_register_mappings(pdata->gpio_configs,
1046 pdata->n_gpio_configs);
1047 if (ret) {
1048 dev_err(priv->dev,
1049 "Failed to register pdata mappings (%d)\n",
1050 ret);
1051 return ret;
1052 }
1053 }
1054
1055 ret = pinctrl_enable(priv->pctl);
1056 if (ret) {
1057 dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret);
1058 return ret;
1059 }
1060
1061 dev_dbg(priv->dev, "pinctrl probed ok\n");
1062
1063 return 0;
1064}
1065
1066static struct platform_driver madera_pin_driver = {
1067 .probe = madera_pin_probe,
1068 .driver = {
1069 .name = "madera-pinctrl",
1070 },
1071};
1072
1073module_platform_driver(madera_pin_driver);
1074
1075MODULE_DESCRIPTION("Madera pinctrl driver");
1076MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
1077MODULE_LICENSE("GPL v2");
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