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gpiolib: provide provision to register pin ranges
[mirror_ubuntu-bionic-kernel.git] / drivers / pinctrl / core.c
CommitLineData
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1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
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5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
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10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
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12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
a5a697cd 17#include <linux/export.h>
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18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/slab.h>
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21#include <linux/err.h>
22#include <linux/list.h>
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23#include <linux/sysfs.h>
24#include <linux/debugfs.h>
25#include <linux/seq_file.h>
6d4ca1fb 26#include <linux/pinctrl/consumer.h>
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27#include <linux/pinctrl/pinctrl.h>
28#include <linux/pinctrl/machine.h>
29#include "core.h"
57291ce2 30#include "devicetree.h"
2744e8af 31#include "pinmux.h"
ae6b4d85 32#include "pinconf.h"
2744e8af 33
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SW
34/**
35 * struct pinctrl_maps - a list item containing part of the mapping table
36 * @node: mapping table list node
37 * @maps: array of mapping table entries
38 * @num_maps: the number of entries in @maps
39 */
40struct pinctrl_maps {
41 struct list_head node;
42 struct pinctrl_map const *maps;
43 unsigned num_maps;
44};
45
5b3aa5f7
DA
46static bool pinctrl_dummy_state;
47
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48/* Mutex taken by all entry points */
49DEFINE_MUTEX(pinctrl_mutex);
50
51/* Global list of pin control devices (struct pinctrl_dev) */
57291ce2 52LIST_HEAD(pinctrldev_list);
2744e8af 53
57b676f9 54/* List of pin controller handles (struct pinctrl) */
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55static LIST_HEAD(pinctrl_list);
56
57b676f9 57/* List of pinctrl maps (struct pinctrl_maps) */
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58static LIST_HEAD(pinctrl_maps);
59
60#define for_each_maps(_maps_node_, _i_, _map_) \
61 list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
62 for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
63 _i_ < _maps_node_->num_maps; \
bc66468c 64 _i_++, _map_ = &_maps_node_->maps[_i_])
befe5bdf 65
5b3aa5f7
DA
66/**
67 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
68 *
69 * Usually this function is called by platforms without pinctrl driver support
70 * but run with some shared drivers using pinctrl APIs.
71 * After calling this function, the pinctrl core will return successfully
72 * with creating a dummy state for the driver to keep going smoothly.
73 */
74void pinctrl_provide_dummies(void)
75{
76 pinctrl_dummy_state = true;
77}
78
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79const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
80{
81 /* We're not allowed to register devices without name */
82 return pctldev->desc->name;
83}
84EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
85
86void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
87{
88 return pctldev->driver_data;
89}
90EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
91
92/**
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93 * get_pinctrl_dev_from_devname() - look up pin controller device
94 * @devname: the name of a device instance, as returned by dev_name()
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95 *
96 * Looks up a pin control device matching a certain device name or pure device
97 * pointer, the pure device pointer will take precedence.
98 */
9dfac4fd 99struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
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100{
101 struct pinctrl_dev *pctldev = NULL;
102 bool found = false;
103
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104 if (!devname)
105 return NULL;
106
2744e8af 107 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 108 if (!strcmp(dev_name(pctldev->dev), devname)) {
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109 /* Matched on device name */
110 found = true;
111 break;
112 }
113 }
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114
115 return found ? pctldev : NULL;
116}
117
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118/**
119 * pin_get_from_name() - look up a pin number from a name
120 * @pctldev: the pin control device to lookup the pin on
121 * @name: the name of the pin to look up
122 */
123int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
124{
706e8520 125 unsigned i, pin;
ae6b4d85 126
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127 /* The pin number can be retrived from the pin controller descriptor */
128 for (i = 0; i < pctldev->desc->npins; i++) {
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129 struct pin_desc *desc;
130
706e8520 131 pin = pctldev->desc->pins[i].number;
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132 desc = pin_desc_get(pctldev, pin);
133 /* Pin space may be sparse */
134 if (desc == NULL)
135 continue;
136 if (desc->name && !strcmp(name, desc->name))
137 return pin;
138 }
139
140 return -EINVAL;
141}
142
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DA
143/**
144 * pin_get_name_from_id() - look up a pin name from a pin id
145 * @pctldev: the pin control device to lookup the pin on
146 * @name: the name of the pin to look up
147 */
148const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
149{
150 const struct pin_desc *desc;
151
152 desc = pin_desc_get(pctldev, pin);
153 if (desc == NULL) {
154 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
155 pin);
156 return NULL;
157 }
158
159 return desc->name;
160}
161
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162/**
163 * pin_is_valid() - check if pin exists on controller
164 * @pctldev: the pin control device to check the pin on
165 * @pin: pin to check, use the local pin controller index number
166 *
167 * This tells us whether a certain pin exist on a certain pin controller or
168 * not. Pin lists may be sparse, so some pins may not exist.
169 */
170bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
171{
172 struct pin_desc *pindesc;
173
174 if (pin < 0)
175 return false;
176
57b676f9 177 mutex_lock(&pinctrl_mutex);
2744e8af 178 pindesc = pin_desc_get(pctldev, pin);
57b676f9 179 mutex_unlock(&pinctrl_mutex);
2744e8af 180
57b676f9 181 return pindesc != NULL;
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182}
183EXPORT_SYMBOL_GPL(pin_is_valid);
184
185/* Deletes a range of pin descriptors */
186static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
187 const struct pinctrl_pin_desc *pins,
188 unsigned num_pins)
189{
190 int i;
191
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192 for (i = 0; i < num_pins; i++) {
193 struct pin_desc *pindesc;
194
195 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
196 pins[i].number);
197 if (pindesc != NULL) {
198 radix_tree_delete(&pctldev->pin_desc_tree,
199 pins[i].number);
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200 if (pindesc->dynamic_name)
201 kfree(pindesc->name);
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202 }
203 kfree(pindesc);
204 }
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205}
206
207static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
208 unsigned number, const char *name)
209{
210 struct pin_desc *pindesc;
211
212 pindesc = pin_desc_get(pctldev, number);
213 if (pindesc != NULL) {
214 pr_err("pin %d already registered on %s\n", number,
215 pctldev->desc->name);
216 return -EINVAL;
217 }
218
219 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
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220 if (pindesc == NULL) {
221 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 222 return -ENOMEM;
95dcd4ae 223 }
ae6b4d85 224
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225 /* Set owner */
226 pindesc->pctldev = pctldev;
227
9af1e44f 228 /* Copy basic pin info */
8dc6ae4d 229 if (name) {
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230 pindesc->name = name;
231 } else {
232 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
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233 if (pindesc->name == NULL) {
234 kfree(pindesc);
ca53c5f1 235 return -ENOMEM;
eb26cc9c 236 }
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237 pindesc->dynamic_name = true;
238 }
2744e8af 239
2744e8af 240 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 241 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 242 number, pindesc->name, pctldev->desc->name);
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243 return 0;
244}
245
246static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
247 struct pinctrl_pin_desc const *pins,
248 unsigned num_descs)
249{
250 unsigned i;
251 int ret = 0;
252
253 for (i = 0; i < num_descs; i++) {
254 ret = pinctrl_register_one_pin(pctldev,
255 pins[i].number, pins[i].name);
256 if (ret)
257 return ret;
258 }
259
260 return 0;
261}
262
263/**
264 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
265 * @pctldev: pin controller device to check
266 * @gpio: gpio pin to check taken from the global GPIO pin space
267 *
268 * Tries to match a GPIO pin number to the ranges handled by a certain pin
269 * controller, return the range or NULL
270 */
271static struct pinctrl_gpio_range *
272pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
273{
274 struct pinctrl_gpio_range *range = NULL;
275
276 /* Loop over the ranges */
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277 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
278 /* Check if we're in the valid range */
279 if (gpio >= range->base &&
280 gpio < range->base + range->npins) {
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281 return range;
282 }
283 }
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284
285 return NULL;
286}
287
288/**
289 * pinctrl_get_device_gpio_range() - find device for GPIO range
290 * @gpio: the pin to locate the pin controller for
291 * @outdev: the pin control device if found
292 * @outrange: the GPIO range if found
293 *
294 * Find the pin controller handling a certain GPIO pin from the pinspace of
295 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
296 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
297 * may still have not been registered.
2744e8af 298 */
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299static int pinctrl_get_device_gpio_range(unsigned gpio,
300 struct pinctrl_dev **outdev,
301 struct pinctrl_gpio_range **outrange)
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302{
303 struct pinctrl_dev *pctldev = NULL;
304
305 /* Loop over the pin controllers */
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306 list_for_each_entry(pctldev, &pinctrldev_list, node) {
307 struct pinctrl_gpio_range *range;
308
309 range = pinctrl_match_gpio_range(pctldev, gpio);
310 if (range != NULL) {
311 *outdev = pctldev;
312 *outrange = range;
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313 return 0;
314 }
315 }
2744e8af 316
4650b7cb 317 return -EPROBE_DEFER;
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318}
319
320/**
321 * pinctrl_add_gpio_range() - register a GPIO range for a controller
322 * @pctldev: pin controller device to add the range to
323 * @range: the GPIO range to add
324 *
325 * This adds a range of GPIOs to be handled by a certain pin controller. Call
326 * this to register handled ranges after registering your pin controller.
327 */
328void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
329 struct pinctrl_gpio_range *range)
330{
57b676f9 331 mutex_lock(&pinctrl_mutex);
8b9c139f 332 list_add_tail(&range->node, &pctldev->gpio_ranges);
57b676f9 333 mutex_unlock(&pinctrl_mutex);
2744e8af 334}
4ecce45d 335EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 336
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DA
337void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
338 struct pinctrl_gpio_range *ranges,
339 unsigned nranges)
340{
341 int i;
342
343 for (i = 0; i < nranges; i++)
344 pinctrl_add_gpio_range(pctldev, &ranges[i]);
345}
346EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
347
f23f1516
SH
348struct pinctrl_dev *find_pinctrl_and_add_gpio_range(const char *devname,
349 struct pinctrl_gpio_range *range)
350{
351 struct pinctrl_dev *pctldev = get_pinctrl_dev_from_devname(devname);
352
353 if (!pctldev)
354 return NULL;
355
356 pinctrl_add_gpio_range(pctldev, range);
357 return pctldev;
358}
359EXPORT_SYMBOL_GPL(find_pinctrl_and_add_gpio_range);
360
7e10ee68
VK
361/**
362 * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
363 * @pctldev: pin controller device to remove the range from
364 * @range: the GPIO range to remove
365 */
366void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
367 struct pinctrl_gpio_range *range)
368{
369 mutex_lock(&pinctrl_mutex);
370 list_del(&range->node);
371 mutex_unlock(&pinctrl_mutex);
372}
373EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
374
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375/**
376 * pinctrl_get_group_selector() - returns the group selector for a group
377 * @pctldev: the pin controller handling the group
378 * @pin_group: the pin group to look up
379 */
380int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
381 const char *pin_group)
382{
383 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 384 unsigned ngroups = pctlops->get_groups_count(pctldev);
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385 unsigned group_selector = 0;
386
d1e90e9e 387 while (group_selector < ngroups) {
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LW
388 const char *gname = pctlops->get_group_name(pctldev,
389 group_selector);
390 if (!strcmp(gname, pin_group)) {
51cd24ee 391 dev_dbg(pctldev->dev,
7afde8ba
LW
392 "found group selector %u for %s\n",
393 group_selector,
394 pin_group);
395 return group_selector;
396 }
397
398 group_selector++;
399 }
400
51cd24ee 401 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
402 pin_group);
403
404 return -EINVAL;
405}
406
befe5bdf
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407/**
408 * pinctrl_request_gpio() - request a single pin to be used in as GPIO
409 * @gpio: the GPIO pin number from the GPIO subsystem number space
410 *
411 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
412 * as part of their gpio_request() semantics, platforms and individual drivers
413 * shall *NOT* request GPIO pins to be muxed in.
414 */
415int pinctrl_request_gpio(unsigned gpio)
416{
417 struct pinctrl_dev *pctldev;
418 struct pinctrl_gpio_range *range;
419 int ret;
420 int pin;
421
57b676f9
SW
422 mutex_lock(&pinctrl_mutex);
423
befe5bdf 424 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9
SW
425 if (ret) {
426 mutex_unlock(&pinctrl_mutex);
4650b7cb 427 return ret;
57b676f9 428 }
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LW
429
430 /* Convert to the pin controllers number space */
431 pin = gpio - range->base + range->pin_base;
432
57b676f9
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433 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
434
435 mutex_unlock(&pinctrl_mutex);
436 return ret;
befe5bdf
LW
437}
438EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
439
440/**
441 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
442 * @gpio: the GPIO pin number from the GPIO subsystem number space
443 *
444 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
445 * as part of their gpio_free() semantics, platforms and individual drivers
446 * shall *NOT* request GPIO pins to be muxed out.
447 */
448void pinctrl_free_gpio(unsigned gpio)
449{
450 struct pinctrl_dev *pctldev;
451 struct pinctrl_gpio_range *range;
452 int ret;
453 int pin;
454
57b676f9
SW
455 mutex_lock(&pinctrl_mutex);
456
befe5bdf 457 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9
SW
458 if (ret) {
459 mutex_unlock(&pinctrl_mutex);
befe5bdf 460 return;
57b676f9 461 }
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LW
462
463 /* Convert to the pin controllers number space */
464 pin = gpio - range->base + range->pin_base;
465
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SW
466 pinmux_free_gpio(pctldev, pin, range);
467
468 mutex_unlock(&pinctrl_mutex);
befe5bdf
LW
469}
470EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
471
472static int pinctrl_gpio_direction(unsigned gpio, bool input)
473{
474 struct pinctrl_dev *pctldev;
475 struct pinctrl_gpio_range *range;
476 int ret;
477 int pin;
478
479 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
480 if (ret)
481 return ret;
482
483 /* Convert to the pin controllers number space */
484 pin = gpio - range->base + range->pin_base;
485
486 return pinmux_gpio_direction(pctldev, range, pin, input);
487}
488
489/**
490 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
491 * @gpio: the GPIO pin number from the GPIO subsystem number space
492 *
493 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
494 * as part of their gpio_direction_input() semantics, platforms and individual
495 * drivers shall *NOT* touch pin control GPIO calls.
496 */
497int pinctrl_gpio_direction_input(unsigned gpio)
498{
57b676f9
SW
499 int ret;
500 mutex_lock(&pinctrl_mutex);
501 ret = pinctrl_gpio_direction(gpio, true);
502 mutex_unlock(&pinctrl_mutex);
503 return ret;
befe5bdf
LW
504}
505EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
506
507/**
508 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
509 * @gpio: the GPIO pin number from the GPIO subsystem number space
510 *
511 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
512 * as part of their gpio_direction_output() semantics, platforms and individual
513 * drivers shall *NOT* touch pin control GPIO calls.
514 */
515int pinctrl_gpio_direction_output(unsigned gpio)
516{
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SW
517 int ret;
518 mutex_lock(&pinctrl_mutex);
519 ret = pinctrl_gpio_direction(gpio, false);
520 mutex_unlock(&pinctrl_mutex);
521 return ret;
befe5bdf
LW
522}
523EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
524
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525static struct pinctrl_state *find_state(struct pinctrl *p,
526 const char *name)
befe5bdf 527{
6e5e959d
SW
528 struct pinctrl_state *state;
529
530 list_for_each_entry(state, &p->states, node)
531 if (!strcmp(state->name, name))
532 return state;
533
534 return NULL;
535}
536
537static struct pinctrl_state *create_state(struct pinctrl *p,
538 const char *name)
539{
540 struct pinctrl_state *state;
541
542 state = kzalloc(sizeof(*state), GFP_KERNEL);
543 if (state == NULL) {
544 dev_err(p->dev,
545 "failed to alloc struct pinctrl_state\n");
546 return ERR_PTR(-ENOMEM);
547 }
548
549 state->name = name;
550 INIT_LIST_HEAD(&state->settings);
551
552 list_add_tail(&state->node, &p->states);
553
554 return state;
555}
556
557static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
558{
559 struct pinctrl_state *state;
7ecdb16f 560 struct pinctrl_setting *setting;
6e5e959d 561 int ret;
befe5bdf 562
6e5e959d
SW
563 state = find_state(p, map->name);
564 if (!state)
565 state = create_state(p, map->name);
566 if (IS_ERR(state))
567 return PTR_ERR(state);
befe5bdf 568
1e2082b5
SW
569 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
570 return 0;
571
6e5e959d
SW
572 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
573 if (setting == NULL) {
574 dev_err(p->dev,
575 "failed to alloc struct pinctrl_setting\n");
576 return -ENOMEM;
577 }
befe5bdf 578
1e2082b5
SW
579 setting->type = map->type;
580
6e5e959d
SW
581 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
582 if (setting->pctldev == NULL) {
c05127c4 583 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
6e5e959d
SW
584 map->ctrl_dev_name);
585 kfree(setting);
c05127c4
LW
586 /*
587 * OK let us guess that the driver is not there yet, and
588 * let's defer obtaining this pinctrl handle to later...
589 */
590 return -EPROBE_DEFER;
6e5e959d
SW
591 }
592
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LW
593 setting->dev_name = map->dev_name;
594
1e2082b5
SW
595 switch (map->type) {
596 case PIN_MAP_TYPE_MUX_GROUP:
597 ret = pinmux_map_to_setting(map, setting);
598 break;
599 case PIN_MAP_TYPE_CONFIGS_PIN:
600 case PIN_MAP_TYPE_CONFIGS_GROUP:
601 ret = pinconf_map_to_setting(map, setting);
602 break;
603 default:
604 ret = -EINVAL;
605 break;
606 }
6e5e959d
SW
607 if (ret < 0) {
608 kfree(setting);
609 return ret;
610 }
611
612 list_add_tail(&setting->node, &state->settings);
613
614 return 0;
615}
616
617static struct pinctrl *find_pinctrl(struct device *dev)
618{
619 struct pinctrl *p;
620
1e2082b5 621 list_for_each_entry(p, &pinctrl_list, node)
6e5e959d
SW
622 if (p->dev == dev)
623 return p;
624
625 return NULL;
626}
627
628static void pinctrl_put_locked(struct pinctrl *p, bool inlist);
629
630static struct pinctrl *create_pinctrl(struct device *dev)
631{
632 struct pinctrl *p;
633 const char *devname;
634 struct pinctrl_maps *maps_node;
635 int i;
636 struct pinctrl_map const *map;
637 int ret;
befe5bdf
LW
638
639 /*
640 * create the state cookie holder struct pinctrl for each
641 * mapping, this is what consumers will get when requesting
642 * a pin control handle with pinctrl_get()
643 */
02f5b989 644 p = kzalloc(sizeof(*p), GFP_KERNEL);
95dcd4ae
SW
645 if (p == NULL) {
646 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 647 return ERR_PTR(-ENOMEM);
95dcd4ae 648 }
7ecdb16f 649 p->dev = dev;
6e5e959d 650 INIT_LIST_HEAD(&p->states);
57291ce2
SW
651 INIT_LIST_HEAD(&p->dt_maps);
652
653 ret = pinctrl_dt_to_map(p);
654 if (ret < 0) {
655 kfree(p);
656 return ERR_PTR(ret);
657 }
6e5e959d
SW
658
659 devname = dev_name(dev);
befe5bdf
LW
660
661 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 662 for_each_maps(maps_node, i, map) {
7ecdb16f
SW
663 /* Map must be for this device */
664 if (strcmp(map->dev_name, devname))
665 continue;
666
6e5e959d
SW
667 ret = add_setting(p, map);
668 if (ret < 0) {
669 pinctrl_put_locked(p, false);
670 return ERR_PTR(ret);
7ecdb16f 671 }
befe5bdf
LW
672 }
673
befe5bdf 674 /* Add the pinmux to the global list */
8b9c139f 675 list_add_tail(&p->node, &pinctrl_list);
befe5bdf
LW
676
677 return p;
6e5e959d 678}
7ecdb16f 679
6e5e959d
SW
680static struct pinctrl *pinctrl_get_locked(struct device *dev)
681{
682 struct pinctrl *p;
7ecdb16f 683
6e5e959d
SW
684 if (WARN_ON(!dev))
685 return ERR_PTR(-EINVAL);
686
687 p = find_pinctrl(dev);
688 if (p != NULL)
689 return ERR_PTR(-EBUSY);
7ecdb16f 690
d599bfb3 691 return create_pinctrl(dev);
befe5bdf 692}
b2b3e66e
SW
693
694/**
6e5e959d
SW
695 * pinctrl_get() - retrieves the pinctrl handle for a device
696 * @dev: the device to obtain the handle for
b2b3e66e 697 */
6e5e959d 698struct pinctrl *pinctrl_get(struct device *dev)
b2b3e66e
SW
699{
700 struct pinctrl *p;
701
57b676f9 702 mutex_lock(&pinctrl_mutex);
6e5e959d 703 p = pinctrl_get_locked(dev);
57b676f9 704 mutex_unlock(&pinctrl_mutex);
b2b3e66e
SW
705
706 return p;
707}
befe5bdf
LW
708EXPORT_SYMBOL_GPL(pinctrl_get);
709
6e5e959d 710static void pinctrl_put_locked(struct pinctrl *p, bool inlist)
befe5bdf 711{
6e5e959d
SW
712 struct pinctrl_state *state, *n1;
713 struct pinctrl_setting *setting, *n2;
714
715 list_for_each_entry_safe(state, n1, &p->states, node) {
716 list_for_each_entry_safe(setting, n2, &state->settings, node) {
1e2082b5
SW
717 switch (setting->type) {
718 case PIN_MAP_TYPE_MUX_GROUP:
719 if (state == p->state)
720 pinmux_disable_setting(setting);
721 pinmux_free_setting(setting);
722 break;
723 case PIN_MAP_TYPE_CONFIGS_PIN:
724 case PIN_MAP_TYPE_CONFIGS_GROUP:
725 pinconf_free_setting(setting);
726 break;
727 default:
728 break;
729 }
6e5e959d
SW
730 list_del(&setting->node);
731 kfree(setting);
732 }
733 list_del(&state->node);
734 kfree(state);
7ecdb16f 735 }
befe5bdf 736
57291ce2
SW
737 pinctrl_dt_free_maps(p);
738
6e5e959d
SW
739 if (inlist)
740 list_del(&p->node);
befe5bdf
LW
741 kfree(p);
742}
befe5bdf
LW
743
744/**
6e5e959d
SW
745 * pinctrl_put() - release a previously claimed pinctrl handle
746 * @p: the pinctrl handle to release
befe5bdf 747 */
57b676f9
SW
748void pinctrl_put(struct pinctrl *p)
749{
750 mutex_lock(&pinctrl_mutex);
6e5e959d 751 pinctrl_put_locked(p, true);
57b676f9
SW
752 mutex_unlock(&pinctrl_mutex);
753}
754EXPORT_SYMBOL_GPL(pinctrl_put);
755
6e5e959d
SW
756static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p,
757 const char *name)
befe5bdf 758{
6e5e959d 759 struct pinctrl_state *state;
befe5bdf 760
6e5e959d 761 state = find_state(p, name);
5b3aa5f7
DA
762 if (!state) {
763 if (pinctrl_dummy_state) {
764 /* create dummy state */
765 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
766 name);
767 state = create_state(p, name);
d599bfb3
RG
768 } else
769 state = ERR_PTR(-ENODEV);
5b3aa5f7 770 }
57b676f9 771
6e5e959d 772 return state;
befe5bdf 773}
befe5bdf
LW
774
775/**
6e5e959d
SW
776 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
777 * @p: the pinctrl handle to retrieve the state from
778 * @name: the state name to retrieve
befe5bdf 779 */
6e5e959d 780struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name)
57b676f9 781{
6e5e959d
SW
782 struct pinctrl_state *s;
783
57b676f9 784 mutex_lock(&pinctrl_mutex);
6e5e959d 785 s = pinctrl_lookup_state_locked(p, name);
57b676f9 786 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
787
788 return s;
57b676f9 789}
6e5e959d 790EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
57b676f9 791
6e5e959d
SW
792static int pinctrl_select_state_locked(struct pinctrl *p,
793 struct pinctrl_state *state)
befe5bdf 794{
6e5e959d
SW
795 struct pinctrl_setting *setting, *setting2;
796 int ret;
7ecdb16f 797
6e5e959d
SW
798 if (p->state == state)
799 return 0;
befe5bdf 800
6e5e959d
SW
801 if (p->state) {
802 /*
803 * The set of groups with a mux configuration in the old state
804 * may not be identical to the set of groups with a mux setting
805 * in the new state. While this might be unusual, it's entirely
806 * possible for the "user"-supplied mapping table to be written
807 * that way. For each group that was configured in the old state
808 * but not in the new state, this code puts that group into a
809 * safe/disabled state.
810 */
811 list_for_each_entry(setting, &p->state->settings, node) {
812 bool found = false;
1e2082b5
SW
813 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
814 continue;
6e5e959d 815 list_for_each_entry(setting2, &state->settings, node) {
1e2082b5
SW
816 if (setting2->type != PIN_MAP_TYPE_MUX_GROUP)
817 continue;
818 if (setting2->data.mux.group ==
819 setting->data.mux.group) {
6e5e959d
SW
820 found = true;
821 break;
822 }
823 }
824 if (!found)
825 pinmux_disable_setting(setting);
826 }
827 }
828
829 p->state = state;
830
831 /* Apply all the settings for the new state */
832 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
833 switch (setting->type) {
834 case PIN_MAP_TYPE_MUX_GROUP:
835 ret = pinmux_enable_setting(setting);
836 break;
837 case PIN_MAP_TYPE_CONFIGS_PIN:
838 case PIN_MAP_TYPE_CONFIGS_GROUP:
839 ret = pinconf_apply_setting(setting);
840 break;
841 default:
842 ret = -EINVAL;
843 break;
844 }
6e5e959d
SW
845 if (ret < 0) {
846 /* FIXME: Difficult to return to prev state */
847 return ret;
848 }
befe5bdf 849 }
6e5e959d
SW
850
851 return 0;
57b676f9
SW
852}
853
854/**
6e5e959d
SW
855 * pinctrl_select() - select/activate/program a pinctrl state to HW
856 * @p: the pinctrl handle for the device that requests configuratio
857 * @state: the state handle to select/activate/program
57b676f9 858 */
6e5e959d 859int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
57b676f9 860{
6e5e959d
SW
861 int ret;
862
57b676f9 863 mutex_lock(&pinctrl_mutex);
6e5e959d 864 ret = pinctrl_select_state_locked(p, state);
57b676f9 865 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
866
867 return ret;
befe5bdf 868}
6e5e959d 869EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 870
6d4ca1fb
SW
871static void devm_pinctrl_release(struct device *dev, void *res)
872{
873 pinctrl_put(*(struct pinctrl **)res);
874}
875
876/**
877 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
878 * @dev: the device to obtain the handle for
879 *
880 * If there is a need to explicitly destroy the returned struct pinctrl,
881 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
882 */
883struct pinctrl *devm_pinctrl_get(struct device *dev)
884{
885 struct pinctrl **ptr, *p;
886
887 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
888 if (!ptr)
889 return ERR_PTR(-ENOMEM);
890
891 p = pinctrl_get(dev);
892 if (!IS_ERR(p)) {
893 *ptr = p;
894 devres_add(dev, ptr);
895 } else {
896 devres_free(ptr);
897 }
898
899 return p;
900}
901EXPORT_SYMBOL_GPL(devm_pinctrl_get);
902
903static int devm_pinctrl_match(struct device *dev, void *res, void *data)
904{
905 struct pinctrl **p = res;
906
907 return *p == data;
908}
909
910/**
911 * devm_pinctrl_put() - Resource managed pinctrl_put()
912 * @p: the pinctrl handle to release
913 *
914 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
915 * this function will not need to be called and the resource management
916 * code will ensure that the resource is freed.
917 */
918void devm_pinctrl_put(struct pinctrl *p)
919{
920 WARN_ON(devres_destroy(p->dev, devm_pinctrl_release,
921 devm_pinctrl_match, p));
922 pinctrl_put(p);
923}
924EXPORT_SYMBOL_GPL(devm_pinctrl_put);
925
57291ce2
SW
926int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
927 bool dup, bool locked)
befe5bdf 928{
1e2082b5 929 int i, ret;
b2b3e66e 930 struct pinctrl_maps *maps_node;
befe5bdf
LW
931
932 pr_debug("add %d pinmux maps\n", num_maps);
933
934 /* First sanity check the new mapping */
935 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
936 if (!maps[i].dev_name) {
937 pr_err("failed to register map %s (%d): no device given\n",
938 maps[i].name, i);
939 return -EINVAL;
940 }
941
befe5bdf
LW
942 if (!maps[i].name) {
943 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 944 i);
befe5bdf
LW
945 return -EINVAL;
946 }
947
1e2082b5
SW
948 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
949 !maps[i].ctrl_dev_name) {
befe5bdf
LW
950 pr_err("failed to register map %s (%d): no pin control device given\n",
951 maps[i].name, i);
952 return -EINVAL;
953 }
954
1e2082b5
SW
955 switch (maps[i].type) {
956 case PIN_MAP_TYPE_DUMMY_STATE:
957 break;
958 case PIN_MAP_TYPE_MUX_GROUP:
959 ret = pinmux_validate_map(&maps[i], i);
960 if (ret < 0)
fde04f41 961 return ret;
1e2082b5
SW
962 break;
963 case PIN_MAP_TYPE_CONFIGS_PIN:
964 case PIN_MAP_TYPE_CONFIGS_GROUP:
965 ret = pinconf_validate_map(&maps[i], i);
966 if (ret < 0)
fde04f41 967 return ret;
1e2082b5
SW
968 break;
969 default:
970 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 971 maps[i].name, i);
1681f5ae
SW
972 return -EINVAL;
973 }
befe5bdf
LW
974 }
975
b2b3e66e
SW
976 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
977 if (!maps_node) {
978 pr_err("failed to alloc struct pinctrl_maps\n");
979 return -ENOMEM;
980 }
befe5bdf 981
b2b3e66e 982 maps_node->num_maps = num_maps;
57291ce2
SW
983 if (dup) {
984 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
985 GFP_KERNEL);
986 if (!maps_node->maps) {
987 pr_err("failed to duplicate mapping table\n");
988 kfree(maps_node);
989 return -ENOMEM;
990 }
991 } else {
992 maps_node->maps = maps;
befe5bdf
LW
993 }
994
57291ce2
SW
995 if (!locked)
996 mutex_lock(&pinctrl_mutex);
b2b3e66e 997 list_add_tail(&maps_node->node, &pinctrl_maps);
57291ce2
SW
998 if (!locked)
999 mutex_unlock(&pinctrl_mutex);
b2b3e66e 1000
befe5bdf
LW
1001 return 0;
1002}
1003
57291ce2
SW
1004/**
1005 * pinctrl_register_mappings() - register a set of pin controller mappings
1006 * @maps: the pincontrol mappings table to register. This should probably be
1007 * marked with __initdata so it can be discarded after boot. This
1008 * function will perform a shallow copy for the mapping entries.
1009 * @num_maps: the number of maps in the mapping table
1010 */
1011int pinctrl_register_mappings(struct pinctrl_map const *maps,
1012 unsigned num_maps)
1013{
1014 return pinctrl_register_map(maps, num_maps, true, false);
1015}
1016
1017void pinctrl_unregister_map(struct pinctrl_map const *map)
1018{
1019 struct pinctrl_maps *maps_node;
1020
1021 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1022 if (maps_node->maps == map) {
1023 list_del(&maps_node->node);
1024 return;
1025 }
1026 }
1027}
1028
2744e8af
LW
1029#ifdef CONFIG_DEBUG_FS
1030
1031static int pinctrl_pins_show(struct seq_file *s, void *what)
1032{
1033 struct pinctrl_dev *pctldev = s->private;
1034 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1035 unsigned i, pin;
2744e8af
LW
1036
1037 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1038
57b676f9
SW
1039 mutex_lock(&pinctrl_mutex);
1040
706e8520
CP
1041 /* The pin number can be retrived from the pin controller descriptor */
1042 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1043 struct pin_desc *desc;
1044
706e8520 1045 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1046 desc = pin_desc_get(pctldev, pin);
1047 /* Pin space may be sparse */
1048 if (desc == NULL)
1049 continue;
1050
1051 seq_printf(s, "pin %d (%s) ", pin,
1052 desc->name ? desc->name : "unnamed");
1053
1054 /* Driver-specific info per pin */
1055 if (ops->pin_dbg_show)
1056 ops->pin_dbg_show(pctldev, s, pin);
1057
1058 seq_puts(s, "\n");
1059 }
1060
57b676f9
SW
1061 mutex_unlock(&pinctrl_mutex);
1062
2744e8af
LW
1063 return 0;
1064}
1065
1066static int pinctrl_groups_show(struct seq_file *s, void *what)
1067{
1068 struct pinctrl_dev *pctldev = s->private;
1069 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1070 unsigned ngroups, selector = 0;
2744e8af 1071
d1e90e9e 1072 ngroups = ops->get_groups_count(pctldev);
57b676f9
SW
1073 mutex_lock(&pinctrl_mutex);
1074
2744e8af 1075 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1076 while (selector < ngroups) {
a5818a8b 1077 const unsigned *pins;
2744e8af
LW
1078 unsigned num_pins;
1079 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1080 const char *pname;
2744e8af
LW
1081 int ret;
1082 int i;
1083
1084 ret = ops->get_group_pins(pctldev, selector,
1085 &pins, &num_pins);
1086 if (ret)
1087 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1088 gname);
1089 else {
dcb5dbc3
DA
1090 seq_printf(s, "group: %s\n", gname);
1091 for (i = 0; i < num_pins; i++) {
1092 pname = pin_get_name(pctldev, pins[i]);
b4dd784b
WY
1093 if (WARN_ON(!pname)) {
1094 mutex_unlock(&pinctrl_mutex);
dcb5dbc3 1095 return -EINVAL;
b4dd784b 1096 }
dcb5dbc3
DA
1097 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1098 }
1099 seq_puts(s, "\n");
2744e8af
LW
1100 }
1101 selector++;
1102 }
1103
57b676f9 1104 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1105
1106 return 0;
1107}
1108
1109static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1110{
1111 struct pinctrl_dev *pctldev = s->private;
1112 struct pinctrl_gpio_range *range = NULL;
1113
1114 seq_puts(s, "GPIO ranges handled:\n");
1115
57b676f9
SW
1116 mutex_lock(&pinctrl_mutex);
1117
2744e8af 1118 /* Loop over the ranges */
2744e8af 1119 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
75d6642a
LW
1120 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1121 range->id, range->name,
1122 range->base, (range->base + range->npins - 1),
1123 range->pin_base,
1124 (range->pin_base + range->npins - 1));
2744e8af 1125 }
57b676f9
SW
1126
1127 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1128
1129 return 0;
1130}
1131
1132static int pinctrl_devices_show(struct seq_file *s, void *what)
1133{
1134 struct pinctrl_dev *pctldev;
1135
ae6b4d85 1136 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9
SW
1137
1138 mutex_lock(&pinctrl_mutex);
1139
2744e8af
LW
1140 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1141 seq_printf(s, "%s ", pctldev->desc->name);
1142 if (pctldev->desc->pmxops)
ae6b4d85
LW
1143 seq_puts(s, "yes ");
1144 else
1145 seq_puts(s, "no ");
1146 if (pctldev->desc->confops)
2744e8af
LW
1147 seq_puts(s, "yes");
1148 else
1149 seq_puts(s, "no");
1150 seq_puts(s, "\n");
1151 }
57b676f9
SW
1152
1153 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1154
1155 return 0;
1156}
1157
1e2082b5
SW
1158static inline const char *map_type(enum pinctrl_map_type type)
1159{
1160 static const char * const names[] = {
1161 "INVALID",
1162 "DUMMY_STATE",
1163 "MUX_GROUP",
1164 "CONFIGS_PIN",
1165 "CONFIGS_GROUP",
1166 };
1167
1168 if (type >= ARRAY_SIZE(names))
1169 return "UNKNOWN";
1170
1171 return names[type];
1172}
1173
3eedb437
SW
1174static int pinctrl_maps_show(struct seq_file *s, void *what)
1175{
1176 struct pinctrl_maps *maps_node;
1177 int i;
1178 struct pinctrl_map const *map;
1179
1180 seq_puts(s, "Pinctrl maps:\n");
1181
57b676f9
SW
1182 mutex_lock(&pinctrl_mutex);
1183
3eedb437 1184 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1185 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1186 map->dev_name, map->name, map_type(map->type),
1187 map->type);
1188
1189 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1190 seq_printf(s, "controlling device %s\n",
1191 map->ctrl_dev_name);
1192
1193 switch (map->type) {
1194 case PIN_MAP_TYPE_MUX_GROUP:
1195 pinmux_show_map(s, map);
1196 break;
1197 case PIN_MAP_TYPE_CONFIGS_PIN:
1198 case PIN_MAP_TYPE_CONFIGS_GROUP:
1199 pinconf_show_map(s, map);
1200 break;
1201 default:
1202 break;
1203 }
1204
1205 seq_printf(s, "\n");
3eedb437 1206 }
57b676f9
SW
1207
1208 mutex_unlock(&pinctrl_mutex);
3eedb437
SW
1209
1210 return 0;
1211}
1212
befe5bdf
LW
1213static int pinctrl_show(struct seq_file *s, void *what)
1214{
1215 struct pinctrl *p;
6e5e959d 1216 struct pinctrl_state *state;
7ecdb16f 1217 struct pinctrl_setting *setting;
befe5bdf
LW
1218
1219 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9
SW
1220
1221 mutex_lock(&pinctrl_mutex);
1222
befe5bdf 1223 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1224 seq_printf(s, "device: %s current state: %s\n",
1225 dev_name(p->dev),
1226 p->state ? p->state->name : "none");
1227
1228 list_for_each_entry(state, &p->states, node) {
1229 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1230
6e5e959d 1231 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1232 struct pinctrl_dev *pctldev = setting->pctldev;
1233
1234 seq_printf(s, " type: %s controller %s ",
1235 map_type(setting->type),
1236 pinctrl_dev_get_name(pctldev));
1237
1238 switch (setting->type) {
1239 case PIN_MAP_TYPE_MUX_GROUP:
1240 pinmux_show_setting(s, setting);
1241 break;
1242 case PIN_MAP_TYPE_CONFIGS_PIN:
1243 case PIN_MAP_TYPE_CONFIGS_GROUP:
1244 pinconf_show_setting(s, setting);
1245 break;
1246 default:
1247 break;
1248 }
6e5e959d 1249 }
befe5bdf 1250 }
befe5bdf
LW
1251 }
1252
57b676f9
SW
1253 mutex_unlock(&pinctrl_mutex);
1254
befe5bdf
LW
1255 return 0;
1256}
1257
2744e8af
LW
1258static int pinctrl_pins_open(struct inode *inode, struct file *file)
1259{
1260 return single_open(file, pinctrl_pins_show, inode->i_private);
1261}
1262
1263static int pinctrl_groups_open(struct inode *inode, struct file *file)
1264{
1265 return single_open(file, pinctrl_groups_show, inode->i_private);
1266}
1267
1268static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1269{
1270 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1271}
1272
1273static int pinctrl_devices_open(struct inode *inode, struct file *file)
1274{
1275 return single_open(file, pinctrl_devices_show, NULL);
1276}
1277
3eedb437
SW
1278static int pinctrl_maps_open(struct inode *inode, struct file *file)
1279{
1280 return single_open(file, pinctrl_maps_show, NULL);
1281}
1282
befe5bdf
LW
1283static int pinctrl_open(struct inode *inode, struct file *file)
1284{
1285 return single_open(file, pinctrl_show, NULL);
1286}
1287
2744e8af
LW
1288static const struct file_operations pinctrl_pins_ops = {
1289 .open = pinctrl_pins_open,
1290 .read = seq_read,
1291 .llseek = seq_lseek,
1292 .release = single_release,
1293};
1294
1295static const struct file_operations pinctrl_groups_ops = {
1296 .open = pinctrl_groups_open,
1297 .read = seq_read,
1298 .llseek = seq_lseek,
1299 .release = single_release,
1300};
1301
1302static const struct file_operations pinctrl_gpioranges_ops = {
1303 .open = pinctrl_gpioranges_open,
1304 .read = seq_read,
1305 .llseek = seq_lseek,
1306 .release = single_release,
1307};
1308
3eedb437
SW
1309static const struct file_operations pinctrl_devices_ops = {
1310 .open = pinctrl_devices_open,
befe5bdf
LW
1311 .read = seq_read,
1312 .llseek = seq_lseek,
1313 .release = single_release,
1314};
1315
3eedb437
SW
1316static const struct file_operations pinctrl_maps_ops = {
1317 .open = pinctrl_maps_open,
2744e8af
LW
1318 .read = seq_read,
1319 .llseek = seq_lseek,
1320 .release = single_release,
1321};
1322
befe5bdf
LW
1323static const struct file_operations pinctrl_ops = {
1324 .open = pinctrl_open,
1325 .read = seq_read,
1326 .llseek = seq_lseek,
1327 .release = single_release,
1328};
1329
2744e8af
LW
1330static struct dentry *debugfs_root;
1331
1332static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1333{
02157160 1334 struct dentry *device_root;
2744e8af 1335
51cd24ee 1336 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1337 debugfs_root);
02157160
TL
1338 pctldev->device_root = device_root;
1339
2744e8af
LW
1340 if (IS_ERR(device_root) || !device_root) {
1341 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1342 dev_name(pctldev->dev));
2744e8af
LW
1343 return;
1344 }
1345 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1346 device_root, pctldev, &pinctrl_pins_ops);
1347 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1348 device_root, pctldev, &pinctrl_groups_ops);
1349 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1350 device_root, pctldev, &pinctrl_gpioranges_ops);
1351 pinmux_init_device_debugfs(device_root, pctldev);
ae6b4d85 1352 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1353}
1354
02157160
TL
1355static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1356{
1357 debugfs_remove_recursive(pctldev->device_root);
1358}
1359
2744e8af
LW
1360static void pinctrl_init_debugfs(void)
1361{
1362 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1363 if (IS_ERR(debugfs_root) || !debugfs_root) {
1364 pr_warn("failed to create debugfs directory\n");
1365 debugfs_root = NULL;
1366 return;
1367 }
1368
1369 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1370 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1371 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1372 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1373 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1374 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1375}
1376
1377#else /* CONFIG_DEBUG_FS */
1378
1379static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1380{
1381}
1382
1383static void pinctrl_init_debugfs(void)
1384{
1385}
1386
02157160
TL
1387static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1388{
1389}
1390
2744e8af
LW
1391#endif
1392
d26bc49f
SW
1393static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1394{
1395 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1396
1397 if (!ops ||
d1e90e9e 1398 !ops->get_groups_count ||
d26bc49f
SW
1399 !ops->get_group_name ||
1400 !ops->get_group_pins)
1401 return -EINVAL;
1402
57291ce2
SW
1403 if (ops->dt_node_to_map && !ops->dt_free_map)
1404 return -EINVAL;
1405
d26bc49f
SW
1406 return 0;
1407}
1408
2744e8af
LW
1409/**
1410 * pinctrl_register() - register a pin controller device
1411 * @pctldesc: descriptor for this pin controller
1412 * @dev: parent device for this pin controller
1413 * @driver_data: private pin controller data for this pin controller
1414 */
1415struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1416 struct device *dev, void *driver_data)
1417{
2744e8af
LW
1418 struct pinctrl_dev *pctldev;
1419 int ret;
1420
da9aecb0 1421 if (!pctldesc)
2744e8af 1422 return NULL;
da9aecb0 1423 if (!pctldesc->name)
2744e8af
LW
1424 return NULL;
1425
02f5b989 1426 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1427 if (pctldev == NULL) {
1428 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
b9130b77 1429 return NULL;
95dcd4ae 1430 }
b9130b77
TL
1431
1432 /* Initialize pin control device struct */
1433 pctldev->owner = pctldesc->owner;
1434 pctldev->desc = pctldesc;
1435 pctldev->driver_data = driver_data;
1436 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1437 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77
TL
1438 pctldev->dev = dev;
1439
d26bc49f 1440 /* check core ops for sanity */
da9aecb0 1441 if (pinctrl_check_ops(pctldev)) {
ad6e1107 1442 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1443 goto out_err;
1444 }
1445
2744e8af
LW
1446 /* If we're implementing pinmuxing, check the ops for sanity */
1447 if (pctldesc->pmxops) {
da9aecb0 1448 if (pinmux_check_ops(pctldev))
b9130b77 1449 goto out_err;
2744e8af
LW
1450 }
1451
ae6b4d85
LW
1452 /* If we're implementing pinconfig, check the ops for sanity */
1453 if (pctldesc->confops) {
da9aecb0 1454 if (pinconf_check_ops(pctldev))
b9130b77 1455 goto out_err;
ae6b4d85
LW
1456 }
1457
2744e8af 1458 /* Register all the pins */
ad6e1107 1459 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1460 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1461 if (ret) {
ad6e1107 1462 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1463 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1464 pctldesc->npins);
51cd24ee 1465 goto out_err;
2744e8af
LW
1466 }
1467
57b676f9
SW
1468 mutex_lock(&pinctrl_mutex);
1469
8b9c139f 1470 list_add_tail(&pctldev->node, &pinctrldev_list);
57b676f9 1471
6e5e959d
SW
1472 pctldev->p = pinctrl_get_locked(pctldev->dev);
1473 if (!IS_ERR(pctldev->p)) {
1474 struct pinctrl_state *s =
1475 pinctrl_lookup_state_locked(pctldev->p,
1476 PINCTRL_STATE_DEFAULT);
ad6e1107
JC
1477 if (IS_ERR(s)) {
1478 dev_dbg(dev, "failed to lookup the default state\n");
1479 } else {
da9aecb0 1480 if (pinctrl_select_state_locked(pctldev->p, s))
ad6e1107
JC
1481 dev_err(dev,
1482 "failed to select default state\n");
ad6e1107 1483 }
6e5e959d 1484 }
57b676f9
SW
1485
1486 mutex_unlock(&pinctrl_mutex);
1487
2304b473
SW
1488 pinctrl_init_device_debugfs(pctldev);
1489
2744e8af
LW
1490 return pctldev;
1491
51cd24ee
SW
1492out_err:
1493 kfree(pctldev);
2744e8af
LW
1494 return NULL;
1495}
1496EXPORT_SYMBOL_GPL(pinctrl_register);
1497
1498/**
1499 * pinctrl_unregister() - unregister pinmux
1500 * @pctldev: pin controller to unregister
1501 *
1502 * Called by pinmux drivers to unregister a pinmux.
1503 */
1504void pinctrl_unregister(struct pinctrl_dev *pctldev)
1505{
5d589b09 1506 struct pinctrl_gpio_range *range, *n;
2744e8af
LW
1507 if (pctldev == NULL)
1508 return;
1509
02157160 1510 pinctrl_remove_device_debugfs(pctldev);
57b676f9
SW
1511
1512 mutex_lock(&pinctrl_mutex);
1513
6e5e959d
SW
1514 if (!IS_ERR(pctldev->p))
1515 pinctrl_put_locked(pctldev->p, true);
57b676f9 1516
2744e8af 1517 /* TODO: check that no pinmuxes are still active? */
2744e8af 1518 list_del(&pctldev->node);
2744e8af
LW
1519 /* Destroy descriptor tree */
1520 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1521 pctldev->desc->npins);
5d589b09
DA
1522 /* remove gpio ranges map */
1523 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
1524 list_del(&range->node);
1525
51cd24ee 1526 kfree(pctldev);
57b676f9
SW
1527
1528 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1529}
1530EXPORT_SYMBOL_GPL(pinctrl_unregister);
1531
1532static int __init pinctrl_init(void)
1533{
1534 pr_info("initialized pinctrl subsystem\n");
1535 pinctrl_init_debugfs();
1536 return 0;
1537}
1538
1539/* init early since many drivers really need to initialized pinmux early */
1540core_initcall(pinctrl_init);