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Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/pinctrl/pinctrl.h> | |
27 | #include <linux/pinctrl/machine.h> | |
28 | #include "core.h" | |
57291ce2 | 29 | #include "devicetree.h" |
2744e8af | 30 | #include "pinmux.h" |
ae6b4d85 | 31 | #include "pinconf.h" |
2744e8af | 32 | |
b2b3e66e SW |
33 | /** |
34 | * struct pinctrl_maps - a list item containing part of the mapping table | |
35 | * @node: mapping table list node | |
36 | * @maps: array of mapping table entries | |
37 | * @num_maps: the number of entries in @maps | |
38 | */ | |
39 | struct pinctrl_maps { | |
40 | struct list_head node; | |
41 | struct pinctrl_map const *maps; | |
42 | unsigned num_maps; | |
43 | }; | |
44 | ||
57b676f9 SW |
45 | /* Mutex taken by all entry points */ |
46 | DEFINE_MUTEX(pinctrl_mutex); | |
47 | ||
48 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 49 | LIST_HEAD(pinctrldev_list); |
2744e8af | 50 | |
57b676f9 | 51 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
52 | static LIST_HEAD(pinctrl_list); |
53 | ||
57b676f9 | 54 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
55 | static LIST_HEAD(pinctrl_maps); |
56 | ||
57 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
58 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
59 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
60 | _i_ < _maps_node_->num_maps; \ | |
61 | i++, _map_ = &_maps_node_->maps[_i_]) | |
befe5bdf | 62 | |
2744e8af LW |
63 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
64 | { | |
65 | /* We're not allowed to register devices without name */ | |
66 | return pctldev->desc->name; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
69 | ||
70 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
71 | { | |
72 | return pctldev->driver_data; | |
73 | } | |
74 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
75 | ||
76 | /** | |
9dfac4fd LW |
77 | * get_pinctrl_dev_from_devname() - look up pin controller device |
78 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
79 | * |
80 | * Looks up a pin control device matching a certain device name or pure device | |
81 | * pointer, the pure device pointer will take precedence. | |
82 | */ | |
9dfac4fd | 83 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
84 | { |
85 | struct pinctrl_dev *pctldev = NULL; | |
86 | bool found = false; | |
87 | ||
9dfac4fd LW |
88 | if (!devname) |
89 | return NULL; | |
90 | ||
2744e8af | 91 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 92 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
93 | /* Matched on device name */ |
94 | found = true; | |
95 | break; | |
96 | } | |
97 | } | |
2744e8af LW |
98 | |
99 | return found ? pctldev : NULL; | |
100 | } | |
101 | ||
ae6b4d85 LW |
102 | /** |
103 | * pin_get_from_name() - look up a pin number from a name | |
104 | * @pctldev: the pin control device to lookup the pin on | |
105 | * @name: the name of the pin to look up | |
106 | */ | |
107 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
108 | { | |
706e8520 | 109 | unsigned i, pin; |
ae6b4d85 | 110 | |
706e8520 CP |
111 | /* The pin number can be retrived from the pin controller descriptor */ |
112 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
113 | struct pin_desc *desc; |
114 | ||
706e8520 | 115 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
116 | desc = pin_desc_get(pctldev, pin); |
117 | /* Pin space may be sparse */ | |
118 | if (desc == NULL) | |
119 | continue; | |
120 | if (desc->name && !strcmp(name, desc->name)) | |
121 | return pin; | |
122 | } | |
123 | ||
124 | return -EINVAL; | |
125 | } | |
126 | ||
2744e8af LW |
127 | /** |
128 | * pin_is_valid() - check if pin exists on controller | |
129 | * @pctldev: the pin control device to check the pin on | |
130 | * @pin: pin to check, use the local pin controller index number | |
131 | * | |
132 | * This tells us whether a certain pin exist on a certain pin controller or | |
133 | * not. Pin lists may be sparse, so some pins may not exist. | |
134 | */ | |
135 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
136 | { | |
137 | struct pin_desc *pindesc; | |
138 | ||
139 | if (pin < 0) | |
140 | return false; | |
141 | ||
57b676f9 | 142 | mutex_lock(&pinctrl_mutex); |
2744e8af | 143 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 144 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 145 | |
57b676f9 | 146 | return pindesc != NULL; |
2744e8af LW |
147 | } |
148 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
149 | ||
150 | /* Deletes a range of pin descriptors */ | |
151 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
152 | const struct pinctrl_pin_desc *pins, | |
153 | unsigned num_pins) | |
154 | { | |
155 | int i; | |
156 | ||
2744e8af LW |
157 | for (i = 0; i < num_pins; i++) { |
158 | struct pin_desc *pindesc; | |
159 | ||
160 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
161 | pins[i].number); | |
162 | if (pindesc != NULL) { | |
163 | radix_tree_delete(&pctldev->pin_desc_tree, | |
164 | pins[i].number); | |
ca53c5f1 LW |
165 | if (pindesc->dynamic_name) |
166 | kfree(pindesc->name); | |
2744e8af LW |
167 | } |
168 | kfree(pindesc); | |
169 | } | |
2744e8af LW |
170 | } |
171 | ||
172 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
173 | unsigned number, const char *name) | |
174 | { | |
175 | struct pin_desc *pindesc; | |
176 | ||
177 | pindesc = pin_desc_get(pctldev, number); | |
178 | if (pindesc != NULL) { | |
179 | pr_err("pin %d already registered on %s\n", number, | |
180 | pctldev->desc->name); | |
181 | return -EINVAL; | |
182 | } | |
183 | ||
184 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
185 | if (pindesc == NULL) { |
186 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 187 | return -ENOMEM; |
95dcd4ae | 188 | } |
ae6b4d85 | 189 | |
2744e8af LW |
190 | /* Set owner */ |
191 | pindesc->pctldev = pctldev; | |
192 | ||
9af1e44f | 193 | /* Copy basic pin info */ |
8dc6ae4d | 194 | if (name) { |
ca53c5f1 LW |
195 | pindesc->name = name; |
196 | } else { | |
197 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
198 | if (pindesc->name == NULL) | |
199 | return -ENOMEM; | |
200 | pindesc->dynamic_name = true; | |
201 | } | |
2744e8af | 202 | |
2744e8af | 203 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 204 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 205 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
206 | return 0; |
207 | } | |
208 | ||
209 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
210 | struct pinctrl_pin_desc const *pins, | |
211 | unsigned num_descs) | |
212 | { | |
213 | unsigned i; | |
214 | int ret = 0; | |
215 | ||
216 | for (i = 0; i < num_descs; i++) { | |
217 | ret = pinctrl_register_one_pin(pctldev, | |
218 | pins[i].number, pins[i].name); | |
219 | if (ret) | |
220 | return ret; | |
221 | } | |
222 | ||
223 | return 0; | |
224 | } | |
225 | ||
226 | /** | |
227 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
228 | * @pctldev: pin controller device to check | |
229 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
230 | * | |
231 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
232 | * controller, return the range or NULL | |
233 | */ | |
234 | static struct pinctrl_gpio_range * | |
235 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
236 | { | |
237 | struct pinctrl_gpio_range *range = NULL; | |
238 | ||
239 | /* Loop over the ranges */ | |
2744e8af LW |
240 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
241 | /* Check if we're in the valid range */ | |
242 | if (gpio >= range->base && | |
243 | gpio < range->base + range->npins) { | |
2744e8af LW |
244 | return range; |
245 | } | |
246 | } | |
2744e8af LW |
247 | |
248 | return NULL; | |
249 | } | |
250 | ||
251 | /** | |
252 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
253 | * @gpio: the pin to locate the pin controller for | |
254 | * @outdev: the pin control device if found | |
255 | * @outrange: the GPIO range if found | |
256 | * | |
257 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
258 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
259 | * negative if the GPIO range could not be found in any device. | |
260 | */ | |
4ecce45d SW |
261 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
262 | struct pinctrl_dev **outdev, | |
263 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
264 | { |
265 | struct pinctrl_dev *pctldev = NULL; | |
266 | ||
267 | /* Loop over the pin controllers */ | |
2744e8af LW |
268 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
269 | struct pinctrl_gpio_range *range; | |
270 | ||
271 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
272 | if (range != NULL) { | |
273 | *outdev = pctldev; | |
274 | *outrange = range; | |
2744e8af LW |
275 | return 0; |
276 | } | |
277 | } | |
2744e8af LW |
278 | |
279 | return -EINVAL; | |
280 | } | |
281 | ||
282 | /** | |
283 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
284 | * @pctldev: pin controller device to add the range to | |
285 | * @range: the GPIO range to add | |
286 | * | |
287 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
288 | * this to register handled ranges after registering your pin controller. | |
289 | */ | |
290 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
291 | struct pinctrl_gpio_range *range) | |
292 | { | |
57b676f9 | 293 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 294 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 295 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 296 | } |
4ecce45d | 297 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af LW |
298 | |
299 | /** | |
300 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
301 | * @pctldev: pin controller device to remove the range from | |
302 | * @range: the GPIO range to remove | |
303 | */ | |
304 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
305 | struct pinctrl_gpio_range *range) | |
306 | { | |
57b676f9 | 307 | mutex_lock(&pinctrl_mutex); |
2744e8af | 308 | list_del(&range->node); |
57b676f9 | 309 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 310 | } |
4ecce45d | 311 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); |
2744e8af | 312 | |
7afde8ba LW |
313 | /** |
314 | * pinctrl_get_group_selector() - returns the group selector for a group | |
315 | * @pctldev: the pin controller handling the group | |
316 | * @pin_group: the pin group to look up | |
317 | */ | |
318 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
319 | const char *pin_group) | |
320 | { | |
321 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 322 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
323 | unsigned group_selector = 0; |
324 | ||
d1e90e9e | 325 | while (group_selector < ngroups) { |
7afde8ba LW |
326 | const char *gname = pctlops->get_group_name(pctldev, |
327 | group_selector); | |
328 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 329 | dev_dbg(pctldev->dev, |
7afde8ba LW |
330 | "found group selector %u for %s\n", |
331 | group_selector, | |
332 | pin_group); | |
333 | return group_selector; | |
334 | } | |
335 | ||
336 | group_selector++; | |
337 | } | |
338 | ||
51cd24ee | 339 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
340 | pin_group); |
341 | ||
342 | return -EINVAL; | |
343 | } | |
344 | ||
befe5bdf LW |
345 | /** |
346 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
347 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
348 | * | |
349 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
350 | * as part of their gpio_request() semantics, platforms and individual drivers | |
351 | * shall *NOT* request GPIO pins to be muxed in. | |
352 | */ | |
353 | int pinctrl_request_gpio(unsigned gpio) | |
354 | { | |
355 | struct pinctrl_dev *pctldev; | |
356 | struct pinctrl_gpio_range *range; | |
357 | int ret; | |
358 | int pin; | |
359 | ||
57b676f9 SW |
360 | mutex_lock(&pinctrl_mutex); |
361 | ||
befe5bdf | 362 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
363 | if (ret) { |
364 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 365 | return -EINVAL; |
57b676f9 | 366 | } |
befe5bdf LW |
367 | |
368 | /* Convert to the pin controllers number space */ | |
369 | pin = gpio - range->base + range->pin_base; | |
370 | ||
57b676f9 SW |
371 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
372 | ||
373 | mutex_unlock(&pinctrl_mutex); | |
374 | return ret; | |
befe5bdf LW |
375 | } |
376 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
377 | ||
378 | /** | |
379 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
380 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
381 | * | |
382 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
383 | * as part of their gpio_free() semantics, platforms and individual drivers | |
384 | * shall *NOT* request GPIO pins to be muxed out. | |
385 | */ | |
386 | void pinctrl_free_gpio(unsigned gpio) | |
387 | { | |
388 | struct pinctrl_dev *pctldev; | |
389 | struct pinctrl_gpio_range *range; | |
390 | int ret; | |
391 | int pin; | |
392 | ||
57b676f9 SW |
393 | mutex_lock(&pinctrl_mutex); |
394 | ||
befe5bdf | 395 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
396 | if (ret) { |
397 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 398 | return; |
57b676f9 | 399 | } |
befe5bdf LW |
400 | |
401 | /* Convert to the pin controllers number space */ | |
402 | pin = gpio - range->base + range->pin_base; | |
403 | ||
57b676f9 SW |
404 | pinmux_free_gpio(pctldev, pin, range); |
405 | ||
406 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
407 | } |
408 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
409 | ||
410 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
411 | { | |
412 | struct pinctrl_dev *pctldev; | |
413 | struct pinctrl_gpio_range *range; | |
414 | int ret; | |
415 | int pin; | |
416 | ||
417 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
418 | if (ret) | |
419 | return ret; | |
420 | ||
421 | /* Convert to the pin controllers number space */ | |
422 | pin = gpio - range->base + range->pin_base; | |
423 | ||
424 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
425 | } | |
426 | ||
427 | /** | |
428 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
429 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
430 | * | |
431 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
432 | * as part of their gpio_direction_input() semantics, platforms and individual | |
433 | * drivers shall *NOT* touch pin control GPIO calls. | |
434 | */ | |
435 | int pinctrl_gpio_direction_input(unsigned gpio) | |
436 | { | |
57b676f9 SW |
437 | int ret; |
438 | mutex_lock(&pinctrl_mutex); | |
439 | ret = pinctrl_gpio_direction(gpio, true); | |
440 | mutex_unlock(&pinctrl_mutex); | |
441 | return ret; | |
befe5bdf LW |
442 | } |
443 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
444 | ||
445 | /** | |
446 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
447 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
448 | * | |
449 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
450 | * as part of their gpio_direction_output() semantics, platforms and individual | |
451 | * drivers shall *NOT* touch pin control GPIO calls. | |
452 | */ | |
453 | int pinctrl_gpio_direction_output(unsigned gpio) | |
454 | { | |
57b676f9 SW |
455 | int ret; |
456 | mutex_lock(&pinctrl_mutex); | |
457 | ret = pinctrl_gpio_direction(gpio, false); | |
458 | mutex_unlock(&pinctrl_mutex); | |
459 | return ret; | |
befe5bdf LW |
460 | } |
461 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
462 | ||
6e5e959d SW |
463 | static struct pinctrl_state *find_state(struct pinctrl *p, |
464 | const char *name) | |
befe5bdf | 465 | { |
6e5e959d SW |
466 | struct pinctrl_state *state; |
467 | ||
468 | list_for_each_entry(state, &p->states, node) | |
469 | if (!strcmp(state->name, name)) | |
470 | return state; | |
471 | ||
472 | return NULL; | |
473 | } | |
474 | ||
475 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
476 | const char *name) | |
477 | { | |
478 | struct pinctrl_state *state; | |
479 | ||
480 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
481 | if (state == NULL) { | |
482 | dev_err(p->dev, | |
483 | "failed to alloc struct pinctrl_state\n"); | |
484 | return ERR_PTR(-ENOMEM); | |
485 | } | |
486 | ||
487 | state->name = name; | |
488 | INIT_LIST_HEAD(&state->settings); | |
489 | ||
490 | list_add_tail(&state->node, &p->states); | |
491 | ||
492 | return state; | |
493 | } | |
494 | ||
495 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
496 | { | |
497 | struct pinctrl_state *state; | |
7ecdb16f | 498 | struct pinctrl_setting *setting; |
6e5e959d | 499 | int ret; |
befe5bdf | 500 | |
6e5e959d SW |
501 | state = find_state(p, map->name); |
502 | if (!state) | |
503 | state = create_state(p, map->name); | |
504 | if (IS_ERR(state)) | |
505 | return PTR_ERR(state); | |
befe5bdf | 506 | |
1e2082b5 SW |
507 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
508 | return 0; | |
509 | ||
6e5e959d SW |
510 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
511 | if (setting == NULL) { | |
512 | dev_err(p->dev, | |
513 | "failed to alloc struct pinctrl_setting\n"); | |
514 | return -ENOMEM; | |
515 | } | |
befe5bdf | 516 | |
1e2082b5 SW |
517 | setting->type = map->type; |
518 | ||
6e5e959d SW |
519 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
520 | if (setting->pctldev == NULL) { | |
c05127c4 | 521 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
6e5e959d SW |
522 | map->ctrl_dev_name); |
523 | kfree(setting); | |
c05127c4 LW |
524 | /* |
525 | * OK let us guess that the driver is not there yet, and | |
526 | * let's defer obtaining this pinctrl handle to later... | |
527 | */ | |
528 | return -EPROBE_DEFER; | |
6e5e959d SW |
529 | } |
530 | ||
1e2082b5 SW |
531 | switch (map->type) { |
532 | case PIN_MAP_TYPE_MUX_GROUP: | |
533 | ret = pinmux_map_to_setting(map, setting); | |
534 | break; | |
535 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
536 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
537 | ret = pinconf_map_to_setting(map, setting); | |
538 | break; | |
539 | default: | |
540 | ret = -EINVAL; | |
541 | break; | |
542 | } | |
6e5e959d SW |
543 | if (ret < 0) { |
544 | kfree(setting); | |
545 | return ret; | |
546 | } | |
547 | ||
548 | list_add_tail(&setting->node, &state->settings); | |
549 | ||
550 | return 0; | |
551 | } | |
552 | ||
553 | static struct pinctrl *find_pinctrl(struct device *dev) | |
554 | { | |
555 | struct pinctrl *p; | |
556 | ||
1e2082b5 | 557 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
558 | if (p->dev == dev) |
559 | return p; | |
560 | ||
561 | return NULL; | |
562 | } | |
563 | ||
564 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
565 | ||
566 | static struct pinctrl *create_pinctrl(struct device *dev) | |
567 | { | |
568 | struct pinctrl *p; | |
569 | const char *devname; | |
570 | struct pinctrl_maps *maps_node; | |
571 | int i; | |
572 | struct pinctrl_map const *map; | |
573 | int ret; | |
befe5bdf LW |
574 | |
575 | /* | |
576 | * create the state cookie holder struct pinctrl for each | |
577 | * mapping, this is what consumers will get when requesting | |
578 | * a pin control handle with pinctrl_get() | |
579 | */ | |
02f5b989 | 580 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
581 | if (p == NULL) { |
582 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 583 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 584 | } |
7ecdb16f | 585 | p->dev = dev; |
6e5e959d | 586 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
587 | INIT_LIST_HEAD(&p->dt_maps); |
588 | ||
589 | ret = pinctrl_dt_to_map(p); | |
590 | if (ret < 0) { | |
591 | kfree(p); | |
592 | return ERR_PTR(ret); | |
593 | } | |
6e5e959d SW |
594 | |
595 | devname = dev_name(dev); | |
befe5bdf LW |
596 | |
597 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 598 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
599 | /* Map must be for this device */ |
600 | if (strcmp(map->dev_name, devname)) | |
601 | continue; | |
602 | ||
6e5e959d SW |
603 | ret = add_setting(p, map); |
604 | if (ret < 0) { | |
605 | pinctrl_put_locked(p, false); | |
606 | return ERR_PTR(ret); | |
7ecdb16f | 607 | } |
befe5bdf LW |
608 | } |
609 | ||
befe5bdf | 610 | /* Add the pinmux to the global list */ |
8b9c139f | 611 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
612 | |
613 | return p; | |
6e5e959d | 614 | } |
7ecdb16f | 615 | |
6e5e959d SW |
616 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
617 | { | |
618 | struct pinctrl *p; | |
7ecdb16f | 619 | |
6e5e959d SW |
620 | if (WARN_ON(!dev)) |
621 | return ERR_PTR(-EINVAL); | |
622 | ||
623 | p = find_pinctrl(dev); | |
624 | if (p != NULL) | |
625 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 626 | |
6e5e959d SW |
627 | p = create_pinctrl(dev); |
628 | if (IS_ERR(p)) | |
629 | return p; | |
630 | ||
631 | return p; | |
befe5bdf | 632 | } |
b2b3e66e SW |
633 | |
634 | /** | |
6e5e959d SW |
635 | * pinctrl_get() - retrieves the pinctrl handle for a device |
636 | * @dev: the device to obtain the handle for | |
b2b3e66e | 637 | */ |
6e5e959d | 638 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
639 | { |
640 | struct pinctrl *p; | |
641 | ||
57b676f9 | 642 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 643 | p = pinctrl_get_locked(dev); |
57b676f9 | 644 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
645 | |
646 | return p; | |
647 | } | |
befe5bdf LW |
648 | EXPORT_SYMBOL_GPL(pinctrl_get); |
649 | ||
6e5e959d | 650 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 651 | { |
6e5e959d SW |
652 | struct pinctrl_state *state, *n1; |
653 | struct pinctrl_setting *setting, *n2; | |
654 | ||
655 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
656 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
657 | switch (setting->type) { |
658 | case PIN_MAP_TYPE_MUX_GROUP: | |
659 | if (state == p->state) | |
660 | pinmux_disable_setting(setting); | |
661 | pinmux_free_setting(setting); | |
662 | break; | |
663 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
664 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
665 | pinconf_free_setting(setting); | |
666 | break; | |
667 | default: | |
668 | break; | |
669 | } | |
6e5e959d SW |
670 | list_del(&setting->node); |
671 | kfree(setting); | |
672 | } | |
673 | list_del(&state->node); | |
674 | kfree(state); | |
7ecdb16f | 675 | } |
befe5bdf | 676 | |
57291ce2 SW |
677 | pinctrl_dt_free_maps(p); |
678 | ||
6e5e959d SW |
679 | if (inlist) |
680 | list_del(&p->node); | |
befe5bdf LW |
681 | kfree(p); |
682 | } | |
befe5bdf LW |
683 | |
684 | /** | |
6e5e959d SW |
685 | * pinctrl_put() - release a previously claimed pinctrl handle |
686 | * @p: the pinctrl handle to release | |
befe5bdf | 687 | */ |
57b676f9 SW |
688 | void pinctrl_put(struct pinctrl *p) |
689 | { | |
690 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 691 | pinctrl_put_locked(p, true); |
57b676f9 SW |
692 | mutex_unlock(&pinctrl_mutex); |
693 | } | |
694 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
695 | ||
6e5e959d SW |
696 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
697 | const char *name) | |
befe5bdf | 698 | { |
6e5e959d | 699 | struct pinctrl_state *state; |
befe5bdf | 700 | |
6e5e959d SW |
701 | state = find_state(p, name); |
702 | if (!state) | |
703 | return ERR_PTR(-ENODEV); | |
57b676f9 | 704 | |
6e5e959d | 705 | return state; |
befe5bdf | 706 | } |
befe5bdf LW |
707 | |
708 | /** | |
6e5e959d SW |
709 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
710 | * @p: the pinctrl handle to retrieve the state from | |
711 | * @name: the state name to retrieve | |
befe5bdf | 712 | */ |
6e5e959d | 713 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 714 | { |
6e5e959d SW |
715 | struct pinctrl_state *s; |
716 | ||
57b676f9 | 717 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 718 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 719 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
720 | |
721 | return s; | |
57b676f9 | 722 | } |
6e5e959d | 723 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 724 | |
6e5e959d SW |
725 | static int pinctrl_select_state_locked(struct pinctrl *p, |
726 | struct pinctrl_state *state) | |
befe5bdf | 727 | { |
6e5e959d SW |
728 | struct pinctrl_setting *setting, *setting2; |
729 | int ret; | |
7ecdb16f | 730 | |
6e5e959d SW |
731 | if (p->state == state) |
732 | return 0; | |
befe5bdf | 733 | |
6e5e959d SW |
734 | if (p->state) { |
735 | /* | |
736 | * The set of groups with a mux configuration in the old state | |
737 | * may not be identical to the set of groups with a mux setting | |
738 | * in the new state. While this might be unusual, it's entirely | |
739 | * possible for the "user"-supplied mapping table to be written | |
740 | * that way. For each group that was configured in the old state | |
741 | * but not in the new state, this code puts that group into a | |
742 | * safe/disabled state. | |
743 | */ | |
744 | list_for_each_entry(setting, &p->state->settings, node) { | |
745 | bool found = false; | |
1e2082b5 SW |
746 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
747 | continue; | |
6e5e959d | 748 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
749 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
750 | continue; | |
751 | if (setting2->data.mux.group == | |
752 | setting->data.mux.group) { | |
6e5e959d SW |
753 | found = true; |
754 | break; | |
755 | } | |
756 | } | |
757 | if (!found) | |
758 | pinmux_disable_setting(setting); | |
759 | } | |
760 | } | |
761 | ||
762 | p->state = state; | |
763 | ||
764 | /* Apply all the settings for the new state */ | |
765 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
766 | switch (setting->type) { |
767 | case PIN_MAP_TYPE_MUX_GROUP: | |
768 | ret = pinmux_enable_setting(setting); | |
769 | break; | |
770 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
771 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
772 | ret = pinconf_apply_setting(setting); | |
773 | break; | |
774 | default: | |
775 | ret = -EINVAL; | |
776 | break; | |
777 | } | |
6e5e959d SW |
778 | if (ret < 0) { |
779 | /* FIXME: Difficult to return to prev state */ | |
780 | return ret; | |
781 | } | |
befe5bdf | 782 | } |
6e5e959d SW |
783 | |
784 | return 0; | |
57b676f9 SW |
785 | } |
786 | ||
787 | /** | |
6e5e959d SW |
788 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
789 | * @p: the pinctrl handle for the device that requests configuratio | |
790 | * @state: the state handle to select/activate/program | |
57b676f9 | 791 | */ |
6e5e959d | 792 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 793 | { |
6e5e959d SW |
794 | int ret; |
795 | ||
57b676f9 | 796 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 797 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 798 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
799 | |
800 | return ret; | |
befe5bdf | 801 | } |
6e5e959d | 802 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 803 | |
57291ce2 SW |
804 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
805 | bool dup, bool locked) | |
befe5bdf | 806 | { |
1e2082b5 | 807 | int i, ret; |
b2b3e66e | 808 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
809 | |
810 | pr_debug("add %d pinmux maps\n", num_maps); | |
811 | ||
812 | /* First sanity check the new mapping */ | |
813 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
814 | if (!maps[i].dev_name) { |
815 | pr_err("failed to register map %s (%d): no device given\n", | |
816 | maps[i].name, i); | |
817 | return -EINVAL; | |
818 | } | |
819 | ||
befe5bdf LW |
820 | if (!maps[i].name) { |
821 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 822 | i); |
befe5bdf LW |
823 | return -EINVAL; |
824 | } | |
825 | ||
1e2082b5 SW |
826 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
827 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
828 | pr_err("failed to register map %s (%d): no pin control device given\n", |
829 | maps[i].name, i); | |
830 | return -EINVAL; | |
831 | } | |
832 | ||
1e2082b5 SW |
833 | switch (maps[i].type) { |
834 | case PIN_MAP_TYPE_DUMMY_STATE: | |
835 | break; | |
836 | case PIN_MAP_TYPE_MUX_GROUP: | |
837 | ret = pinmux_validate_map(&maps[i], i); | |
838 | if (ret < 0) | |
839 | return 0; | |
840 | break; | |
841 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
842 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
843 | ret = pinconf_validate_map(&maps[i], i); | |
844 | if (ret < 0) | |
845 | return 0; | |
846 | break; | |
847 | default: | |
848 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 849 | maps[i].name, i); |
1681f5ae SW |
850 | return -EINVAL; |
851 | } | |
befe5bdf LW |
852 | } |
853 | ||
b2b3e66e SW |
854 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
855 | if (!maps_node) { | |
856 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
857 | return -ENOMEM; | |
858 | } | |
befe5bdf | 859 | |
b2b3e66e | 860 | maps_node->num_maps = num_maps; |
57291ce2 SW |
861 | if (dup) { |
862 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
863 | GFP_KERNEL); | |
864 | if (!maps_node->maps) { | |
865 | pr_err("failed to duplicate mapping table\n"); | |
866 | kfree(maps_node); | |
867 | return -ENOMEM; | |
868 | } | |
869 | } else { | |
870 | maps_node->maps = maps; | |
befe5bdf LW |
871 | } |
872 | ||
57291ce2 SW |
873 | if (!locked) |
874 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 875 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
876 | if (!locked) |
877 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 878 | |
befe5bdf LW |
879 | return 0; |
880 | } | |
881 | ||
57291ce2 SW |
882 | /** |
883 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
884 | * @maps: the pincontrol mappings table to register. This should probably be | |
885 | * marked with __initdata so it can be discarded after boot. This | |
886 | * function will perform a shallow copy for the mapping entries. | |
887 | * @num_maps: the number of maps in the mapping table | |
888 | */ | |
889 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
890 | unsigned num_maps) | |
891 | { | |
892 | return pinctrl_register_map(maps, num_maps, true, false); | |
893 | } | |
894 | ||
895 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
896 | { | |
897 | struct pinctrl_maps *maps_node; | |
898 | ||
899 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
900 | if (maps_node->maps == map) { | |
901 | list_del(&maps_node->node); | |
902 | return; | |
903 | } | |
904 | } | |
905 | } | |
906 | ||
2744e8af LW |
907 | #ifdef CONFIG_DEBUG_FS |
908 | ||
909 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
910 | { | |
911 | struct pinctrl_dev *pctldev = s->private; | |
912 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 913 | unsigned i, pin; |
2744e8af LW |
914 | |
915 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 916 | |
57b676f9 SW |
917 | mutex_lock(&pinctrl_mutex); |
918 | ||
706e8520 CP |
919 | /* The pin number can be retrived from the pin controller descriptor */ |
920 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
921 | struct pin_desc *desc; |
922 | ||
706e8520 | 923 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
924 | desc = pin_desc_get(pctldev, pin); |
925 | /* Pin space may be sparse */ | |
926 | if (desc == NULL) | |
927 | continue; | |
928 | ||
929 | seq_printf(s, "pin %d (%s) ", pin, | |
930 | desc->name ? desc->name : "unnamed"); | |
931 | ||
932 | /* Driver-specific info per pin */ | |
933 | if (ops->pin_dbg_show) | |
934 | ops->pin_dbg_show(pctldev, s, pin); | |
935 | ||
936 | seq_puts(s, "\n"); | |
937 | } | |
938 | ||
57b676f9 SW |
939 | mutex_unlock(&pinctrl_mutex); |
940 | ||
2744e8af LW |
941 | return 0; |
942 | } | |
943 | ||
944 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
945 | { | |
946 | struct pinctrl_dev *pctldev = s->private; | |
947 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 948 | unsigned ngroups, selector = 0; |
2744e8af | 949 | |
d1e90e9e | 950 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
951 | mutex_lock(&pinctrl_mutex); |
952 | ||
2744e8af | 953 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 954 | while (selector < ngroups) { |
a5818a8b | 955 | const unsigned *pins; |
2744e8af LW |
956 | unsigned num_pins; |
957 | const char *gname = ops->get_group_name(pctldev, selector); | |
958 | int ret; | |
959 | int i; | |
960 | ||
961 | ret = ops->get_group_pins(pctldev, selector, | |
962 | &pins, &num_pins); | |
963 | if (ret) | |
964 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
965 | gname); | |
966 | else { | |
967 | seq_printf(s, "group: %s, pins = [ ", gname); | |
968 | for (i = 0; i < num_pins; i++) | |
969 | seq_printf(s, "%d ", pins[i]); | |
970 | seq_puts(s, "]\n"); | |
971 | } | |
972 | selector++; | |
973 | } | |
974 | ||
57b676f9 | 975 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
976 | |
977 | return 0; | |
978 | } | |
979 | ||
980 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
981 | { | |
982 | struct pinctrl_dev *pctldev = s->private; | |
983 | struct pinctrl_gpio_range *range = NULL; | |
984 | ||
985 | seq_puts(s, "GPIO ranges handled:\n"); | |
986 | ||
57b676f9 SW |
987 | mutex_lock(&pinctrl_mutex); |
988 | ||
2744e8af | 989 | /* Loop over the ranges */ |
2744e8af | 990 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
991 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
992 | range->id, range->name, | |
993 | range->base, (range->base + range->npins - 1), | |
994 | range->pin_base, | |
995 | (range->pin_base + range->npins - 1)); | |
2744e8af | 996 | } |
57b676f9 SW |
997 | |
998 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
999 | |
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1004 | { | |
1005 | struct pinctrl_dev *pctldev; | |
1006 | ||
ae6b4d85 | 1007 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1008 | |
1009 | mutex_lock(&pinctrl_mutex); | |
1010 | ||
2744e8af LW |
1011 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1012 | seq_printf(s, "%s ", pctldev->desc->name); | |
1013 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1014 | seq_puts(s, "yes "); |
1015 | else | |
1016 | seq_puts(s, "no "); | |
1017 | if (pctldev->desc->confops) | |
2744e8af LW |
1018 | seq_puts(s, "yes"); |
1019 | else | |
1020 | seq_puts(s, "no"); | |
1021 | seq_puts(s, "\n"); | |
1022 | } | |
57b676f9 SW |
1023 | |
1024 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1025 | |
1026 | return 0; | |
1027 | } | |
1028 | ||
1e2082b5 SW |
1029 | static inline const char *map_type(enum pinctrl_map_type type) |
1030 | { | |
1031 | static const char * const names[] = { | |
1032 | "INVALID", | |
1033 | "DUMMY_STATE", | |
1034 | "MUX_GROUP", | |
1035 | "CONFIGS_PIN", | |
1036 | "CONFIGS_GROUP", | |
1037 | }; | |
1038 | ||
1039 | if (type >= ARRAY_SIZE(names)) | |
1040 | return "UNKNOWN"; | |
1041 | ||
1042 | return names[type]; | |
1043 | } | |
1044 | ||
3eedb437 SW |
1045 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1046 | { | |
1047 | struct pinctrl_maps *maps_node; | |
1048 | int i; | |
1049 | struct pinctrl_map const *map; | |
1050 | ||
1051 | seq_puts(s, "Pinctrl maps:\n"); | |
1052 | ||
57b676f9 SW |
1053 | mutex_lock(&pinctrl_mutex); |
1054 | ||
3eedb437 | 1055 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1056 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1057 | map->dev_name, map->name, map_type(map->type), | |
1058 | map->type); | |
1059 | ||
1060 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1061 | seq_printf(s, "controlling device %s\n", | |
1062 | map->ctrl_dev_name); | |
1063 | ||
1064 | switch (map->type) { | |
1065 | case PIN_MAP_TYPE_MUX_GROUP: | |
1066 | pinmux_show_map(s, map); | |
1067 | break; | |
1068 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1069 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1070 | pinconf_show_map(s, map); | |
1071 | break; | |
1072 | default: | |
1073 | break; | |
1074 | } | |
1075 | ||
1076 | seq_printf(s, "\n"); | |
3eedb437 | 1077 | } |
57b676f9 SW |
1078 | |
1079 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1080 | |
1081 | return 0; | |
1082 | } | |
1083 | ||
befe5bdf LW |
1084 | static int pinctrl_show(struct seq_file *s, void *what) |
1085 | { | |
1086 | struct pinctrl *p; | |
6e5e959d | 1087 | struct pinctrl_state *state; |
7ecdb16f | 1088 | struct pinctrl_setting *setting; |
befe5bdf LW |
1089 | |
1090 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1091 | |
1092 | mutex_lock(&pinctrl_mutex); | |
1093 | ||
befe5bdf | 1094 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1095 | seq_printf(s, "device: %s current state: %s\n", |
1096 | dev_name(p->dev), | |
1097 | p->state ? p->state->name : "none"); | |
1098 | ||
1099 | list_for_each_entry(state, &p->states, node) { | |
1100 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1101 | |
6e5e959d | 1102 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1103 | struct pinctrl_dev *pctldev = setting->pctldev; |
1104 | ||
1105 | seq_printf(s, " type: %s controller %s ", | |
1106 | map_type(setting->type), | |
1107 | pinctrl_dev_get_name(pctldev)); | |
1108 | ||
1109 | switch (setting->type) { | |
1110 | case PIN_MAP_TYPE_MUX_GROUP: | |
1111 | pinmux_show_setting(s, setting); | |
1112 | break; | |
1113 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1114 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1115 | pinconf_show_setting(s, setting); | |
1116 | break; | |
1117 | default: | |
1118 | break; | |
1119 | } | |
6e5e959d | 1120 | } |
befe5bdf | 1121 | } |
befe5bdf LW |
1122 | } |
1123 | ||
57b676f9 SW |
1124 | mutex_unlock(&pinctrl_mutex); |
1125 | ||
befe5bdf LW |
1126 | return 0; |
1127 | } | |
1128 | ||
2744e8af LW |
1129 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1130 | { | |
1131 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1132 | } | |
1133 | ||
1134 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1135 | { | |
1136 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1137 | } | |
1138 | ||
1139 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1140 | { | |
1141 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1142 | } | |
1143 | ||
1144 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1145 | { | |
1146 | return single_open(file, pinctrl_devices_show, NULL); | |
1147 | } | |
1148 | ||
3eedb437 SW |
1149 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1150 | { | |
1151 | return single_open(file, pinctrl_maps_show, NULL); | |
1152 | } | |
1153 | ||
befe5bdf LW |
1154 | static int pinctrl_open(struct inode *inode, struct file *file) |
1155 | { | |
1156 | return single_open(file, pinctrl_show, NULL); | |
1157 | } | |
1158 | ||
2744e8af LW |
1159 | static const struct file_operations pinctrl_pins_ops = { |
1160 | .open = pinctrl_pins_open, | |
1161 | .read = seq_read, | |
1162 | .llseek = seq_lseek, | |
1163 | .release = single_release, | |
1164 | }; | |
1165 | ||
1166 | static const struct file_operations pinctrl_groups_ops = { | |
1167 | .open = pinctrl_groups_open, | |
1168 | .read = seq_read, | |
1169 | .llseek = seq_lseek, | |
1170 | .release = single_release, | |
1171 | }; | |
1172 | ||
1173 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1174 | .open = pinctrl_gpioranges_open, | |
1175 | .read = seq_read, | |
1176 | .llseek = seq_lseek, | |
1177 | .release = single_release, | |
1178 | }; | |
1179 | ||
3eedb437 SW |
1180 | static const struct file_operations pinctrl_devices_ops = { |
1181 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1182 | .read = seq_read, |
1183 | .llseek = seq_lseek, | |
1184 | .release = single_release, | |
1185 | }; | |
1186 | ||
3eedb437 SW |
1187 | static const struct file_operations pinctrl_maps_ops = { |
1188 | .open = pinctrl_maps_open, | |
2744e8af LW |
1189 | .read = seq_read, |
1190 | .llseek = seq_lseek, | |
1191 | .release = single_release, | |
1192 | }; | |
1193 | ||
befe5bdf LW |
1194 | static const struct file_operations pinctrl_ops = { |
1195 | .open = pinctrl_open, | |
1196 | .read = seq_read, | |
1197 | .llseek = seq_lseek, | |
1198 | .release = single_release, | |
1199 | }; | |
1200 | ||
2744e8af LW |
1201 | static struct dentry *debugfs_root; |
1202 | ||
1203 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1204 | { | |
02157160 | 1205 | struct dentry *device_root; |
2744e8af | 1206 | |
51cd24ee | 1207 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1208 | debugfs_root); |
02157160 TL |
1209 | pctldev->device_root = device_root; |
1210 | ||
2744e8af LW |
1211 | if (IS_ERR(device_root) || !device_root) { |
1212 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1213 | dev_name(pctldev->dev)); |
2744e8af LW |
1214 | return; |
1215 | } | |
1216 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1217 | device_root, pctldev, &pinctrl_pins_ops); | |
1218 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1219 | device_root, pctldev, &pinctrl_groups_ops); | |
1220 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1221 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1222 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1223 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1224 | } |
1225 | ||
02157160 TL |
1226 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1227 | { | |
1228 | debugfs_remove_recursive(pctldev->device_root); | |
1229 | } | |
1230 | ||
2744e8af LW |
1231 | static void pinctrl_init_debugfs(void) |
1232 | { | |
1233 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1234 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1235 | pr_warn("failed to create debugfs directory\n"); | |
1236 | debugfs_root = NULL; | |
1237 | return; | |
1238 | } | |
1239 | ||
1240 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1241 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1242 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1243 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1244 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1245 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1246 | } |
1247 | ||
1248 | #else /* CONFIG_DEBUG_FS */ | |
1249 | ||
1250 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1251 | { | |
1252 | } | |
1253 | ||
1254 | static void pinctrl_init_debugfs(void) | |
1255 | { | |
1256 | } | |
1257 | ||
02157160 TL |
1258 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1259 | { | |
1260 | } | |
1261 | ||
2744e8af LW |
1262 | #endif |
1263 | ||
d26bc49f SW |
1264 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1265 | { | |
1266 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1267 | ||
1268 | if (!ops || | |
d1e90e9e | 1269 | !ops->get_groups_count || |
d26bc49f SW |
1270 | !ops->get_group_name || |
1271 | !ops->get_group_pins) | |
1272 | return -EINVAL; | |
1273 | ||
57291ce2 SW |
1274 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1275 | return -EINVAL; | |
1276 | ||
d26bc49f SW |
1277 | return 0; |
1278 | } | |
1279 | ||
2744e8af LW |
1280 | /** |
1281 | * pinctrl_register() - register a pin controller device | |
1282 | * @pctldesc: descriptor for this pin controller | |
1283 | * @dev: parent device for this pin controller | |
1284 | * @driver_data: private pin controller data for this pin controller | |
1285 | */ | |
1286 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1287 | struct device *dev, void *driver_data) | |
1288 | { | |
2744e8af LW |
1289 | struct pinctrl_dev *pctldev; |
1290 | int ret; | |
1291 | ||
1292 | if (pctldesc == NULL) | |
1293 | return NULL; | |
1294 | if (pctldesc->name == NULL) | |
1295 | return NULL; | |
1296 | ||
02f5b989 | 1297 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1298 | if (pctldev == NULL) { |
1299 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1300 | return NULL; |
95dcd4ae | 1301 | } |
b9130b77 TL |
1302 | |
1303 | /* Initialize pin control device struct */ | |
1304 | pctldev->owner = pctldesc->owner; | |
1305 | pctldev->desc = pctldesc; | |
1306 | pctldev->driver_data = driver_data; | |
1307 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1308 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1309 | pctldev->dev = dev; |
1310 | ||
d26bc49f SW |
1311 | /* check core ops for sanity */ |
1312 | ret = pinctrl_check_ops(pctldev); | |
1313 | if (ret) { | |
1314 | pr_err("%s pinctrl ops lacks necessary functions\n", | |
1315 | pctldesc->name); | |
1316 | goto out_err; | |
1317 | } | |
1318 | ||
2744e8af LW |
1319 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1320 | if (pctldesc->pmxops) { | |
b9130b77 | 1321 | ret = pinmux_check_ops(pctldev); |
2744e8af LW |
1322 | if (ret) { |
1323 | pr_err("%s pinmux ops lacks necessary functions\n", | |
1324 | pctldesc->name); | |
b9130b77 | 1325 | goto out_err; |
2744e8af LW |
1326 | } |
1327 | } | |
1328 | ||
ae6b4d85 LW |
1329 | /* If we're implementing pinconfig, check the ops for sanity */ |
1330 | if (pctldesc->confops) { | |
b9130b77 | 1331 | ret = pinconf_check_ops(pctldev); |
ae6b4d85 LW |
1332 | if (ret) { |
1333 | pr_err("%s pin config ops lacks necessary functions\n", | |
1334 | pctldesc->name); | |
b9130b77 | 1335 | goto out_err; |
ae6b4d85 LW |
1336 | } |
1337 | } | |
1338 | ||
2744e8af LW |
1339 | /* Register all the pins */ |
1340 | pr_debug("try to register %d pins on %s...\n", | |
1341 | pctldesc->npins, pctldesc->name); | |
1342 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); | |
1343 | if (ret) { | |
1344 | pr_err("error during pin registration\n"); | |
1345 | pinctrl_free_pindescs(pctldev, pctldesc->pins, | |
1346 | pctldesc->npins); | |
51cd24ee | 1347 | goto out_err; |
2744e8af LW |
1348 | } |
1349 | ||
57b676f9 SW |
1350 | mutex_lock(&pinctrl_mutex); |
1351 | ||
8b9c139f | 1352 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1353 | |
6e5e959d SW |
1354 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1355 | if (!IS_ERR(pctldev->p)) { | |
1356 | struct pinctrl_state *s = | |
1357 | pinctrl_lookup_state_locked(pctldev->p, | |
1358 | PINCTRL_STATE_DEFAULT); | |
1359 | if (!IS_ERR(s)) | |
1360 | pinctrl_select_state_locked(pctldev->p, s); | |
1361 | } | |
57b676f9 SW |
1362 | |
1363 | mutex_unlock(&pinctrl_mutex); | |
1364 | ||
2304b473 SW |
1365 | pinctrl_init_device_debugfs(pctldev); |
1366 | ||
2744e8af LW |
1367 | return pctldev; |
1368 | ||
51cd24ee SW |
1369 | out_err: |
1370 | kfree(pctldev); | |
2744e8af LW |
1371 | return NULL; |
1372 | } | |
1373 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1374 | ||
1375 | /** | |
1376 | * pinctrl_unregister() - unregister pinmux | |
1377 | * @pctldev: pin controller to unregister | |
1378 | * | |
1379 | * Called by pinmux drivers to unregister a pinmux. | |
1380 | */ | |
1381 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1382 | { | |
1383 | if (pctldev == NULL) | |
1384 | return; | |
1385 | ||
02157160 | 1386 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1387 | |
1388 | mutex_lock(&pinctrl_mutex); | |
1389 | ||
6e5e959d SW |
1390 | if (!IS_ERR(pctldev->p)) |
1391 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1392 | |
2744e8af | 1393 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1394 | list_del(&pctldev->node); |
2744e8af LW |
1395 | /* Destroy descriptor tree */ |
1396 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1397 | pctldev->desc->npins); | |
51cd24ee | 1398 | kfree(pctldev); |
57b676f9 SW |
1399 | |
1400 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1401 | } |
1402 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1403 | ||
1404 | static int __init pinctrl_init(void) | |
1405 | { | |
1406 | pr_info("initialized pinctrl subsystem\n"); | |
1407 | pinctrl_init_debugfs(); | |
1408 | return 0; | |
1409 | } | |
1410 | ||
1411 | /* init early since many drivers really need to initialized pinmux early */ | |
1412 | core_initcall(pinctrl_init); |