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pinctrl: imx: Fix compilation with DEBUG enabled
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CommitLineData
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1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
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5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
b2b3e66e
SW
10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
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12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
ab78029e 17#include <linux/kref.h>
a5a697cd 18#include <linux/export.h>
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19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/slab.h>
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22#include <linux/err.h>
23#include <linux/list.h>
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24#include <linux/sysfs.h>
25#include <linux/debugfs.h>
26#include <linux/seq_file.h>
6d4ca1fb 27#include <linux/pinctrl/consumer.h>
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28#include <linux/pinctrl/pinctrl.h>
29#include <linux/pinctrl/machine.h>
2afe8229
HZ
30
31#ifdef CONFIG_GPIOLIB
51e13c24 32#include <asm-generic/gpio.h>
2afe8229
HZ
33#endif
34
2744e8af 35#include "core.h"
57291ce2 36#include "devicetree.h"
2744e8af 37#include "pinmux.h"
ae6b4d85 38#include "pinconf.h"
2744e8af 39
b2b3e66e 40
5b3aa5f7
DA
41static bool pinctrl_dummy_state;
42
42fed7ba 43/* Mutex taken to protect pinctrl_list */
843aec96 44static DEFINE_MUTEX(pinctrl_list_mutex);
42fed7ba
PC
45
46/* Mutex taken to protect pinctrl_maps */
47DEFINE_MUTEX(pinctrl_maps_mutex);
48
49/* Mutex taken to protect pinctrldev_list */
843aec96 50static DEFINE_MUTEX(pinctrldev_list_mutex);
57b676f9
SW
51
52/* Global list of pin control devices (struct pinctrl_dev) */
42fed7ba 53static LIST_HEAD(pinctrldev_list);
2744e8af 54
57b676f9 55/* List of pin controller handles (struct pinctrl) */
befe5bdf
LW
56static LIST_HEAD(pinctrl_list);
57
57b676f9 58/* List of pinctrl maps (struct pinctrl_maps) */
6f9e41f4 59LIST_HEAD(pinctrl_maps);
b2b3e66e 60
befe5bdf 61
5b3aa5f7
DA
62/**
63 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
64 *
65 * Usually this function is called by platforms without pinctrl driver support
66 * but run with some shared drivers using pinctrl APIs.
67 * After calling this function, the pinctrl core will return successfully
68 * with creating a dummy state for the driver to keep going smoothly.
69 */
70void pinctrl_provide_dummies(void)
71{
72 pinctrl_dummy_state = true;
73}
74
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LW
75const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
76{
77 /* We're not allowed to register devices without name */
78 return pctldev->desc->name;
79}
80EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
81
d6e99abb
HZ
82const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev)
83{
84 return dev_name(pctldev->dev);
85}
86EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname);
87
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LW
88void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
89{
90 return pctldev->driver_data;
91}
92EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
93
94/**
9dfac4fd
LW
95 * get_pinctrl_dev_from_devname() - look up pin controller device
96 * @devname: the name of a device instance, as returned by dev_name()
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97 *
98 * Looks up a pin control device matching a certain device name or pure device
99 * pointer, the pure device pointer will take precedence.
100 */
9dfac4fd 101struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
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LW
102{
103 struct pinctrl_dev *pctldev = NULL;
2744e8af 104
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LW
105 if (!devname)
106 return NULL;
107
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LW
108 mutex_lock(&pinctrldev_list_mutex);
109
2744e8af 110 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 111 if (!strcmp(dev_name(pctldev->dev), devname)) {
2744e8af 112 /* Matched on device name */
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LW
113 mutex_unlock(&pinctrldev_list_mutex);
114 return pctldev;
2744e8af
LW
115 }
116 }
2744e8af 117
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LW
118 mutex_unlock(&pinctrldev_list_mutex);
119
120 return NULL;
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LW
121}
122
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PC
123struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np)
124{
125 struct pinctrl_dev *pctldev;
126
127 mutex_lock(&pinctrldev_list_mutex);
128
129 list_for_each_entry(pctldev, &pinctrldev_list, node)
130 if (pctldev->dev->of_node == np) {
131 mutex_unlock(&pinctrldev_list_mutex);
132 return pctldev;
133 }
134
d463f82d 135 mutex_unlock(&pinctrldev_list_mutex);
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PC
136
137 return NULL;
138}
139
ae6b4d85
LW
140/**
141 * pin_get_from_name() - look up a pin number from a name
142 * @pctldev: the pin control device to lookup the pin on
143 * @name: the name of the pin to look up
144 */
145int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
146{
706e8520 147 unsigned i, pin;
ae6b4d85 148
706e8520
CP
149 /* The pin number can be retrived from the pin controller descriptor */
150 for (i = 0; i < pctldev->desc->npins; i++) {
ae6b4d85
LW
151 struct pin_desc *desc;
152
706e8520 153 pin = pctldev->desc->pins[i].number;
ae6b4d85
LW
154 desc = pin_desc_get(pctldev, pin);
155 /* Pin space may be sparse */
6c325f87 156 if (desc && !strcmp(name, desc->name))
ae6b4d85
LW
157 return pin;
158 }
159
160 return -EINVAL;
161}
162
dcb5dbc3
DA
163/**
164 * pin_get_name_from_id() - look up a pin name from a pin id
165 * @pctldev: the pin control device to lookup the pin on
166 * @name: the name of the pin to look up
167 */
168const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
169{
170 const struct pin_desc *desc;
171
172 desc = pin_desc_get(pctldev, pin);
173 if (desc == NULL) {
174 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
175 pin);
176 return NULL;
177 }
178
179 return desc->name;
180}
181
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LW
182/**
183 * pin_is_valid() - check if pin exists on controller
184 * @pctldev: the pin control device to check the pin on
185 * @pin: pin to check, use the local pin controller index number
186 *
187 * This tells us whether a certain pin exist on a certain pin controller or
188 * not. Pin lists may be sparse, so some pins may not exist.
189 */
190bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
191{
192 struct pin_desc *pindesc;
193
194 if (pin < 0)
195 return false;
196
42fed7ba 197 mutex_lock(&pctldev->mutex);
2744e8af 198 pindesc = pin_desc_get(pctldev, pin);
42fed7ba 199 mutex_unlock(&pctldev->mutex);
2744e8af 200
57b676f9 201 return pindesc != NULL;
2744e8af
LW
202}
203EXPORT_SYMBOL_GPL(pin_is_valid);
204
205/* Deletes a range of pin descriptors */
206static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
207 const struct pinctrl_pin_desc *pins,
208 unsigned num_pins)
209{
210 int i;
211
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LW
212 for (i = 0; i < num_pins; i++) {
213 struct pin_desc *pindesc;
214
215 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
216 pins[i].number);
217 if (pindesc != NULL) {
218 radix_tree_delete(&pctldev->pin_desc_tree,
219 pins[i].number);
ca53c5f1
LW
220 if (pindesc->dynamic_name)
221 kfree(pindesc->name);
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222 }
223 kfree(pindesc);
224 }
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225}
226
227static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
228 unsigned number, const char *name)
229{
230 struct pin_desc *pindesc;
231
232 pindesc = pin_desc_get(pctldev, number);
233 if (pindesc != NULL) {
234 pr_err("pin %d already registered on %s\n", number,
235 pctldev->desc->name);
236 return -EINVAL;
237 }
238
239 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
95dcd4ae
SW
240 if (pindesc == NULL) {
241 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 242 return -ENOMEM;
95dcd4ae 243 }
ae6b4d85 244
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LW
245 /* Set owner */
246 pindesc->pctldev = pctldev;
247
9af1e44f 248 /* Copy basic pin info */
8dc6ae4d 249 if (name) {
ca53c5f1
LW
250 pindesc->name = name;
251 } else {
252 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
eb26cc9c
SK
253 if (pindesc->name == NULL) {
254 kfree(pindesc);
ca53c5f1 255 return -ENOMEM;
eb26cc9c 256 }
ca53c5f1
LW
257 pindesc->dynamic_name = true;
258 }
2744e8af 259
2744e8af 260 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 261 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 262 number, pindesc->name, pctldev->desc->name);
2744e8af
LW
263 return 0;
264}
265
266static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
267 struct pinctrl_pin_desc const *pins,
268 unsigned num_descs)
269{
270 unsigned i;
271 int ret = 0;
272
273 for (i = 0; i < num_descs; i++) {
274 ret = pinctrl_register_one_pin(pctldev,
275 pins[i].number, pins[i].name);
276 if (ret)
277 return ret;
278 }
279
280 return 0;
281}
282
c8587eee
CR
283/**
284 * gpio_to_pin() - GPIO range GPIO number to pin number translation
285 * @range: GPIO range used for the translation
286 * @gpio: gpio pin to translate to a pin number
287 *
288 * Finds the pin number for a given GPIO using the specified GPIO range
289 * as a base for translation. The distinction between linear GPIO ranges
290 * and pin list based GPIO ranges is managed correctly by this function.
291 *
292 * This function assumes the gpio is part of the specified GPIO range, use
293 * only after making sure this is the case (e.g. by calling it on the
294 * result of successful pinctrl_get_device_gpio_range calls)!
295 */
296static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
297 unsigned int gpio)
298{
299 unsigned int offset = gpio - range->base;
300 if (range->pins)
301 return range->pins[offset];
302 else
303 return range->pin_base + offset;
304}
305
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LW
306/**
307 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
308 * @pctldev: pin controller device to check
309 * @gpio: gpio pin to check taken from the global GPIO pin space
310 *
311 * Tries to match a GPIO pin number to the ranges handled by a certain pin
312 * controller, return the range or NULL
313 */
314static struct pinctrl_gpio_range *
315pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
316{
317 struct pinctrl_gpio_range *range = NULL;
318
42fed7ba 319 mutex_lock(&pctldev->mutex);
2744e8af 320 /* Loop over the ranges */
2744e8af
LW
321 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
322 /* Check if we're in the valid range */
323 if (gpio >= range->base &&
324 gpio < range->base + range->npins) {
42fed7ba 325 mutex_unlock(&pctldev->mutex);
2744e8af
LW
326 return range;
327 }
328 }
42fed7ba 329 mutex_unlock(&pctldev->mutex);
2744e8af
LW
330 return NULL;
331}
332
51e13c24
HZ
333/**
334 * pinctrl_ready_for_gpio_range() - check if other GPIO pins of
335 * the same GPIO chip are in range
336 * @gpio: gpio pin to check taken from the global GPIO pin space
337 *
338 * This function is complement of pinctrl_match_gpio_range(). If the return
339 * value of pinctrl_match_gpio_range() is NULL, this function could be used
340 * to check whether pinctrl device is ready or not. Maybe some GPIO pins
341 * of the same GPIO chip don't have back-end pinctrl interface.
342 * If the return value is true, it means that pinctrl device is ready & the
343 * certain GPIO pin doesn't have back-end pinctrl device. If the return value
344 * is false, it means that pinctrl device may not be ready.
345 */
2afe8229 346#ifdef CONFIG_GPIOLIB
51e13c24
HZ
347static bool pinctrl_ready_for_gpio_range(unsigned gpio)
348{
349 struct pinctrl_dev *pctldev;
350 struct pinctrl_gpio_range *range = NULL;
351 struct gpio_chip *chip = gpio_to_chip(gpio);
352
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LW
353 mutex_lock(&pinctrldev_list_mutex);
354
51e13c24
HZ
355 /* Loop over the pin controllers */
356 list_for_each_entry(pctldev, &pinctrldev_list, node) {
357 /* Loop over the ranges */
5ffbe2e6 358 mutex_lock(&pctldev->mutex);
51e13c24
HZ
359 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
360 /* Check if any gpio range overlapped with gpio chip */
361 if (range->base + range->npins - 1 < chip->base ||
362 range->base > chip->base + chip->ngpio - 1)
363 continue;
5ffbe2e6 364 mutex_unlock(&pctldev->mutex);
44d5f7bb 365 mutex_unlock(&pinctrldev_list_mutex);
51e13c24
HZ
366 return true;
367 }
5ffbe2e6 368 mutex_unlock(&pctldev->mutex);
51e13c24 369 }
44d5f7bb
LW
370
371 mutex_unlock(&pinctrldev_list_mutex);
372
51e13c24
HZ
373 return false;
374}
2afe8229
HZ
375#else
376static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; }
377#endif
51e13c24 378
2744e8af
LW
379/**
380 * pinctrl_get_device_gpio_range() - find device for GPIO range
381 * @gpio: the pin to locate the pin controller for
382 * @outdev: the pin control device if found
383 * @outrange: the GPIO range if found
384 *
385 * Find the pin controller handling a certain GPIO pin from the pinspace of
386 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
387 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
388 * may still have not been registered.
2744e8af 389 */
4ecce45d
SW
390static int pinctrl_get_device_gpio_range(unsigned gpio,
391 struct pinctrl_dev **outdev,
392 struct pinctrl_gpio_range **outrange)
2744e8af
LW
393{
394 struct pinctrl_dev *pctldev = NULL;
395
f0059021
AL
396 mutex_lock(&pinctrldev_list_mutex);
397
2744e8af 398 /* Loop over the pin controllers */
2744e8af
LW
399 list_for_each_entry(pctldev, &pinctrldev_list, node) {
400 struct pinctrl_gpio_range *range;
401
402 range = pinctrl_match_gpio_range(pctldev, gpio);
403 if (range != NULL) {
404 *outdev = pctldev;
405 *outrange = range;
f0059021 406 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
407 return 0;
408 }
409 }
2744e8af 410
f0059021
AL
411 mutex_unlock(&pinctrldev_list_mutex);
412
4650b7cb 413 return -EPROBE_DEFER;
2744e8af
LW
414}
415
416/**
417 * pinctrl_add_gpio_range() - register a GPIO range for a controller
418 * @pctldev: pin controller device to add the range to
419 * @range: the GPIO range to add
420 *
421 * This adds a range of GPIOs to be handled by a certain pin controller. Call
422 * this to register handled ranges after registering your pin controller.
423 */
424void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
425 struct pinctrl_gpio_range *range)
426{
42fed7ba 427 mutex_lock(&pctldev->mutex);
8b9c139f 428 list_add_tail(&range->node, &pctldev->gpio_ranges);
42fed7ba 429 mutex_unlock(&pctldev->mutex);
2744e8af 430}
4ecce45d 431EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 432
3e5e00b6
DA
433void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
434 struct pinctrl_gpio_range *ranges,
435 unsigned nranges)
436{
437 int i;
438
439 for (i = 0; i < nranges; i++)
440 pinctrl_add_gpio_range(pctldev, &ranges[i]);
441}
442EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
443
192c369c 444struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
f23f1516
SH
445 struct pinctrl_gpio_range *range)
446{
42fed7ba
PC
447 struct pinctrl_dev *pctldev;
448
42fed7ba 449 pctldev = get_pinctrl_dev_from_devname(devname);
f23f1516 450
dfa97515
LW
451 /*
452 * If we can't find this device, let's assume that is because
453 * it has not probed yet, so the driver trying to register this
454 * range need to defer probing.
455 */
42fed7ba 456 if (!pctldev) {
dfa97515 457 return ERR_PTR(-EPROBE_DEFER);
42fed7ba 458 }
f23f1516 459 pinctrl_add_gpio_range(pctldev, range);
42fed7ba 460
f23f1516
SH
461 return pctldev;
462}
192c369c 463EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range);
f23f1516 464
9afbefb2
LW
465/**
466 * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin
467 * @pctldev: the pin controller device to look in
468 * @pin: a controller-local number to find the range for
469 */
470struct pinctrl_gpio_range *
471pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
472 unsigned int pin)
473{
c8f50e86 474 struct pinctrl_gpio_range *range;
9afbefb2 475
42fed7ba 476 mutex_lock(&pctldev->mutex);
9afbefb2
LW
477 /* Loop over the ranges */
478 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
479 /* Check if we're in the valid range */
c8587eee
CR
480 if (range->pins) {
481 int a;
482 for (a = 0; a < range->npins; a++) {
483 if (range->pins[a] == pin)
c8f50e86 484 goto out;
c8587eee
CR
485 }
486 } else if (pin >= range->pin_base &&
c8f50e86
WY
487 pin < range->pin_base + range->npins)
488 goto out;
9afbefb2 489 }
c8f50e86
WY
490 range = NULL;
491out:
42fed7ba 492 mutex_unlock(&pctldev->mutex);
c8f50e86 493 return range;
9afbefb2
LW
494}
495EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin);
496
7e10ee68
VK
497/**
498 * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
499 * @pctldev: pin controller device to remove the range from
500 * @range: the GPIO range to remove
501 */
502void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
503 struct pinctrl_gpio_range *range)
504{
42fed7ba 505 mutex_lock(&pctldev->mutex);
7e10ee68 506 list_del(&range->node);
42fed7ba 507 mutex_unlock(&pctldev->mutex);
7e10ee68
VK
508}
509EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
510
7afde8ba
LW
511/**
512 * pinctrl_get_group_selector() - returns the group selector for a group
513 * @pctldev: the pin controller handling the group
514 * @pin_group: the pin group to look up
515 */
516int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
517 const char *pin_group)
518{
519 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 520 unsigned ngroups = pctlops->get_groups_count(pctldev);
7afde8ba
LW
521 unsigned group_selector = 0;
522
d1e90e9e 523 while (group_selector < ngroups) {
7afde8ba
LW
524 const char *gname = pctlops->get_group_name(pctldev,
525 group_selector);
526 if (!strcmp(gname, pin_group)) {
51cd24ee 527 dev_dbg(pctldev->dev,
7afde8ba
LW
528 "found group selector %u for %s\n",
529 group_selector,
530 pin_group);
531 return group_selector;
532 }
533
534 group_selector++;
535 }
536
51cd24ee 537 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
538 pin_group);
539
540 return -EINVAL;
541}
542
befe5bdf
LW
543/**
544 * pinctrl_request_gpio() - request a single pin to be used in as GPIO
545 * @gpio: the GPIO pin number from the GPIO subsystem number space
546 *
547 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
548 * as part of their gpio_request() semantics, platforms and individual drivers
549 * shall *NOT* request GPIO pins to be muxed in.
550 */
551int pinctrl_request_gpio(unsigned gpio)
552{
553 struct pinctrl_dev *pctldev;
554 struct pinctrl_gpio_range *range;
555 int ret;
556 int pin;
557
558 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 559 if (ret) {
51e13c24
HZ
560 if (pinctrl_ready_for_gpio_range(gpio))
561 ret = 0;
4650b7cb 562 return ret;
57b676f9 563 }
befe5bdf
LW
564
565 /* Convert to the pin controllers number space */
c8587eee 566 pin = gpio_to_pin(range, gpio);
befe5bdf 567
57b676f9
SW
568 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
569
57b676f9 570 return ret;
befe5bdf
LW
571}
572EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
573
574/**
575 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
576 * @gpio: the GPIO pin number from the GPIO subsystem number space
577 *
578 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
579 * as part of their gpio_free() semantics, platforms and individual drivers
580 * shall *NOT* request GPIO pins to be muxed out.
581 */
582void pinctrl_free_gpio(unsigned gpio)
583{
584 struct pinctrl_dev *pctldev;
585 struct pinctrl_gpio_range *range;
586 int ret;
587 int pin;
588
589 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 590 if (ret) {
befe5bdf 591 return;
57b676f9 592 }
42fed7ba 593 mutex_lock(&pctldev->mutex);
befe5bdf
LW
594
595 /* Convert to the pin controllers number space */
c8587eee 596 pin = gpio_to_pin(range, gpio);
befe5bdf 597
57b676f9
SW
598 pinmux_free_gpio(pctldev, pin, range);
599
42fed7ba 600 mutex_unlock(&pctldev->mutex);
befe5bdf
LW
601}
602EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
603
604static int pinctrl_gpio_direction(unsigned gpio, bool input)
605{
606 struct pinctrl_dev *pctldev;
607 struct pinctrl_gpio_range *range;
608 int ret;
609 int pin;
610
611 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
42fed7ba 612 if (ret) {
befe5bdf 613 return ret;
42fed7ba
PC
614 }
615
616 mutex_lock(&pctldev->mutex);
befe5bdf
LW
617
618 /* Convert to the pin controllers number space */
c8587eee 619 pin = gpio_to_pin(range, gpio);
42fed7ba
PC
620 ret = pinmux_gpio_direction(pctldev, range, pin, input);
621
622 mutex_unlock(&pctldev->mutex);
befe5bdf 623
42fed7ba 624 return ret;
befe5bdf
LW
625}
626
627/**
628 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
629 * @gpio: the GPIO pin number from the GPIO subsystem number space
630 *
631 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
632 * as part of their gpio_direction_input() semantics, platforms and individual
633 * drivers shall *NOT* touch pin control GPIO calls.
634 */
635int pinctrl_gpio_direction_input(unsigned gpio)
636{
42fed7ba 637 return pinctrl_gpio_direction(gpio, true);
befe5bdf
LW
638}
639EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
640
641/**
642 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
643 * @gpio: the GPIO pin number from the GPIO subsystem number space
644 *
645 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
646 * as part of their gpio_direction_output() semantics, platforms and individual
647 * drivers shall *NOT* touch pin control GPIO calls.
648 */
649int pinctrl_gpio_direction_output(unsigned gpio)
650{
42fed7ba 651 return pinctrl_gpio_direction(gpio, false);
befe5bdf
LW
652}
653EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
654
6e5e959d
SW
655static struct pinctrl_state *find_state(struct pinctrl *p,
656 const char *name)
befe5bdf 657{
6e5e959d
SW
658 struct pinctrl_state *state;
659
660 list_for_each_entry(state, &p->states, node)
661 if (!strcmp(state->name, name))
662 return state;
663
664 return NULL;
665}
666
667static struct pinctrl_state *create_state(struct pinctrl *p,
668 const char *name)
669{
670 struct pinctrl_state *state;
671
672 state = kzalloc(sizeof(*state), GFP_KERNEL);
673 if (state == NULL) {
674 dev_err(p->dev,
675 "failed to alloc struct pinctrl_state\n");
676 return ERR_PTR(-ENOMEM);
677 }
678
679 state->name = name;
680 INIT_LIST_HEAD(&state->settings);
681
682 list_add_tail(&state->node, &p->states);
683
684 return state;
685}
686
687static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
688{
689 struct pinctrl_state *state;
7ecdb16f 690 struct pinctrl_setting *setting;
6e5e959d 691 int ret;
befe5bdf 692
6e5e959d
SW
693 state = find_state(p, map->name);
694 if (!state)
695 state = create_state(p, map->name);
696 if (IS_ERR(state))
697 return PTR_ERR(state);
befe5bdf 698
1e2082b5
SW
699 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
700 return 0;
701
6e5e959d
SW
702 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
703 if (setting == NULL) {
704 dev_err(p->dev,
705 "failed to alloc struct pinctrl_setting\n");
706 return -ENOMEM;
707 }
befe5bdf 708
1e2082b5
SW
709 setting->type = map->type;
710
6e5e959d
SW
711 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
712 if (setting->pctldev == NULL) {
6e5e959d 713 kfree(setting);
89216494
LW
714 /* Do not defer probing of hogs (circular loop) */
715 if (!strcmp(map->ctrl_dev_name, map->dev_name))
716 return -ENODEV;
c05127c4
LW
717 /*
718 * OK let us guess that the driver is not there yet, and
719 * let's defer obtaining this pinctrl handle to later...
720 */
89216494
LW
721 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
722 map->ctrl_dev_name);
c05127c4 723 return -EPROBE_DEFER;
6e5e959d
SW
724 }
725
1a78958d
LW
726 setting->dev_name = map->dev_name;
727
1e2082b5
SW
728 switch (map->type) {
729 case PIN_MAP_TYPE_MUX_GROUP:
730 ret = pinmux_map_to_setting(map, setting);
731 break;
732 case PIN_MAP_TYPE_CONFIGS_PIN:
733 case PIN_MAP_TYPE_CONFIGS_GROUP:
734 ret = pinconf_map_to_setting(map, setting);
735 break;
736 default:
737 ret = -EINVAL;
738 break;
739 }
6e5e959d
SW
740 if (ret < 0) {
741 kfree(setting);
742 return ret;
743 }
744
745 list_add_tail(&setting->node, &state->settings);
746
747 return 0;
748}
749
750static struct pinctrl *find_pinctrl(struct device *dev)
751{
752 struct pinctrl *p;
753
42fed7ba 754 mutex_lock(&pinctrl_list_mutex);
1e2082b5 755 list_for_each_entry(p, &pinctrl_list, node)
42fed7ba
PC
756 if (p->dev == dev) {
757 mutex_unlock(&pinctrl_list_mutex);
6e5e959d 758 return p;
42fed7ba 759 }
6e5e959d 760
42fed7ba 761 mutex_unlock(&pinctrl_list_mutex);
6e5e959d
SW
762 return NULL;
763}
764
42fed7ba 765static void pinctrl_free(struct pinctrl *p, bool inlist);
6e5e959d
SW
766
767static struct pinctrl *create_pinctrl(struct device *dev)
768{
769 struct pinctrl *p;
770 const char *devname;
771 struct pinctrl_maps *maps_node;
772 int i;
773 struct pinctrl_map const *map;
774 int ret;
befe5bdf
LW
775
776 /*
777 * create the state cookie holder struct pinctrl for each
778 * mapping, this is what consumers will get when requesting
779 * a pin control handle with pinctrl_get()
780 */
02f5b989 781 p = kzalloc(sizeof(*p), GFP_KERNEL);
95dcd4ae
SW
782 if (p == NULL) {
783 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 784 return ERR_PTR(-ENOMEM);
95dcd4ae 785 }
7ecdb16f 786 p->dev = dev;
6e5e959d 787 INIT_LIST_HEAD(&p->states);
57291ce2
SW
788 INIT_LIST_HEAD(&p->dt_maps);
789
790 ret = pinctrl_dt_to_map(p);
791 if (ret < 0) {
792 kfree(p);
793 return ERR_PTR(ret);
794 }
6e5e959d
SW
795
796 devname = dev_name(dev);
befe5bdf 797
42fed7ba 798 mutex_lock(&pinctrl_maps_mutex);
befe5bdf 799 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 800 for_each_maps(maps_node, i, map) {
7ecdb16f
SW
801 /* Map must be for this device */
802 if (strcmp(map->dev_name, devname))
803 continue;
804
6e5e959d 805 ret = add_setting(p, map);
89216494
LW
806 /*
807 * At this point the adding of a setting may:
808 *
809 * - Defer, if the pinctrl device is not yet available
810 * - Fail, if the pinctrl device is not yet available,
811 * AND the setting is a hog. We cannot defer that, since
812 * the hog will kick in immediately after the device
813 * is registered.
814 *
815 * If the error returned was not -EPROBE_DEFER then we
816 * accumulate the errors to see if we end up with
817 * an -EPROBE_DEFER later, as that is the worst case.
818 */
819 if (ret == -EPROBE_DEFER) {
42fed7ba
PC
820 pinctrl_free(p, false);
821 mutex_unlock(&pinctrl_maps_mutex);
6e5e959d 822 return ERR_PTR(ret);
7ecdb16f 823 }
befe5bdf 824 }
42fed7ba
PC
825 mutex_unlock(&pinctrl_maps_mutex);
826
89216494
LW
827 if (ret < 0) {
828 /* If some other error than deferral occured, return here */
42fed7ba 829 pinctrl_free(p, false);
89216494
LW
830 return ERR_PTR(ret);
831 }
befe5bdf 832
ab78029e
LW
833 kref_init(&p->users);
834
b0666ba4 835 /* Add the pinctrl handle to the global list */
8b9c139f 836 list_add_tail(&p->node, &pinctrl_list);
befe5bdf
LW
837
838 return p;
6e5e959d 839}
7ecdb16f 840
42fed7ba
PC
841/**
842 * pinctrl_get() - retrieves the pinctrl handle for a device
843 * @dev: the device to obtain the handle for
844 */
845struct pinctrl *pinctrl_get(struct device *dev)
6e5e959d
SW
846{
847 struct pinctrl *p;
7ecdb16f 848
6e5e959d
SW
849 if (WARN_ON(!dev))
850 return ERR_PTR(-EINVAL);
851
ab78029e
LW
852 /*
853 * See if somebody else (such as the device core) has already
854 * obtained a handle to the pinctrl for this device. In that case,
855 * return another pointer to it.
856 */
6e5e959d 857 p = find_pinctrl(dev);
ab78029e
LW
858 if (p != NULL) {
859 dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n");
860 kref_get(&p->users);
861 return p;
862 }
7ecdb16f 863
d599bfb3 864 return create_pinctrl(dev);
befe5bdf
LW
865}
866EXPORT_SYMBOL_GPL(pinctrl_get);
867
d3cee830
RG
868static void pinctrl_free_setting(bool disable_setting,
869 struct pinctrl_setting *setting)
870{
871 switch (setting->type) {
872 case PIN_MAP_TYPE_MUX_GROUP:
873 if (disable_setting)
874 pinmux_disable_setting(setting);
875 pinmux_free_setting(setting);
876 break;
877 case PIN_MAP_TYPE_CONFIGS_PIN:
878 case PIN_MAP_TYPE_CONFIGS_GROUP:
879 pinconf_free_setting(setting);
880 break;
881 default:
882 break;
883 }
884}
885
42fed7ba 886static void pinctrl_free(struct pinctrl *p, bool inlist)
befe5bdf 887{
6e5e959d
SW
888 struct pinctrl_state *state, *n1;
889 struct pinctrl_setting *setting, *n2;
890
42fed7ba 891 mutex_lock(&pinctrl_list_mutex);
6e5e959d
SW
892 list_for_each_entry_safe(state, n1, &p->states, node) {
893 list_for_each_entry_safe(setting, n2, &state->settings, node) {
d3cee830 894 pinctrl_free_setting(state == p->state, setting);
6e5e959d
SW
895 list_del(&setting->node);
896 kfree(setting);
897 }
898 list_del(&state->node);
899 kfree(state);
7ecdb16f 900 }
befe5bdf 901
57291ce2
SW
902 pinctrl_dt_free_maps(p);
903
6e5e959d
SW
904 if (inlist)
905 list_del(&p->node);
befe5bdf 906 kfree(p);
42fed7ba 907 mutex_unlock(&pinctrl_list_mutex);
befe5bdf 908}
befe5bdf
LW
909
910/**
ab78029e
LW
911 * pinctrl_release() - release the pinctrl handle
912 * @kref: the kref in the pinctrl being released
913 */
2917e833 914static void pinctrl_release(struct kref *kref)
ab78029e
LW
915{
916 struct pinctrl *p = container_of(kref, struct pinctrl, users);
917
42fed7ba 918 pinctrl_free(p, true);
ab78029e
LW
919}
920
921/**
922 * pinctrl_put() - decrease use count on a previously claimed pinctrl handle
6e5e959d 923 * @p: the pinctrl handle to release
befe5bdf 924 */
57b676f9
SW
925void pinctrl_put(struct pinctrl *p)
926{
ab78029e 927 kref_put(&p->users, pinctrl_release);
57b676f9
SW
928}
929EXPORT_SYMBOL_GPL(pinctrl_put);
930
42fed7ba
PC
931/**
932 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
933 * @p: the pinctrl handle to retrieve the state from
934 * @name: the state name to retrieve
935 */
936struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p,
937 const char *name)
befe5bdf 938{
6e5e959d 939 struct pinctrl_state *state;
befe5bdf 940
6e5e959d 941 state = find_state(p, name);
5b3aa5f7
DA
942 if (!state) {
943 if (pinctrl_dummy_state) {
944 /* create dummy state */
945 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
946 name);
947 state = create_state(p, name);
d599bfb3
RG
948 } else
949 state = ERR_PTR(-ENODEV);
5b3aa5f7 950 }
57b676f9 951
6e5e959d 952 return state;
befe5bdf 953}
42fed7ba 954EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
befe5bdf
LW
955
956/**
42fed7ba
PC
957 * pinctrl_select_state() - select/activate/program a pinctrl state to HW
958 * @p: the pinctrl handle for the device that requests configuration
959 * @state: the state handle to select/activate/program
befe5bdf 960 */
42fed7ba 961int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
befe5bdf 962{
6e5e959d 963 struct pinctrl_setting *setting, *setting2;
50cf7c8a 964 struct pinctrl_state *old_state = p->state;
6e5e959d 965 int ret;
7ecdb16f 966
6e5e959d
SW
967 if (p->state == state)
968 return 0;
befe5bdf 969
6e5e959d
SW
970 if (p->state) {
971 /*
972 * The set of groups with a mux configuration in the old state
973 * may not be identical to the set of groups with a mux setting
974 * in the new state. While this might be unusual, it's entirely
975 * possible for the "user"-supplied mapping table to be written
976 * that way. For each group that was configured in the old state
977 * but not in the new state, this code puts that group into a
978 * safe/disabled state.
979 */
980 list_for_each_entry(setting, &p->state->settings, node) {
981 bool found = false;
1e2082b5
SW
982 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
983 continue;
6e5e959d 984 list_for_each_entry(setting2, &state->settings, node) {
1e2082b5
SW
985 if (setting2->type != PIN_MAP_TYPE_MUX_GROUP)
986 continue;
987 if (setting2->data.mux.group ==
988 setting->data.mux.group) {
6e5e959d
SW
989 found = true;
990 break;
991 }
992 }
993 if (!found)
994 pinmux_disable_setting(setting);
995 }
996 }
997
3102a76c 998 p->state = NULL;
6e5e959d
SW
999
1000 /* Apply all the settings for the new state */
1001 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1002 switch (setting->type) {
1003 case PIN_MAP_TYPE_MUX_GROUP:
1004 ret = pinmux_enable_setting(setting);
1005 break;
1006 case PIN_MAP_TYPE_CONFIGS_PIN:
1007 case PIN_MAP_TYPE_CONFIGS_GROUP:
1008 ret = pinconf_apply_setting(setting);
1009 break;
1010 default:
1011 ret = -EINVAL;
1012 break;
1013 }
3102a76c 1014
42fed7ba 1015 if (ret < 0) {
3102a76c 1016 goto unapply_new_state;
42fed7ba 1017 }
befe5bdf 1018 }
6e5e959d 1019
3102a76c
RG
1020 p->state = state;
1021
6e5e959d 1022 return 0;
3102a76c
RG
1023
1024unapply_new_state:
da58751c 1025 dev_err(p->dev, "Error applying setting, reverse things back\n");
3102a76c 1026
3102a76c
RG
1027 list_for_each_entry(setting2, &state->settings, node) {
1028 if (&setting2->node == &setting->node)
1029 break;
af606177
RG
1030 /*
1031 * All we can do here is pinmux_disable_setting.
1032 * That means that some pins are muxed differently now
1033 * than they were before applying the setting (We can't
1034 * "unmux a pin"!), but it's not a big deal since the pins
1035 * are free to be muxed by another apply_setting.
1036 */
1037 if (setting2->type == PIN_MAP_TYPE_MUX_GROUP)
1038 pinmux_disable_setting(setting2);
3102a76c 1039 }
8009d5ff 1040
385d9424
RG
1041 /* There's no infinite recursive loop here because p->state is NULL */
1042 if (old_state)
42fed7ba 1043 pinctrl_select_state(p, old_state);
6e5e959d
SW
1044
1045 return ret;
befe5bdf 1046}
6e5e959d 1047EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 1048
6d4ca1fb
SW
1049static void devm_pinctrl_release(struct device *dev, void *res)
1050{
1051 pinctrl_put(*(struct pinctrl **)res);
1052}
1053
1054/**
1055 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
1056 * @dev: the device to obtain the handle for
1057 *
1058 * If there is a need to explicitly destroy the returned struct pinctrl,
1059 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
1060 */
1061struct pinctrl *devm_pinctrl_get(struct device *dev)
1062{
1063 struct pinctrl **ptr, *p;
1064
1065 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
1066 if (!ptr)
1067 return ERR_PTR(-ENOMEM);
1068
1069 p = pinctrl_get(dev);
1070 if (!IS_ERR(p)) {
1071 *ptr = p;
1072 devres_add(dev, ptr);
1073 } else {
1074 devres_free(ptr);
1075 }
1076
1077 return p;
1078}
1079EXPORT_SYMBOL_GPL(devm_pinctrl_get);
1080
1081static int devm_pinctrl_match(struct device *dev, void *res, void *data)
1082{
1083 struct pinctrl **p = res;
1084
1085 return *p == data;
1086}
1087
1088/**
1089 * devm_pinctrl_put() - Resource managed pinctrl_put()
1090 * @p: the pinctrl handle to release
1091 *
1092 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
1093 * this function will not need to be called and the resource management
1094 * code will ensure that the resource is freed.
1095 */
1096void devm_pinctrl_put(struct pinctrl *p)
1097{
a72149e8 1098 WARN_ON(devres_release(p->dev, devm_pinctrl_release,
6d4ca1fb 1099 devm_pinctrl_match, p));
6d4ca1fb
SW
1100}
1101EXPORT_SYMBOL_GPL(devm_pinctrl_put);
1102
57291ce2
SW
1103int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
1104 bool dup, bool locked)
befe5bdf 1105{
1e2082b5 1106 int i, ret;
b2b3e66e 1107 struct pinctrl_maps *maps_node;
befe5bdf
LW
1108
1109 pr_debug("add %d pinmux maps\n", num_maps);
1110
1111 /* First sanity check the new mapping */
1112 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
1113 if (!maps[i].dev_name) {
1114 pr_err("failed to register map %s (%d): no device given\n",
1115 maps[i].name, i);
1116 return -EINVAL;
1117 }
1118
befe5bdf
LW
1119 if (!maps[i].name) {
1120 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 1121 i);
befe5bdf
LW
1122 return -EINVAL;
1123 }
1124
1e2082b5
SW
1125 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
1126 !maps[i].ctrl_dev_name) {
befe5bdf
LW
1127 pr_err("failed to register map %s (%d): no pin control device given\n",
1128 maps[i].name, i);
1129 return -EINVAL;
1130 }
1131
1e2082b5
SW
1132 switch (maps[i].type) {
1133 case PIN_MAP_TYPE_DUMMY_STATE:
1134 break;
1135 case PIN_MAP_TYPE_MUX_GROUP:
1136 ret = pinmux_validate_map(&maps[i], i);
1137 if (ret < 0)
fde04f41 1138 return ret;
1e2082b5
SW
1139 break;
1140 case PIN_MAP_TYPE_CONFIGS_PIN:
1141 case PIN_MAP_TYPE_CONFIGS_GROUP:
1142 ret = pinconf_validate_map(&maps[i], i);
1143 if (ret < 0)
fde04f41 1144 return ret;
1e2082b5
SW
1145 break;
1146 default:
1147 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 1148 maps[i].name, i);
1681f5ae
SW
1149 return -EINVAL;
1150 }
befe5bdf
LW
1151 }
1152
b2b3e66e
SW
1153 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
1154 if (!maps_node) {
1155 pr_err("failed to alloc struct pinctrl_maps\n");
1156 return -ENOMEM;
1157 }
befe5bdf 1158
b2b3e66e 1159 maps_node->num_maps = num_maps;
57291ce2
SW
1160 if (dup) {
1161 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
1162 GFP_KERNEL);
1163 if (!maps_node->maps) {
1164 pr_err("failed to duplicate mapping table\n");
1165 kfree(maps_node);
1166 return -ENOMEM;
1167 }
1168 } else {
1169 maps_node->maps = maps;
befe5bdf
LW
1170 }
1171
57291ce2 1172 if (!locked)
42fed7ba 1173 mutex_lock(&pinctrl_maps_mutex);
b2b3e66e 1174 list_add_tail(&maps_node->node, &pinctrl_maps);
57291ce2 1175 if (!locked)
42fed7ba 1176 mutex_unlock(&pinctrl_maps_mutex);
b2b3e66e 1177
befe5bdf
LW
1178 return 0;
1179}
1180
57291ce2
SW
1181/**
1182 * pinctrl_register_mappings() - register a set of pin controller mappings
1183 * @maps: the pincontrol mappings table to register. This should probably be
1184 * marked with __initdata so it can be discarded after boot. This
1185 * function will perform a shallow copy for the mapping entries.
1186 * @num_maps: the number of maps in the mapping table
1187 */
1188int pinctrl_register_mappings(struct pinctrl_map const *maps,
1189 unsigned num_maps)
1190{
1191 return pinctrl_register_map(maps, num_maps, true, false);
1192}
1193
1194void pinctrl_unregister_map(struct pinctrl_map const *map)
1195{
1196 struct pinctrl_maps *maps_node;
1197
42fed7ba 1198 mutex_lock(&pinctrl_maps_mutex);
57291ce2
SW
1199 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1200 if (maps_node->maps == map) {
1201 list_del(&maps_node->node);
42fed7ba 1202 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1203 return;
1204 }
1205 }
42fed7ba 1206 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1207}
1208
840a47ba
JD
1209/**
1210 * pinctrl_force_sleep() - turn a given controller device into sleep state
1211 * @pctldev: pin controller device
1212 */
1213int pinctrl_force_sleep(struct pinctrl_dev *pctldev)
1214{
1215 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep))
1216 return pinctrl_select_state(pctldev->p, pctldev->hog_sleep);
1217 return 0;
1218}
1219EXPORT_SYMBOL_GPL(pinctrl_force_sleep);
1220
1221/**
1222 * pinctrl_force_default() - turn a given controller device into default state
1223 * @pctldev: pin controller device
1224 */
1225int pinctrl_force_default(struct pinctrl_dev *pctldev)
1226{
1227 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default))
1228 return pinctrl_select_state(pctldev->p, pctldev->hog_default);
1229 return 0;
1230}
1231EXPORT_SYMBOL_GPL(pinctrl_force_default);
1232
14005ee2
LW
1233#ifdef CONFIG_PM
1234
1235/**
f3333497 1236 * pinctrl_pm_select_state() - select pinctrl state for PM
14005ee2 1237 * @dev: device to select default state for
f3333497 1238 * @state: state to set
14005ee2 1239 */
f3333497
TL
1240static int pinctrl_pm_select_state(struct device *dev,
1241 struct pinctrl_state *state)
14005ee2
LW
1242{
1243 struct dev_pin_info *pins = dev->pins;
1244 int ret;
1245
f3333497
TL
1246 if (IS_ERR(state))
1247 return 0; /* No such state */
1248 ret = pinctrl_select_state(pins->p, state);
14005ee2 1249 if (ret)
f3333497
TL
1250 dev_err(dev, "failed to activate pinctrl state %s\n",
1251 state->name);
14005ee2
LW
1252 return ret;
1253}
f3333497
TL
1254
1255/**
1256 * pinctrl_pm_select_default_state() - select default pinctrl state for PM
1257 * @dev: device to select default state for
1258 */
1259int pinctrl_pm_select_default_state(struct device *dev)
1260{
1261 if (!dev->pins)
1262 return 0;
1263
1264 return pinctrl_pm_select_state(dev, dev->pins->default_state);
1265}
f472dead 1266EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state);
14005ee2
LW
1267
1268/**
1269 * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM
1270 * @dev: device to select sleep state for
1271 */
1272int pinctrl_pm_select_sleep_state(struct device *dev)
1273{
f3333497 1274 if (!dev->pins)
14005ee2 1275 return 0;
f3333497
TL
1276
1277 return pinctrl_pm_select_state(dev, dev->pins->sleep_state);
14005ee2 1278}
f472dead 1279EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state);
14005ee2
LW
1280
1281/**
1282 * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM
1283 * @dev: device to select idle state for
1284 */
1285int pinctrl_pm_select_idle_state(struct device *dev)
1286{
f3333497 1287 if (!dev->pins)
14005ee2 1288 return 0;
f3333497
TL
1289
1290 return pinctrl_pm_select_state(dev, dev->pins->idle_state);
14005ee2 1291}
f472dead 1292EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state);
14005ee2
LW
1293#endif
1294
2744e8af
LW
1295#ifdef CONFIG_DEBUG_FS
1296
1297static int pinctrl_pins_show(struct seq_file *s, void *what)
1298{
1299 struct pinctrl_dev *pctldev = s->private;
1300 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1301 unsigned i, pin;
2744e8af
LW
1302
1303 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1304
42fed7ba 1305 mutex_lock(&pctldev->mutex);
57b676f9 1306
706e8520
CP
1307 /* The pin number can be retrived from the pin controller descriptor */
1308 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1309 struct pin_desc *desc;
1310
706e8520 1311 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1312 desc = pin_desc_get(pctldev, pin);
1313 /* Pin space may be sparse */
1314 if (desc == NULL)
1315 continue;
1316
1317 seq_printf(s, "pin %d (%s) ", pin,
1318 desc->name ? desc->name : "unnamed");
1319
1320 /* Driver-specific info per pin */
1321 if (ops->pin_dbg_show)
1322 ops->pin_dbg_show(pctldev, s, pin);
1323
1324 seq_puts(s, "\n");
1325 }
1326
42fed7ba 1327 mutex_unlock(&pctldev->mutex);
57b676f9 1328
2744e8af
LW
1329 return 0;
1330}
1331
1332static int pinctrl_groups_show(struct seq_file *s, void *what)
1333{
1334 struct pinctrl_dev *pctldev = s->private;
1335 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1336 unsigned ngroups, selector = 0;
2744e8af 1337
42fed7ba
PC
1338 mutex_lock(&pctldev->mutex);
1339
d1e90e9e 1340 ngroups = ops->get_groups_count(pctldev);
57b676f9 1341
2744e8af 1342 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1343 while (selector < ngroups) {
a5818a8b 1344 const unsigned *pins;
2744e8af
LW
1345 unsigned num_pins;
1346 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1347 const char *pname;
2744e8af
LW
1348 int ret;
1349 int i;
1350
1351 ret = ops->get_group_pins(pctldev, selector,
1352 &pins, &num_pins);
1353 if (ret)
1354 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1355 gname);
1356 else {
dcb5dbc3
DA
1357 seq_printf(s, "group: %s\n", gname);
1358 for (i = 0; i < num_pins; i++) {
1359 pname = pin_get_name(pctldev, pins[i]);
b4dd784b 1360 if (WARN_ON(!pname)) {
42fed7ba 1361 mutex_unlock(&pctldev->mutex);
dcb5dbc3 1362 return -EINVAL;
b4dd784b 1363 }
dcb5dbc3
DA
1364 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1365 }
1366 seq_puts(s, "\n");
2744e8af
LW
1367 }
1368 selector++;
1369 }
1370
42fed7ba 1371 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1372
1373 return 0;
1374}
1375
1376static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1377{
1378 struct pinctrl_dev *pctldev = s->private;
1379 struct pinctrl_gpio_range *range = NULL;
1380
1381 seq_puts(s, "GPIO ranges handled:\n");
1382
42fed7ba 1383 mutex_lock(&pctldev->mutex);
57b676f9 1384
2744e8af 1385 /* Loop over the ranges */
2744e8af 1386 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
c8587eee
CR
1387 if (range->pins) {
1388 int a;
1389 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {",
1390 range->id, range->name,
1391 range->base, (range->base + range->npins - 1));
1392 for (a = 0; a < range->npins - 1; a++)
1393 seq_printf(s, "%u, ", range->pins[a]);
1394 seq_printf(s, "%u}\n", range->pins[a]);
1395 }
1396 else
1397 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1398 range->id, range->name,
1399 range->base, (range->base + range->npins - 1),
1400 range->pin_base,
1401 (range->pin_base + range->npins - 1));
2744e8af 1402 }
57b676f9 1403
42fed7ba 1404 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1405
1406 return 0;
1407}
1408
1409static int pinctrl_devices_show(struct seq_file *s, void *what)
1410{
1411 struct pinctrl_dev *pctldev;
1412
ae6b4d85 1413 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9 1414
42fed7ba 1415 mutex_lock(&pinctrldev_list_mutex);
57b676f9 1416
2744e8af
LW
1417 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1418 seq_printf(s, "%s ", pctldev->desc->name);
1419 if (pctldev->desc->pmxops)
ae6b4d85
LW
1420 seq_puts(s, "yes ");
1421 else
1422 seq_puts(s, "no ");
1423 if (pctldev->desc->confops)
2744e8af
LW
1424 seq_puts(s, "yes");
1425 else
1426 seq_puts(s, "no");
1427 seq_puts(s, "\n");
1428 }
57b676f9 1429
42fed7ba 1430 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1431
1432 return 0;
1433}
1434
1e2082b5
SW
1435static inline const char *map_type(enum pinctrl_map_type type)
1436{
1437 static const char * const names[] = {
1438 "INVALID",
1439 "DUMMY_STATE",
1440 "MUX_GROUP",
1441 "CONFIGS_PIN",
1442 "CONFIGS_GROUP",
1443 };
1444
1445 if (type >= ARRAY_SIZE(names))
1446 return "UNKNOWN";
1447
1448 return names[type];
1449}
1450
3eedb437
SW
1451static int pinctrl_maps_show(struct seq_file *s, void *what)
1452{
1453 struct pinctrl_maps *maps_node;
1454 int i;
1455 struct pinctrl_map const *map;
1456
1457 seq_puts(s, "Pinctrl maps:\n");
1458
42fed7ba 1459 mutex_lock(&pinctrl_maps_mutex);
3eedb437 1460 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1461 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1462 map->dev_name, map->name, map_type(map->type),
1463 map->type);
1464
1465 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1466 seq_printf(s, "controlling device %s\n",
1467 map->ctrl_dev_name);
1468
1469 switch (map->type) {
1470 case PIN_MAP_TYPE_MUX_GROUP:
1471 pinmux_show_map(s, map);
1472 break;
1473 case PIN_MAP_TYPE_CONFIGS_PIN:
1474 case PIN_MAP_TYPE_CONFIGS_GROUP:
1475 pinconf_show_map(s, map);
1476 break;
1477 default:
1478 break;
1479 }
1480
1481 seq_printf(s, "\n");
3eedb437 1482 }
42fed7ba 1483 mutex_unlock(&pinctrl_maps_mutex);
3eedb437
SW
1484
1485 return 0;
1486}
1487
befe5bdf
LW
1488static int pinctrl_show(struct seq_file *s, void *what)
1489{
1490 struct pinctrl *p;
6e5e959d 1491 struct pinctrl_state *state;
7ecdb16f 1492 struct pinctrl_setting *setting;
befe5bdf
LW
1493
1494 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9 1495
42fed7ba 1496 mutex_lock(&pinctrl_list_mutex);
57b676f9 1497
befe5bdf 1498 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1499 seq_printf(s, "device: %s current state: %s\n",
1500 dev_name(p->dev),
1501 p->state ? p->state->name : "none");
1502
1503 list_for_each_entry(state, &p->states, node) {
1504 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1505
6e5e959d 1506 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1507 struct pinctrl_dev *pctldev = setting->pctldev;
1508
1509 seq_printf(s, " type: %s controller %s ",
1510 map_type(setting->type),
1511 pinctrl_dev_get_name(pctldev));
1512
1513 switch (setting->type) {
1514 case PIN_MAP_TYPE_MUX_GROUP:
1515 pinmux_show_setting(s, setting);
1516 break;
1517 case PIN_MAP_TYPE_CONFIGS_PIN:
1518 case PIN_MAP_TYPE_CONFIGS_GROUP:
1519 pinconf_show_setting(s, setting);
1520 break;
1521 default:
1522 break;
1523 }
6e5e959d 1524 }
befe5bdf 1525 }
befe5bdf
LW
1526 }
1527
42fed7ba 1528 mutex_unlock(&pinctrl_list_mutex);
57b676f9 1529
befe5bdf
LW
1530 return 0;
1531}
1532
2744e8af
LW
1533static int pinctrl_pins_open(struct inode *inode, struct file *file)
1534{
1535 return single_open(file, pinctrl_pins_show, inode->i_private);
1536}
1537
1538static int pinctrl_groups_open(struct inode *inode, struct file *file)
1539{
1540 return single_open(file, pinctrl_groups_show, inode->i_private);
1541}
1542
1543static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1544{
1545 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1546}
1547
1548static int pinctrl_devices_open(struct inode *inode, struct file *file)
1549{
1550 return single_open(file, pinctrl_devices_show, NULL);
1551}
1552
3eedb437
SW
1553static int pinctrl_maps_open(struct inode *inode, struct file *file)
1554{
1555 return single_open(file, pinctrl_maps_show, NULL);
1556}
1557
befe5bdf
LW
1558static int pinctrl_open(struct inode *inode, struct file *file)
1559{
1560 return single_open(file, pinctrl_show, NULL);
1561}
1562
2744e8af
LW
1563static const struct file_operations pinctrl_pins_ops = {
1564 .open = pinctrl_pins_open,
1565 .read = seq_read,
1566 .llseek = seq_lseek,
1567 .release = single_release,
1568};
1569
1570static const struct file_operations pinctrl_groups_ops = {
1571 .open = pinctrl_groups_open,
1572 .read = seq_read,
1573 .llseek = seq_lseek,
1574 .release = single_release,
1575};
1576
1577static const struct file_operations pinctrl_gpioranges_ops = {
1578 .open = pinctrl_gpioranges_open,
1579 .read = seq_read,
1580 .llseek = seq_lseek,
1581 .release = single_release,
1582};
1583
3eedb437
SW
1584static const struct file_operations pinctrl_devices_ops = {
1585 .open = pinctrl_devices_open,
befe5bdf
LW
1586 .read = seq_read,
1587 .llseek = seq_lseek,
1588 .release = single_release,
1589};
1590
3eedb437
SW
1591static const struct file_operations pinctrl_maps_ops = {
1592 .open = pinctrl_maps_open,
2744e8af
LW
1593 .read = seq_read,
1594 .llseek = seq_lseek,
1595 .release = single_release,
1596};
1597
befe5bdf
LW
1598static const struct file_operations pinctrl_ops = {
1599 .open = pinctrl_open,
1600 .read = seq_read,
1601 .llseek = seq_lseek,
1602 .release = single_release,
1603};
1604
2744e8af
LW
1605static struct dentry *debugfs_root;
1606
1607static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1608{
02157160 1609 struct dentry *device_root;
2744e8af 1610
51cd24ee 1611 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1612 debugfs_root);
02157160
TL
1613 pctldev->device_root = device_root;
1614
2744e8af
LW
1615 if (IS_ERR(device_root) || !device_root) {
1616 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1617 dev_name(pctldev->dev));
2744e8af
LW
1618 return;
1619 }
1620 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1621 device_root, pctldev, &pinctrl_pins_ops);
1622 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1623 device_root, pctldev, &pinctrl_groups_ops);
1624 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1625 device_root, pctldev, &pinctrl_gpioranges_ops);
1626 pinmux_init_device_debugfs(device_root, pctldev);
ae6b4d85 1627 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1628}
1629
02157160
TL
1630static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1631{
1632 debugfs_remove_recursive(pctldev->device_root);
1633}
1634
2744e8af
LW
1635static void pinctrl_init_debugfs(void)
1636{
1637 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1638 if (IS_ERR(debugfs_root) || !debugfs_root) {
1639 pr_warn("failed to create debugfs directory\n");
1640 debugfs_root = NULL;
1641 return;
1642 }
1643
1644 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1645 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1646 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1647 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1648 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1649 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1650}
1651
1652#else /* CONFIG_DEBUG_FS */
1653
1654static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1655{
1656}
1657
1658static void pinctrl_init_debugfs(void)
1659{
1660}
1661
02157160
TL
1662static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1663{
1664}
1665
2744e8af
LW
1666#endif
1667
d26bc49f
SW
1668static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1669{
1670 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1671
1672 if (!ops ||
d1e90e9e 1673 !ops->get_groups_count ||
d26bc49f
SW
1674 !ops->get_group_name ||
1675 !ops->get_group_pins)
1676 return -EINVAL;
1677
57291ce2
SW
1678 if (ops->dt_node_to_map && !ops->dt_free_map)
1679 return -EINVAL;
1680
d26bc49f
SW
1681 return 0;
1682}
1683
2744e8af
LW
1684/**
1685 * pinctrl_register() - register a pin controller device
1686 * @pctldesc: descriptor for this pin controller
1687 * @dev: parent device for this pin controller
1688 * @driver_data: private pin controller data for this pin controller
1689 */
1690struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1691 struct device *dev, void *driver_data)
1692{
2744e8af
LW
1693 struct pinctrl_dev *pctldev;
1694 int ret;
1695
da9aecb0 1696 if (!pctldesc)
2744e8af 1697 return NULL;
da9aecb0 1698 if (!pctldesc->name)
2744e8af
LW
1699 return NULL;
1700
02f5b989 1701 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1702 if (pctldev == NULL) {
1703 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
b9130b77 1704 return NULL;
95dcd4ae 1705 }
b9130b77
TL
1706
1707 /* Initialize pin control device struct */
1708 pctldev->owner = pctldesc->owner;
1709 pctldev->desc = pctldesc;
1710 pctldev->driver_data = driver_data;
1711 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1712 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77 1713 pctldev->dev = dev;
42fed7ba 1714 mutex_init(&pctldev->mutex);
b9130b77 1715
d26bc49f 1716 /* check core ops for sanity */
da9aecb0 1717 if (pinctrl_check_ops(pctldev)) {
ad6e1107 1718 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1719 goto out_err;
1720 }
1721
2744e8af
LW
1722 /* If we're implementing pinmuxing, check the ops for sanity */
1723 if (pctldesc->pmxops) {
da9aecb0 1724 if (pinmux_check_ops(pctldev))
b9130b77 1725 goto out_err;
2744e8af
LW
1726 }
1727
ae6b4d85
LW
1728 /* If we're implementing pinconfig, check the ops for sanity */
1729 if (pctldesc->confops) {
da9aecb0 1730 if (pinconf_check_ops(pctldev))
b9130b77 1731 goto out_err;
ae6b4d85
LW
1732 }
1733
2744e8af 1734 /* Register all the pins */
ad6e1107 1735 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1736 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1737 if (ret) {
ad6e1107 1738 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1739 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1740 pctldesc->npins);
51cd24ee 1741 goto out_err;
2744e8af
LW
1742 }
1743
42fed7ba 1744 mutex_lock(&pinctrldev_list_mutex);
8b9c139f 1745 list_add_tail(&pctldev->node, &pinctrldev_list);
42fed7ba
PC
1746 mutex_unlock(&pinctrldev_list_mutex);
1747
1748 pctldev->p = pinctrl_get(pctldev->dev);
57b676f9 1749
6e5e959d 1750 if (!IS_ERR(pctldev->p)) {
840a47ba 1751 pctldev->hog_default =
42fed7ba 1752 pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
840a47ba 1753 if (IS_ERR(pctldev->hog_default)) {
ad6e1107
JC
1754 dev_dbg(dev, "failed to lookup the default state\n");
1755 } else {
42fed7ba 1756 if (pinctrl_select_state(pctldev->p,
840a47ba 1757 pctldev->hog_default))
ad6e1107
JC
1758 dev_err(dev,
1759 "failed to select default state\n");
ad6e1107 1760 }
840a47ba
JD
1761
1762 pctldev->hog_sleep =
42fed7ba 1763 pinctrl_lookup_state(pctldev->p,
840a47ba
JD
1764 PINCTRL_STATE_SLEEP);
1765 if (IS_ERR(pctldev->hog_sleep))
1766 dev_dbg(dev, "failed to lookup the sleep state\n");
6e5e959d 1767 }
57b676f9 1768
2304b473
SW
1769 pinctrl_init_device_debugfs(pctldev);
1770
2744e8af
LW
1771 return pctldev;
1772
51cd24ee 1773out_err:
42fed7ba 1774 mutex_destroy(&pctldev->mutex);
51cd24ee 1775 kfree(pctldev);
2744e8af
LW
1776 return NULL;
1777}
1778EXPORT_SYMBOL_GPL(pinctrl_register);
1779
1780/**
1781 * pinctrl_unregister() - unregister pinmux
1782 * @pctldev: pin controller to unregister
1783 *
1784 * Called by pinmux drivers to unregister a pinmux.
1785 */
1786void pinctrl_unregister(struct pinctrl_dev *pctldev)
1787{
5d589b09 1788 struct pinctrl_gpio_range *range, *n;
2744e8af
LW
1789 if (pctldev == NULL)
1790 return;
1791
42fed7ba
PC
1792 mutex_lock(&pinctrldev_list_mutex);
1793 mutex_lock(&pctldev->mutex);
57b676f9 1794
42fed7ba 1795 pinctrl_remove_device_debugfs(pctldev);
57b676f9 1796
6e5e959d 1797 if (!IS_ERR(pctldev->p))
42fed7ba 1798 pinctrl_put(pctldev->p);
57b676f9 1799
2744e8af 1800 /* TODO: check that no pinmuxes are still active? */
2744e8af 1801 list_del(&pctldev->node);
2744e8af
LW
1802 /* Destroy descriptor tree */
1803 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1804 pctldev->desc->npins);
5d589b09
DA
1805 /* remove gpio ranges map */
1806 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
1807 list_del(&range->node);
1808
42fed7ba
PC
1809 mutex_unlock(&pctldev->mutex);
1810 mutex_destroy(&pctldev->mutex);
51cd24ee 1811 kfree(pctldev);
42fed7ba 1812 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1813}
1814EXPORT_SYMBOL_GPL(pinctrl_unregister);
1815
1816static int __init pinctrl_init(void)
1817{
1818 pr_info("initialized pinctrl subsystem\n");
1819 pinctrl_init_debugfs();
1820 return 0;
1821}
1822
1823/* init early since many drivers really need to initialized pinmux early */
1824core_initcall(pinctrl_init);