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Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/pinctrl/pinctrl.h> | |
27 | #include <linux/pinctrl/machine.h> | |
28 | #include "core.h" | |
29 | #include "pinmux.h" | |
ae6b4d85 | 30 | #include "pinconf.h" |
2744e8af | 31 | |
b2b3e66e SW |
32 | /** |
33 | * struct pinctrl_maps - a list item containing part of the mapping table | |
34 | * @node: mapping table list node | |
35 | * @maps: array of mapping table entries | |
36 | * @num_maps: the number of entries in @maps | |
37 | */ | |
38 | struct pinctrl_maps { | |
39 | struct list_head node; | |
40 | struct pinctrl_map const *maps; | |
41 | unsigned num_maps; | |
42 | }; | |
43 | ||
57b676f9 SW |
44 | /* Mutex taken by all entry points */ |
45 | DEFINE_MUTEX(pinctrl_mutex); | |
46 | ||
47 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
2744e8af LW |
48 | static LIST_HEAD(pinctrldev_list); |
49 | ||
57b676f9 | 50 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
51 | static LIST_HEAD(pinctrl_list); |
52 | ||
57b676f9 | 53 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
54 | static LIST_HEAD(pinctrl_maps); |
55 | ||
56 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
57 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
58 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
59 | _i_ < _maps_node_->num_maps; \ | |
60 | i++, _map_ = &_maps_node_->maps[_i_]) | |
befe5bdf | 61 | |
2744e8af LW |
62 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
63 | { | |
64 | /* We're not allowed to register devices without name */ | |
65 | return pctldev->desc->name; | |
66 | } | |
67 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
68 | ||
69 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
70 | { | |
71 | return pctldev->driver_data; | |
72 | } | |
73 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
74 | ||
75 | /** | |
9dfac4fd LW |
76 | * get_pinctrl_dev_from_devname() - look up pin controller device |
77 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
78 | * |
79 | * Looks up a pin control device matching a certain device name or pure device | |
80 | * pointer, the pure device pointer will take precedence. | |
81 | */ | |
9dfac4fd | 82 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
83 | { |
84 | struct pinctrl_dev *pctldev = NULL; | |
85 | bool found = false; | |
86 | ||
9dfac4fd LW |
87 | if (!devname) |
88 | return NULL; | |
89 | ||
2744e8af | 90 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 91 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
92 | /* Matched on device name */ |
93 | found = true; | |
94 | break; | |
95 | } | |
96 | } | |
2744e8af LW |
97 | |
98 | return found ? pctldev : NULL; | |
99 | } | |
100 | ||
ae6b4d85 LW |
101 | /** |
102 | * pin_get_from_name() - look up a pin number from a name | |
103 | * @pctldev: the pin control device to lookup the pin on | |
104 | * @name: the name of the pin to look up | |
105 | */ | |
106 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
107 | { | |
706e8520 | 108 | unsigned i, pin; |
ae6b4d85 | 109 | |
706e8520 CP |
110 | /* The pin number can be retrived from the pin controller descriptor */ |
111 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
112 | struct pin_desc *desc; |
113 | ||
706e8520 | 114 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
115 | desc = pin_desc_get(pctldev, pin); |
116 | /* Pin space may be sparse */ | |
117 | if (desc == NULL) | |
118 | continue; | |
119 | if (desc->name && !strcmp(name, desc->name)) | |
120 | return pin; | |
121 | } | |
122 | ||
123 | return -EINVAL; | |
124 | } | |
125 | ||
2744e8af LW |
126 | /** |
127 | * pin_is_valid() - check if pin exists on controller | |
128 | * @pctldev: the pin control device to check the pin on | |
129 | * @pin: pin to check, use the local pin controller index number | |
130 | * | |
131 | * This tells us whether a certain pin exist on a certain pin controller or | |
132 | * not. Pin lists may be sparse, so some pins may not exist. | |
133 | */ | |
134 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
135 | { | |
136 | struct pin_desc *pindesc; | |
137 | ||
138 | if (pin < 0) | |
139 | return false; | |
140 | ||
57b676f9 | 141 | mutex_lock(&pinctrl_mutex); |
2744e8af | 142 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 143 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 144 | |
57b676f9 | 145 | return pindesc != NULL; |
2744e8af LW |
146 | } |
147 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
148 | ||
149 | /* Deletes a range of pin descriptors */ | |
150 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
151 | const struct pinctrl_pin_desc *pins, | |
152 | unsigned num_pins) | |
153 | { | |
154 | int i; | |
155 | ||
2744e8af LW |
156 | for (i = 0; i < num_pins; i++) { |
157 | struct pin_desc *pindesc; | |
158 | ||
159 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
160 | pins[i].number); | |
161 | if (pindesc != NULL) { | |
162 | radix_tree_delete(&pctldev->pin_desc_tree, | |
163 | pins[i].number); | |
ca53c5f1 LW |
164 | if (pindesc->dynamic_name) |
165 | kfree(pindesc->name); | |
2744e8af LW |
166 | } |
167 | kfree(pindesc); | |
168 | } | |
2744e8af LW |
169 | } |
170 | ||
171 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
172 | unsigned number, const char *name) | |
173 | { | |
174 | struct pin_desc *pindesc; | |
175 | ||
176 | pindesc = pin_desc_get(pctldev, number); | |
177 | if (pindesc != NULL) { | |
178 | pr_err("pin %d already registered on %s\n", number, | |
179 | pctldev->desc->name); | |
180 | return -EINVAL; | |
181 | } | |
182 | ||
183 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
184 | if (pindesc == NULL) { |
185 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 186 | return -ENOMEM; |
95dcd4ae | 187 | } |
ae6b4d85 | 188 | |
2744e8af LW |
189 | /* Set owner */ |
190 | pindesc->pctldev = pctldev; | |
191 | ||
9af1e44f | 192 | /* Copy basic pin info */ |
8dc6ae4d | 193 | if (name) { |
ca53c5f1 LW |
194 | pindesc->name = name; |
195 | } else { | |
196 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
197 | if (pindesc->name == NULL) | |
198 | return -ENOMEM; | |
199 | pindesc->dynamic_name = true; | |
200 | } | |
2744e8af | 201 | |
2744e8af | 202 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 203 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 204 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
205 | return 0; |
206 | } | |
207 | ||
208 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
209 | struct pinctrl_pin_desc const *pins, | |
210 | unsigned num_descs) | |
211 | { | |
212 | unsigned i; | |
213 | int ret = 0; | |
214 | ||
215 | for (i = 0; i < num_descs; i++) { | |
216 | ret = pinctrl_register_one_pin(pctldev, | |
217 | pins[i].number, pins[i].name); | |
218 | if (ret) | |
219 | return ret; | |
220 | } | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
225 | /** | |
226 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
227 | * @pctldev: pin controller device to check | |
228 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
229 | * | |
230 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
231 | * controller, return the range or NULL | |
232 | */ | |
233 | static struct pinctrl_gpio_range * | |
234 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
235 | { | |
236 | struct pinctrl_gpio_range *range = NULL; | |
237 | ||
238 | /* Loop over the ranges */ | |
2744e8af LW |
239 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
240 | /* Check if we're in the valid range */ | |
241 | if (gpio >= range->base && | |
242 | gpio < range->base + range->npins) { | |
2744e8af LW |
243 | return range; |
244 | } | |
245 | } | |
2744e8af LW |
246 | |
247 | return NULL; | |
248 | } | |
249 | ||
250 | /** | |
251 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
252 | * @gpio: the pin to locate the pin controller for | |
253 | * @outdev: the pin control device if found | |
254 | * @outrange: the GPIO range if found | |
255 | * | |
256 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
257 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
258 | * negative if the GPIO range could not be found in any device. | |
259 | */ | |
4ecce45d SW |
260 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
261 | struct pinctrl_dev **outdev, | |
262 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
263 | { |
264 | struct pinctrl_dev *pctldev = NULL; | |
265 | ||
266 | /* Loop over the pin controllers */ | |
2744e8af LW |
267 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
268 | struct pinctrl_gpio_range *range; | |
269 | ||
270 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
271 | if (range != NULL) { | |
272 | *outdev = pctldev; | |
273 | *outrange = range; | |
2744e8af LW |
274 | return 0; |
275 | } | |
276 | } | |
2744e8af LW |
277 | |
278 | return -EINVAL; | |
279 | } | |
280 | ||
281 | /** | |
282 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
283 | * @pctldev: pin controller device to add the range to | |
284 | * @range: the GPIO range to add | |
285 | * | |
286 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
287 | * this to register handled ranges after registering your pin controller. | |
288 | */ | |
289 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
290 | struct pinctrl_gpio_range *range) | |
291 | { | |
57b676f9 | 292 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 293 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 294 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 295 | } |
4ecce45d | 296 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af LW |
297 | |
298 | /** | |
299 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
300 | * @pctldev: pin controller device to remove the range from | |
301 | * @range: the GPIO range to remove | |
302 | */ | |
303 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
304 | struct pinctrl_gpio_range *range) | |
305 | { | |
57b676f9 | 306 | mutex_lock(&pinctrl_mutex); |
2744e8af | 307 | list_del(&range->node); |
57b676f9 | 308 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 309 | } |
4ecce45d | 310 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); |
2744e8af | 311 | |
7afde8ba LW |
312 | /** |
313 | * pinctrl_get_group_selector() - returns the group selector for a group | |
314 | * @pctldev: the pin controller handling the group | |
315 | * @pin_group: the pin group to look up | |
316 | */ | |
317 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
318 | const char *pin_group) | |
319 | { | |
320 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
321 | unsigned group_selector = 0; | |
322 | ||
323 | while (pctlops->list_groups(pctldev, group_selector) >= 0) { | |
324 | const char *gname = pctlops->get_group_name(pctldev, | |
325 | group_selector); | |
326 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 327 | dev_dbg(pctldev->dev, |
7afde8ba LW |
328 | "found group selector %u for %s\n", |
329 | group_selector, | |
330 | pin_group); | |
331 | return group_selector; | |
332 | } | |
333 | ||
334 | group_selector++; | |
335 | } | |
336 | ||
51cd24ee | 337 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
338 | pin_group); |
339 | ||
340 | return -EINVAL; | |
341 | } | |
342 | ||
befe5bdf LW |
343 | /** |
344 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
345 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
346 | * | |
347 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
348 | * as part of their gpio_request() semantics, platforms and individual drivers | |
349 | * shall *NOT* request GPIO pins to be muxed in. | |
350 | */ | |
351 | int pinctrl_request_gpio(unsigned gpio) | |
352 | { | |
353 | struct pinctrl_dev *pctldev; | |
354 | struct pinctrl_gpio_range *range; | |
355 | int ret; | |
356 | int pin; | |
357 | ||
57b676f9 SW |
358 | mutex_lock(&pinctrl_mutex); |
359 | ||
befe5bdf | 360 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
361 | if (ret) { |
362 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 363 | return -EINVAL; |
57b676f9 | 364 | } |
befe5bdf LW |
365 | |
366 | /* Convert to the pin controllers number space */ | |
367 | pin = gpio - range->base + range->pin_base; | |
368 | ||
57b676f9 SW |
369 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
370 | ||
371 | mutex_unlock(&pinctrl_mutex); | |
372 | return ret; | |
befe5bdf LW |
373 | } |
374 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
375 | ||
376 | /** | |
377 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
378 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
379 | * | |
380 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
381 | * as part of their gpio_free() semantics, platforms and individual drivers | |
382 | * shall *NOT* request GPIO pins to be muxed out. | |
383 | */ | |
384 | void pinctrl_free_gpio(unsigned gpio) | |
385 | { | |
386 | struct pinctrl_dev *pctldev; | |
387 | struct pinctrl_gpio_range *range; | |
388 | int ret; | |
389 | int pin; | |
390 | ||
57b676f9 SW |
391 | mutex_lock(&pinctrl_mutex); |
392 | ||
befe5bdf | 393 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
394 | if (ret) { |
395 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 396 | return; |
57b676f9 | 397 | } |
befe5bdf LW |
398 | |
399 | /* Convert to the pin controllers number space */ | |
400 | pin = gpio - range->base + range->pin_base; | |
401 | ||
57b676f9 SW |
402 | pinmux_free_gpio(pctldev, pin, range); |
403 | ||
404 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
405 | } |
406 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
407 | ||
408 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
409 | { | |
410 | struct pinctrl_dev *pctldev; | |
411 | struct pinctrl_gpio_range *range; | |
412 | int ret; | |
413 | int pin; | |
414 | ||
415 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
416 | if (ret) | |
417 | return ret; | |
418 | ||
419 | /* Convert to the pin controllers number space */ | |
420 | pin = gpio - range->base + range->pin_base; | |
421 | ||
422 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
423 | } | |
424 | ||
425 | /** | |
426 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
427 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
428 | * | |
429 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
430 | * as part of their gpio_direction_input() semantics, platforms and individual | |
431 | * drivers shall *NOT* touch pin control GPIO calls. | |
432 | */ | |
433 | int pinctrl_gpio_direction_input(unsigned gpio) | |
434 | { | |
57b676f9 SW |
435 | int ret; |
436 | mutex_lock(&pinctrl_mutex); | |
437 | ret = pinctrl_gpio_direction(gpio, true); | |
438 | mutex_unlock(&pinctrl_mutex); | |
439 | return ret; | |
befe5bdf LW |
440 | } |
441 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
442 | ||
443 | /** | |
444 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
445 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
446 | * | |
447 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
448 | * as part of their gpio_direction_output() semantics, platforms and individual | |
449 | * drivers shall *NOT* touch pin control GPIO calls. | |
450 | */ | |
451 | int pinctrl_gpio_direction_output(unsigned gpio) | |
452 | { | |
57b676f9 SW |
453 | int ret; |
454 | mutex_lock(&pinctrl_mutex); | |
455 | ret = pinctrl_gpio_direction(gpio, false); | |
456 | mutex_unlock(&pinctrl_mutex); | |
457 | return ret; | |
befe5bdf LW |
458 | } |
459 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
460 | ||
b2b3e66e | 461 | static struct pinctrl *pinctrl_get_locked(struct device *dev, const char *name) |
befe5bdf | 462 | { |
7ecdb16f | 463 | struct pinctrl_dev *pctldev; |
1681f5ae | 464 | const char *devname; |
befe5bdf | 465 | struct pinctrl *p; |
befe5bdf | 466 | unsigned num_maps = 0; |
7ecdb16f | 467 | int ret; |
b2b3e66e | 468 | struct pinctrl_maps *maps_node; |
befe5bdf | 469 | int i; |
b2b3e66e | 470 | struct pinctrl_map const *map; |
7ecdb16f | 471 | struct pinctrl_setting *setting; |
befe5bdf | 472 | |
110e4ec5 SW |
473 | /* We must have both a dev and state name */ |
474 | if (WARN_ON(!dev || !name)) | |
befe5bdf LW |
475 | return ERR_PTR(-EINVAL); |
476 | ||
1681f5ae | 477 | devname = dev_name(dev); |
befe5bdf | 478 | |
95dcd4ae | 479 | dev_dbg(dev, "pinctrl_get() for device %s state %s\n", devname, name); |
befe5bdf LW |
480 | |
481 | /* | |
482 | * create the state cookie holder struct pinctrl for each | |
483 | * mapping, this is what consumers will get when requesting | |
484 | * a pin control handle with pinctrl_get() | |
485 | */ | |
02f5b989 | 486 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
487 | if (p == NULL) { |
488 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 489 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 490 | } |
7ecdb16f SW |
491 | p->dev = dev; |
492 | p->state = name; | |
493 | INIT_LIST_HEAD(&p->settings); | |
befe5bdf LW |
494 | |
495 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 496 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
497 | /* Map must be for this device */ |
498 | if (strcmp(map->dev_name, devname)) | |
499 | continue; | |
500 | ||
501 | /* State name must be the one we're looking for */ | |
502 | if (strcmp(map->name, name)) | |
503 | continue; | |
504 | ||
befe5bdf | 505 | /* |
7ecdb16f | 506 | * Try to find the pctldev given in the map |
befe5bdf LW |
507 | */ |
508 | pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
509 | if (!pctldev) { | |
b1eed4ec SW |
510 | dev_err(dev, "unknown pinctrl device %s in map entry", |
511 | map->ctrl_dev_name); | |
b1eed4ec | 512 | /* Eventually, this should trigger deferred probe */ |
7ecdb16f SW |
513 | ret = -ENODEV; |
514 | goto error; | |
befe5bdf LW |
515 | } |
516 | ||
95dcd4ae SW |
517 | dev_dbg(dev, "in map, found pctldev %s to handle function %s", |
518 | dev_name(pctldev->dev), map->function); | |
befe5bdf | 519 | |
7ecdb16f SW |
520 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
521 | if (setting == NULL) { | |
522 | dev_err(dev, | |
523 | "failed to alloc struct pinctrl_setting\n"); | |
524 | ret = -ENOMEM; | |
525 | goto error; | |
526 | } | |
1681f5ae | 527 | |
7ecdb16f SW |
528 | setting->pctldev = pctldev; |
529 | ret = pinmux_map_to_setting(map, setting); | |
530 | if (ret < 0) | |
531 | goto error; | |
532 | ||
533 | list_add_tail(&setting->node, &p->settings); | |
befe5bdf | 534 | |
1681f5ae | 535 | num_maps++; |
befe5bdf LW |
536 | } |
537 | ||
f026fe3d SW |
538 | /* |
539 | * This may be perfectly legitimate. An IP block may get re-used | |
540 | * across SoCs. Not all of those SoCs may need pinmux settings for the | |
541 | * IP block, e.g. if one SoC dedicates pins to that function but | |
542 | * another doesn't. The driver won't know this, and will always | |
543 | * attempt to set up the pinmux. The mapping table defines whether any | |
544 | * HW programming is actually needed. | |
545 | */ | |
546 | if (!num_maps) | |
547 | dev_info(dev, "zero maps found for mapping %s\n", name); | |
befe5bdf | 548 | |
95dcd4ae SW |
549 | dev_dbg(dev, "found %u maps for device %s state %s\n", |
550 | num_maps, devname, name ? name : "(undefined)"); | |
befe5bdf LW |
551 | |
552 | /* Add the pinmux to the global list */ | |
8b9c139f | 553 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
554 | |
555 | return p; | |
7ecdb16f SW |
556 | |
557 | error: | |
558 | list_for_each_entry(setting, &p->settings, node) | |
559 | pinmux_free_setting(setting); | |
560 | ||
561 | kfree(p); | |
562 | ||
563 | return ERR_PTR(ret); | |
befe5bdf | 564 | } |
b2b3e66e SW |
565 | |
566 | /** | |
567 | * pinctrl_get() - retrieves the pin controller handle for a certain device | |
568 | * @dev: the device to get the pin controller handle for | |
569 | * @name: an optional specific control mapping name or NULL, the name is only | |
570 | * needed if you want to have more than one mapping per device, or if you | |
571 | * need an anonymous pin control (not tied to any specific device) | |
572 | */ | |
573 | struct pinctrl *pinctrl_get(struct device *dev, const char *name) | |
574 | { | |
575 | struct pinctrl *p; | |
576 | ||
57b676f9 | 577 | mutex_lock(&pinctrl_mutex); |
b2b3e66e | 578 | p = pinctrl_get_locked(dev, name); |
57b676f9 | 579 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
580 | |
581 | return p; | |
582 | } | |
befe5bdf LW |
583 | EXPORT_SYMBOL_GPL(pinctrl_get); |
584 | ||
57b676f9 | 585 | static void pinctrl_put_locked(struct pinctrl *p) |
befe5bdf | 586 | { |
7ecdb16f SW |
587 | struct pinctrl_setting *setting, *n; |
588 | ||
befe5bdf LW |
589 | if (p == NULL) |
590 | return; | |
591 | ||
befe5bdf LW |
592 | if (p->usecount) |
593 | pr_warn("releasing pin control handle with active users!\n"); | |
7ecdb16f SW |
594 | list_for_each_entry_safe(setting, n, &p->settings, node) { |
595 | pinmux_free_setting(setting); | |
596 | list_del(&setting->node); | |
597 | kfree(setting); | |
598 | } | |
befe5bdf LW |
599 | |
600 | /* Remove from list */ | |
befe5bdf | 601 | list_del(&p->node); |
befe5bdf LW |
602 | |
603 | kfree(p); | |
604 | } | |
befe5bdf LW |
605 | |
606 | /** | |
57b676f9 SW |
607 | * pinctrl_put() - release a previously claimed pin control handle |
608 | * @p: a pin control handle previously claimed by pinctrl_get() | |
befe5bdf | 609 | */ |
57b676f9 SW |
610 | void pinctrl_put(struct pinctrl *p) |
611 | { | |
612 | mutex_lock(&pinctrl_mutex); | |
613 | pinctrl_put(p); | |
614 | mutex_unlock(&pinctrl_mutex); | |
615 | } | |
616 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
617 | ||
618 | static int pinctrl_enable_locked(struct pinctrl *p) | |
befe5bdf | 619 | { |
7ecdb16f SW |
620 | struct pinctrl_setting *setting; |
621 | int ret; | |
befe5bdf LW |
622 | |
623 | if (p == NULL) | |
624 | return -EINVAL; | |
57b676f9 | 625 | |
befe5bdf | 626 | if (p->usecount++ == 0) { |
7ecdb16f SW |
627 | list_for_each_entry(setting, &p->settings, node) { |
628 | ret = pinmux_enable_setting(setting); | |
629 | if (ret < 0) { | |
630 | /* FIXME: Difficult to return to prev state */ | |
631 | p->usecount--; | |
632 | return ret; | |
633 | } | |
634 | } | |
befe5bdf | 635 | } |
57b676f9 | 636 | |
7ecdb16f | 637 | return 0; |
befe5bdf | 638 | } |
befe5bdf LW |
639 | |
640 | /** | |
57b676f9 SW |
641 | * pinctrl_enable() - enable a certain pin controller setting |
642 | * @p: the pin control handle to enable, previously claimed by pinctrl_get() | |
befe5bdf | 643 | */ |
57b676f9 SW |
644 | int pinctrl_enable(struct pinctrl *p) |
645 | { | |
646 | int ret; | |
647 | mutex_lock(&pinctrl_mutex); | |
648 | ret = pinctrl_enable_locked(p); | |
649 | mutex_unlock(&pinctrl_mutex); | |
650 | return ret; | |
651 | } | |
652 | EXPORT_SYMBOL_GPL(pinctrl_enable); | |
653 | ||
654 | static void pinctrl_disable_locked(struct pinctrl *p) | |
befe5bdf | 655 | { |
7ecdb16f SW |
656 | struct pinctrl_setting *setting; |
657 | ||
befe5bdf LW |
658 | if (p == NULL) |
659 | return; | |
660 | ||
befe5bdf | 661 | if (--p->usecount == 0) { |
7ecdb16f SW |
662 | list_for_each_entry(setting, &p->settings, node) |
663 | pinmux_disable_setting(setting); | |
befe5bdf | 664 | } |
57b676f9 SW |
665 | } |
666 | ||
667 | /** | |
668 | * pinctrl_disable() - disable a certain pin control setting | |
669 | * @p: the pin control handle to disable, previously claimed by pinctrl_get() | |
670 | */ | |
671 | void pinctrl_disable(struct pinctrl *p) | |
672 | { | |
673 | mutex_lock(&pinctrl_mutex); | |
674 | pinctrl_disable_locked(p); | |
675 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
676 | } |
677 | EXPORT_SYMBOL_GPL(pinctrl_disable); | |
678 | ||
679 | /** | |
680 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
13398a4b SW |
681 | * @maps: the pincontrol mappings table to register. This should probably be |
682 | * marked with __initdata so it can be discarded after boot. This | |
683 | * function will perform a shallow copy for the mapping entries. | |
befe5bdf | 684 | * @num_maps: the number of maps in the mapping table |
befe5bdf | 685 | */ |
13398a4b SW |
686 | int pinctrl_register_mappings(struct pinctrl_map const *maps, |
687 | unsigned num_maps) | |
befe5bdf | 688 | { |
befe5bdf | 689 | int i; |
b2b3e66e | 690 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
691 | |
692 | pr_debug("add %d pinmux maps\n", num_maps); | |
693 | ||
694 | /* First sanity check the new mapping */ | |
695 | for (i = 0; i < num_maps; i++) { | |
696 | if (!maps[i].name) { | |
697 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 698 | i); |
befe5bdf LW |
699 | return -EINVAL; |
700 | } | |
701 | ||
702 | if (!maps[i].ctrl_dev_name) { | |
703 | pr_err("failed to register map %s (%d): no pin control device given\n", | |
704 | maps[i].name, i); | |
705 | return -EINVAL; | |
706 | } | |
707 | ||
708 | if (!maps[i].function) { | |
709 | pr_err("failed to register map %s (%d): no function ID given\n", | |
95dcd4ae | 710 | maps[i].name, i); |
befe5bdf LW |
711 | return -EINVAL; |
712 | } | |
713 | ||
1681f5ae SW |
714 | if (!maps[i].dev_name) { |
715 | pr_err("failed to register map %s (%d): no device given\n", | |
95dcd4ae | 716 | maps[i].name, i); |
1681f5ae SW |
717 | return -EINVAL; |
718 | } | |
befe5bdf LW |
719 | } |
720 | ||
b2b3e66e SW |
721 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
722 | if (!maps_node) { | |
723 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
724 | return -ENOMEM; | |
725 | } | |
befe5bdf | 726 | |
b2b3e66e SW |
727 | maps_node->num_maps = num_maps; |
728 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, GFP_KERNEL); | |
729 | if (!maps_node->maps) { | |
95dcd4ae | 730 | pr_err("failed to duplicate mapping table\n"); |
b2b3e66e SW |
731 | kfree(maps_node); |
732 | return -ENOMEM; | |
befe5bdf LW |
733 | } |
734 | ||
57b676f9 | 735 | mutex_lock(&pinctrl_mutex); |
b2b3e66e | 736 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57b676f9 | 737 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e | 738 | |
befe5bdf LW |
739 | return 0; |
740 | } | |
741 | ||
2744e8af LW |
742 | #ifdef CONFIG_DEBUG_FS |
743 | ||
744 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
745 | { | |
746 | struct pinctrl_dev *pctldev = s->private; | |
747 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 748 | unsigned i, pin; |
2744e8af LW |
749 | |
750 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 751 | |
57b676f9 SW |
752 | mutex_lock(&pinctrl_mutex); |
753 | ||
706e8520 CP |
754 | /* The pin number can be retrived from the pin controller descriptor */ |
755 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
756 | struct pin_desc *desc; |
757 | ||
706e8520 | 758 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
759 | desc = pin_desc_get(pctldev, pin); |
760 | /* Pin space may be sparse */ | |
761 | if (desc == NULL) | |
762 | continue; | |
763 | ||
764 | seq_printf(s, "pin %d (%s) ", pin, | |
765 | desc->name ? desc->name : "unnamed"); | |
766 | ||
767 | /* Driver-specific info per pin */ | |
768 | if (ops->pin_dbg_show) | |
769 | ops->pin_dbg_show(pctldev, s, pin); | |
770 | ||
771 | seq_puts(s, "\n"); | |
772 | } | |
773 | ||
57b676f9 SW |
774 | mutex_unlock(&pinctrl_mutex); |
775 | ||
2744e8af LW |
776 | return 0; |
777 | } | |
778 | ||
779 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
780 | { | |
781 | struct pinctrl_dev *pctldev = s->private; | |
782 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
783 | unsigned selector = 0; | |
784 | ||
785 | /* No grouping */ | |
786 | if (!ops) | |
787 | return 0; | |
788 | ||
57b676f9 SW |
789 | mutex_lock(&pinctrl_mutex); |
790 | ||
2744e8af LW |
791 | seq_puts(s, "registered pin groups:\n"); |
792 | while (ops->list_groups(pctldev, selector) >= 0) { | |
a5818a8b | 793 | const unsigned *pins; |
2744e8af LW |
794 | unsigned num_pins; |
795 | const char *gname = ops->get_group_name(pctldev, selector); | |
796 | int ret; | |
797 | int i; | |
798 | ||
799 | ret = ops->get_group_pins(pctldev, selector, | |
800 | &pins, &num_pins); | |
801 | if (ret) | |
802 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
803 | gname); | |
804 | else { | |
805 | seq_printf(s, "group: %s, pins = [ ", gname); | |
806 | for (i = 0; i < num_pins; i++) | |
807 | seq_printf(s, "%d ", pins[i]); | |
808 | seq_puts(s, "]\n"); | |
809 | } | |
810 | selector++; | |
811 | } | |
812 | ||
57b676f9 | 813 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
814 | |
815 | return 0; | |
816 | } | |
817 | ||
818 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
819 | { | |
820 | struct pinctrl_dev *pctldev = s->private; | |
821 | struct pinctrl_gpio_range *range = NULL; | |
822 | ||
823 | seq_puts(s, "GPIO ranges handled:\n"); | |
824 | ||
57b676f9 SW |
825 | mutex_lock(&pinctrl_mutex); |
826 | ||
2744e8af | 827 | /* Loop over the ranges */ |
2744e8af | 828 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
829 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
830 | range->id, range->name, | |
831 | range->base, (range->base + range->npins - 1), | |
832 | range->pin_base, | |
833 | (range->pin_base + range->npins - 1)); | |
2744e8af | 834 | } |
57b676f9 SW |
835 | |
836 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
837 | |
838 | return 0; | |
839 | } | |
840 | ||
841 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
842 | { | |
843 | struct pinctrl_dev *pctldev; | |
844 | ||
ae6b4d85 | 845 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
846 | |
847 | mutex_lock(&pinctrl_mutex); | |
848 | ||
2744e8af LW |
849 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
850 | seq_printf(s, "%s ", pctldev->desc->name); | |
851 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
852 | seq_puts(s, "yes "); |
853 | else | |
854 | seq_puts(s, "no "); | |
855 | if (pctldev->desc->confops) | |
2744e8af LW |
856 | seq_puts(s, "yes"); |
857 | else | |
858 | seq_puts(s, "no"); | |
859 | seq_puts(s, "\n"); | |
860 | } | |
57b676f9 SW |
861 | |
862 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
863 | |
864 | return 0; | |
865 | } | |
866 | ||
3eedb437 SW |
867 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
868 | { | |
869 | struct pinctrl_maps *maps_node; | |
870 | int i; | |
871 | struct pinctrl_map const *map; | |
872 | ||
873 | seq_puts(s, "Pinctrl maps:\n"); | |
874 | ||
57b676f9 SW |
875 | mutex_lock(&pinctrl_mutex); |
876 | ||
3eedb437 SW |
877 | for_each_maps(maps_node, i, map) { |
878 | seq_printf(s, "%s:\n", map->name); | |
879 | seq_printf(s, " device: %s\n", map->dev_name); | |
880 | seq_printf(s, " controlling device %s\n", map->ctrl_dev_name); | |
881 | seq_printf(s, " function: %s\n", map->function); | |
882 | seq_printf(s, " group: %s\n", map->group ? map->group : | |
883 | "(default)"); | |
884 | } | |
57b676f9 SW |
885 | |
886 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
887 | |
888 | return 0; | |
889 | } | |
890 | ||
befe5bdf LW |
891 | static int pinctrl_show(struct seq_file *s, void *what) |
892 | { | |
893 | struct pinctrl *p; | |
7ecdb16f | 894 | struct pinctrl_setting *setting; |
befe5bdf LW |
895 | |
896 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
897 | |
898 | mutex_lock(&pinctrl_mutex); | |
899 | ||
befe5bdf | 900 | list_for_each_entry(p, &pinctrl_list, node) { |
7ecdb16f SW |
901 | seq_printf(s, "device: %s state: %s users: %u\n", |
902 | dev_name(p->dev), p->state, p->usecount); | |
befe5bdf | 903 | |
7ecdb16f SW |
904 | list_for_each_entry(setting, &p->settings, node) { |
905 | seq_printf(s, " "); | |
906 | pinmux_dbg_show(s, setting); | |
befe5bdf | 907 | } |
befe5bdf LW |
908 | } |
909 | ||
57b676f9 SW |
910 | mutex_unlock(&pinctrl_mutex); |
911 | ||
befe5bdf LW |
912 | return 0; |
913 | } | |
914 | ||
2744e8af LW |
915 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
916 | { | |
917 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
918 | } | |
919 | ||
920 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
921 | { | |
922 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
923 | } | |
924 | ||
925 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
926 | { | |
927 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
928 | } | |
929 | ||
930 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
931 | { | |
932 | return single_open(file, pinctrl_devices_show, NULL); | |
933 | } | |
934 | ||
3eedb437 SW |
935 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
936 | { | |
937 | return single_open(file, pinctrl_maps_show, NULL); | |
938 | } | |
939 | ||
befe5bdf LW |
940 | static int pinctrl_open(struct inode *inode, struct file *file) |
941 | { | |
942 | return single_open(file, pinctrl_show, NULL); | |
943 | } | |
944 | ||
2744e8af LW |
945 | static const struct file_operations pinctrl_pins_ops = { |
946 | .open = pinctrl_pins_open, | |
947 | .read = seq_read, | |
948 | .llseek = seq_lseek, | |
949 | .release = single_release, | |
950 | }; | |
951 | ||
952 | static const struct file_operations pinctrl_groups_ops = { | |
953 | .open = pinctrl_groups_open, | |
954 | .read = seq_read, | |
955 | .llseek = seq_lseek, | |
956 | .release = single_release, | |
957 | }; | |
958 | ||
959 | static const struct file_operations pinctrl_gpioranges_ops = { | |
960 | .open = pinctrl_gpioranges_open, | |
961 | .read = seq_read, | |
962 | .llseek = seq_lseek, | |
963 | .release = single_release, | |
964 | }; | |
965 | ||
3eedb437 SW |
966 | static const struct file_operations pinctrl_devices_ops = { |
967 | .open = pinctrl_devices_open, | |
befe5bdf LW |
968 | .read = seq_read, |
969 | .llseek = seq_lseek, | |
970 | .release = single_release, | |
971 | }; | |
972 | ||
3eedb437 SW |
973 | static const struct file_operations pinctrl_maps_ops = { |
974 | .open = pinctrl_maps_open, | |
2744e8af LW |
975 | .read = seq_read, |
976 | .llseek = seq_lseek, | |
977 | .release = single_release, | |
978 | }; | |
979 | ||
befe5bdf LW |
980 | static const struct file_operations pinctrl_ops = { |
981 | .open = pinctrl_open, | |
982 | .read = seq_read, | |
983 | .llseek = seq_lseek, | |
984 | .release = single_release, | |
985 | }; | |
986 | ||
2744e8af LW |
987 | static struct dentry *debugfs_root; |
988 | ||
989 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
990 | { | |
02157160 | 991 | struct dentry *device_root; |
2744e8af | 992 | |
51cd24ee | 993 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 994 | debugfs_root); |
02157160 TL |
995 | pctldev->device_root = device_root; |
996 | ||
2744e8af LW |
997 | if (IS_ERR(device_root) || !device_root) { |
998 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 999 | dev_name(pctldev->dev)); |
2744e8af LW |
1000 | return; |
1001 | } | |
1002 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1003 | device_root, pctldev, &pinctrl_pins_ops); | |
1004 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1005 | device_root, pctldev, &pinctrl_groups_ops); | |
1006 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1007 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1008 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1009 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1010 | } |
1011 | ||
02157160 TL |
1012 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1013 | { | |
1014 | debugfs_remove_recursive(pctldev->device_root); | |
1015 | } | |
1016 | ||
2744e8af LW |
1017 | static void pinctrl_init_debugfs(void) |
1018 | { | |
1019 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1020 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1021 | pr_warn("failed to create debugfs directory\n"); | |
1022 | debugfs_root = NULL; | |
1023 | return; | |
1024 | } | |
1025 | ||
1026 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1027 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1028 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1029 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1030 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1031 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1032 | } |
1033 | ||
1034 | #else /* CONFIG_DEBUG_FS */ | |
1035 | ||
1036 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1037 | { | |
1038 | } | |
1039 | ||
1040 | static void pinctrl_init_debugfs(void) | |
1041 | { | |
1042 | } | |
1043 | ||
02157160 TL |
1044 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1045 | { | |
1046 | } | |
1047 | ||
2744e8af LW |
1048 | #endif |
1049 | ||
1050 | /** | |
1051 | * pinctrl_register() - register a pin controller device | |
1052 | * @pctldesc: descriptor for this pin controller | |
1053 | * @dev: parent device for this pin controller | |
1054 | * @driver_data: private pin controller data for this pin controller | |
1055 | */ | |
1056 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1057 | struct device *dev, void *driver_data) | |
1058 | { | |
2744e8af LW |
1059 | struct pinctrl_dev *pctldev; |
1060 | int ret; | |
1061 | ||
1062 | if (pctldesc == NULL) | |
1063 | return NULL; | |
1064 | if (pctldesc->name == NULL) | |
1065 | return NULL; | |
1066 | ||
02f5b989 | 1067 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1068 | if (pctldev == NULL) { |
1069 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1070 | return NULL; |
95dcd4ae | 1071 | } |
b9130b77 TL |
1072 | |
1073 | /* Initialize pin control device struct */ | |
1074 | pctldev->owner = pctldesc->owner; | |
1075 | pctldev->desc = pctldesc; | |
1076 | pctldev->driver_data = driver_data; | |
1077 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1078 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1079 | pctldev->dev = dev; |
1080 | ||
2744e8af LW |
1081 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1082 | if (pctldesc->pmxops) { | |
b9130b77 | 1083 | ret = pinmux_check_ops(pctldev); |
2744e8af LW |
1084 | if (ret) { |
1085 | pr_err("%s pinmux ops lacks necessary functions\n", | |
1086 | pctldesc->name); | |
b9130b77 | 1087 | goto out_err; |
2744e8af LW |
1088 | } |
1089 | } | |
1090 | ||
ae6b4d85 LW |
1091 | /* If we're implementing pinconfig, check the ops for sanity */ |
1092 | if (pctldesc->confops) { | |
b9130b77 | 1093 | ret = pinconf_check_ops(pctldev); |
ae6b4d85 LW |
1094 | if (ret) { |
1095 | pr_err("%s pin config ops lacks necessary functions\n", | |
1096 | pctldesc->name); | |
b9130b77 | 1097 | goto out_err; |
ae6b4d85 LW |
1098 | } |
1099 | } | |
1100 | ||
2744e8af LW |
1101 | /* Register all the pins */ |
1102 | pr_debug("try to register %d pins on %s...\n", | |
1103 | pctldesc->npins, pctldesc->name); | |
1104 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); | |
1105 | if (ret) { | |
1106 | pr_err("error during pin registration\n"); | |
1107 | pinctrl_free_pindescs(pctldev, pctldesc->pins, | |
1108 | pctldesc->npins); | |
51cd24ee | 1109 | goto out_err; |
2744e8af LW |
1110 | } |
1111 | ||
57b676f9 SW |
1112 | mutex_lock(&pinctrl_mutex); |
1113 | ||
8b9c139f | 1114 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 SW |
1115 | |
1116 | pctldev->p = pinctrl_get_locked(pctldev->dev, PINCTRL_STATE_DEFAULT); | |
46919ae6 | 1117 | if (!IS_ERR(pctldev->p)) |
57b676f9 SW |
1118 | pinctrl_enable_locked(pctldev->p); |
1119 | ||
1120 | mutex_unlock(&pinctrl_mutex); | |
1121 | ||
2304b473 SW |
1122 | pinctrl_init_device_debugfs(pctldev); |
1123 | ||
2744e8af LW |
1124 | return pctldev; |
1125 | ||
51cd24ee SW |
1126 | out_err: |
1127 | kfree(pctldev); | |
2744e8af LW |
1128 | return NULL; |
1129 | } | |
1130 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1131 | ||
1132 | /** | |
1133 | * pinctrl_unregister() - unregister pinmux | |
1134 | * @pctldev: pin controller to unregister | |
1135 | * | |
1136 | * Called by pinmux drivers to unregister a pinmux. | |
1137 | */ | |
1138 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1139 | { | |
1140 | if (pctldev == NULL) | |
1141 | return; | |
1142 | ||
02157160 | 1143 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1144 | |
1145 | mutex_lock(&pinctrl_mutex); | |
1146 | ||
46919ae6 | 1147 | if (!IS_ERR(pctldev->p)) { |
57b676f9 SW |
1148 | pinctrl_disable_locked(pctldev->p); |
1149 | pinctrl_put_locked(pctldev->p); | |
46919ae6 | 1150 | } |
57b676f9 | 1151 | |
2744e8af | 1152 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1153 | list_del(&pctldev->node); |
2744e8af LW |
1154 | /* Destroy descriptor tree */ |
1155 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1156 | pctldev->desc->npins); | |
51cd24ee | 1157 | kfree(pctldev); |
57b676f9 SW |
1158 | |
1159 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1160 | } |
1161 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1162 | ||
1163 | static int __init pinctrl_init(void) | |
1164 | { | |
1165 | pr_info("initialized pinctrl subsystem\n"); | |
1166 | pinctrl_init_debugfs(); | |
1167 | return 0; | |
1168 | } | |
1169 | ||
1170 | /* init early since many drivers really need to initialized pinmux early */ | |
1171 | core_initcall(pinctrl_init); |