]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/pinctrl/core.h
ALSA: hda/realtek - Use a common helper for hp pin reference
[mirror_ubuntu-bionic-kernel.git] / drivers / pinctrl / core.h
CommitLineData
2744e8af
LW
1/*
2 * Core private header for the pin control subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 *
7 * Author: Linus Walleij <linus.walleij@linaro.org>
8 *
9 * License terms: GNU General Public License (GPL) version 2
10 */
11
ab78029e 12#include <linux/kref.h>
57b676f9
SW
13#include <linux/mutex.h>
14#include <linux/radix-tree.h>
ae6b4d85 15#include <linux/pinctrl/pinconf.h>
872acc32 16#include <linux/pinctrl/machine.h>
ae6b4d85
LW
17
18struct pinctrl_gpio_range;
19
2744e8af
LW
20/**
21 * struct pinctrl_dev - pin control class device
22 * @node: node to include this pin controller in the global pin controller list
23 * @desc: the pin controller descriptor supplied when initializing this pin
24 * controller
25 * @pin_desc_tree: each pin descriptor for this pin controller is stored in
26 * this radix tree
c7059c5a
TL
27 * @pin_group_tree: optionally each pin group can be stored in this radix tree
28 * @num_groups: optionally number of groups can be kept here
a76edc89
TL
29 * @pin_function_tree: optionally each function can be stored in this radix tree
30 * @num_functions: optionally number of functions can be kept here
2744e8af
LW
31 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
32 * ranges are added to this list at runtime
2744e8af
LW
33 * @dev: the device entry for this pin controller
34 * @owner: module providing the pin controller, used for refcounting
35 * @driver_data: driver data for drivers registering to the pin controller
36 * subsystem
46919ae6 37 * @p: result of pinctrl_get() for this device
840a47ba
JD
38 * @hog_default: default state for pins hogged by this device
39 * @hog_sleep: sleep state for pins hogged by this device
42fed7ba 40 * @mutex: mutex taken on each pin controller specific action
befe5bdf 41 * @device_root: debugfs root for this device
2744e8af
LW
42 */
43struct pinctrl_dev {
44 struct list_head node;
45 struct pinctrl_desc *desc;
46 struct radix_tree_root pin_desc_tree;
c033a718 47#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
c7059c5a
TL
48 struct radix_tree_root pin_group_tree;
49 unsigned int num_groups;
a76edc89
TL
50#endif
51#ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS
52 struct radix_tree_root pin_function_tree;
53 unsigned int num_functions;
c033a718 54#endif
2744e8af 55 struct list_head gpio_ranges;
51cd24ee 56 struct device *dev;
2744e8af
LW
57 struct module *owner;
58 void *driver_data;
46919ae6 59 struct pinctrl *p;
840a47ba
JD
60 struct pinctrl_state *hog_default;
61 struct pinctrl_state *hog_sleep;
42fed7ba 62 struct mutex mutex;
02157160
TL
63#ifdef CONFIG_DEBUG_FS
64 struct dentry *device_root;
65#endif
befe5bdf
LW
66};
67
68/**
69 * struct pinctrl - per-device pin control state holder
70 * @node: global list node
71 * @dev: the device using this pin control handle
6e5e959d
SW
72 * @states: a list of states for this device
73 * @state: the current state
57291ce2
SW
74 * @dt_maps: the mapping table chunks dynamically parsed from device tree for
75 * this device, if any
ab78029e 76 * @users: reference count
befe5bdf
LW
77 */
78struct pinctrl {
79 struct list_head node;
80 struct device *dev;
6e5e959d
SW
81 struct list_head states;
82 struct pinctrl_state *state;
57291ce2 83 struct list_head dt_maps;
ab78029e 84 struct kref users;
6e5e959d
SW
85};
86
87/**
88 * struct pinctrl_state - a pinctrl state for a device
2c9abf80 89 * @node: list node for struct pinctrl's @states field
6e5e959d
SW
90 * @name: the name of this state
91 * @settings: a list of settings for this state
92 */
93struct pinctrl_state {
94 struct list_head node;
95 const char *name;
7ecdb16f
SW
96 struct list_head settings;
97};
98
1e2082b5
SW
99/**
100 * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP
101 * @group: the group selector to program
102 * @func: the function selector to program
103 */
104struct pinctrl_setting_mux {
105 unsigned group;
106 unsigned func;
107};
108
109/**
110 * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_*
111 * @group_or_pin: the group selector or pin ID to program
112 * @configs: a pointer to an array of config parameters/values to program into
113 * hardware. Each individual pin controller defines the format and meaning
114 * of config parameters.
115 * @num_configs: the number of entries in array @configs
116 */
117struct pinctrl_setting_configs {
118 unsigned group_or_pin;
119 unsigned long *configs;
120 unsigned num_configs;
121};
122
7ecdb16f 123/**
872acc32 124 * struct pinctrl_setting - an individual mux or config setting
6e5e959d 125 * @node: list node for struct pinctrl_settings's @settings field
1e2082b5 126 * @type: the type of setting
57291ce2
SW
127 * @pctldev: pin control device handling to be programmed. Not used for
128 * PIN_MAP_TYPE_DUMMY_STATE.
1a78958d 129 * @dev_name: the name of the device using this state
1e2082b5 130 * @data: Data specific to the setting type
7ecdb16f
SW
131 */
132struct pinctrl_setting {
133 struct list_head node;
1e2082b5 134 enum pinctrl_map_type type;
befe5bdf 135 struct pinctrl_dev *pctldev;
1a78958d 136 const char *dev_name;
1e2082b5
SW
137 union {
138 struct pinctrl_setting_mux mux;
139 struct pinctrl_setting_configs configs;
140 } data;
2744e8af
LW
141};
142
143/**
144 * struct pin_desc - pin descriptor for each physical pin in the arch
145 * @pctldev: corresponding pin control device
146 * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
147 * datasheet or such
ca53c5f1 148 * @dynamic_name: if the name of this pin was dynamically allocated
cd8f61f1 149 * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
652162d4 150 * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL.
0e3db173
SW
151 * If non-zero, this pin is claimed by @owner. This field is an integer
152 * rather than a boolean, since pinctrl_get() might process multiple
153 * mapping table entries that refer to, and hence claim, the same group
154 * or pin, and each of these will increment the @usecount.
652162d4 155 * @mux_owner: The name of device that called pinctrl_get().
ba110d90 156 * @mux_setting: The most recent selected mux setting for this pin, if any.
a9a1d2a7 157 * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
652162d4 158 * the name of the GPIO that "owns" this pin.
2744e8af
LW
159 */
160struct pin_desc {
161 struct pinctrl_dev *pctldev;
9af1e44f 162 const char *name;
ca53c5f1 163 bool dynamic_name;
cd8f61f1 164 void *drv_data;
2744e8af
LW
165 /* These fields only added when supporting pinmux drivers */
166#ifdef CONFIG_PINMUX
652162d4
SW
167 unsigned mux_usecount;
168 const char *mux_owner;
ba110d90 169 const struct pinctrl_setting_mux *mux_setting;
652162d4 170 const char *gpio_owner;
2744e8af
LW
171#endif
172};
173
c033a718
LW
174/**
175 * struct pinctrl_maps - a list item containing part of the mapping table
176 * @node: mapping table list node
177 * @maps: array of mapping table entries
178 * @num_maps: the number of entries in @maps
179 */
180struct pinctrl_maps {
181 struct list_head node;
3f713b7c 182 const struct pinctrl_map *maps;
c033a718
LW
183 unsigned num_maps;
184};
185
186#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
187
c7059c5a
TL
188/**
189 * struct group_desc - generic pin group descriptor
190 * @name: name of the pin group
191 * @pins: array of pins that belong to the group
192 * @num_pins: number of pins in the group
193 * @data: pin controller driver specific data
194 */
195struct group_desc {
196 const char *name;
197 int *pins;
198 int num_pins;
199 void *data;
200};
201
c7059c5a
TL
202int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev);
203
204const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev,
205 unsigned int group_selector);
206
207int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev,
208 unsigned int group_selector,
209 const unsigned int **pins,
210 unsigned int *npins);
211
212struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
213 unsigned int group_selector);
214
215int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name,
216 int *gpins, int ngpins, void *data);
217
218int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev,
219 unsigned int group_selector);
220
221static inline int
222pinctrl_generic_remove_last_group(struct pinctrl_dev *pctldev)
223{
224 return pinctrl_generic_remove_group(pctldev, pctldev->num_groups - 1);
225}
226
c033a718 227#endif /* CONFIG_GENERIC_PINCTRL_GROUPS */
c7059c5a 228
9dfac4fd 229struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
42fed7ba 230struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np);
ae6b4d85 231int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
dcb5dbc3 232const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
7afde8ba
LW
233int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
234 const char *pin_group);
2304b473
SW
235
236static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,
237 unsigned int pin)
238{
239 return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
240}
57b676f9 241
b18537cd
JE
242extern struct pinctrl_gpio_range *
243pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
244 unsigned int pin);
245
3f713b7c 246int pinctrl_register_map(const struct pinctrl_map *maps, unsigned num_maps,
c5272a28 247 bool dup);
3f713b7c 248void pinctrl_unregister_map(const struct pinctrl_map *map);
57291ce2 249
840a47ba
JD
250extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
251extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
252
42fed7ba 253extern struct mutex pinctrl_maps_mutex;
6f9e41f4
LM
254extern struct list_head pinctrl_maps;
255
256#define for_each_maps(_maps_node_, _i_, _map_) \
257 list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
258 for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
259 _i_ < _maps_node_->num_maps; \
260 _i_++, _map_ = &_maps_node_->maps[_i_])