[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / mvebu / pinctrl-armada-370.c

/*
 * Marvell Armada 370 pinctrl driver based on mvebu pinctrl core
 *
 * Copyright (C) 2012 Marvell
 *
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>

#include "pinctrl-mvebu.h"

static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
	MPP_MODE(0,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "uart0", "rxd")),
	MPP_MODE(1,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "uart0", "txd")),
	MPP_MODE(2,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "i2c0", "sck"),
	   MPP_FUNCTION(0x2, "uart0", "txd")),
	MPP_MODE(3,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "i2c0", "sda"),
	   MPP_FUNCTION(0x2, "uart0", "rxd")),
	MPP_MODE(4,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
	MPP_MODE(5,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txclkout"),
	   MPP_FUNCTION(0x2, "uart1", "txd"),
	   MPP_FUNCTION(0x4, "spi1", "sck"),
	   MPP_FUNCTION(0x5, "audio", "mclk")),
	MPP_MODE(6,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd0"),
	   MPP_FUNCTION(0x2, "sata0", "prsnt"),
	   MPP_FUNCTION(0x4, "tdm", "rst"),
	   MPP_FUNCTION(0x5, "audio", "sdo")),
	MPP_MODE(7,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd1"),
	   MPP_FUNCTION(0x4, "tdm", "dtx"),
	   MPP_FUNCTION(0x5, "audio", "lrclk")),
	MPP_MODE(8,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd2"),
	   MPP_FUNCTION(0x2, "uart0", "rts"),
	   MPP_FUNCTION(0x4, "tdm", "drx"),
	   MPP_FUNCTION(0x5, "audio", "bclk")),
	MPP_MODE(9,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd3"),
	   MPP_FUNCTION(0x2, "uart1", "txd"),
	   MPP_FUNCTION(0x3, "sd0", "clk"),
	   MPP_FUNCTION(0x5, "audio", "spdifo")),
	MPP_MODE(10,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txctl"),
	   MPP_FUNCTION(0x2, "uart0", "cts"),
	   MPP_FUNCTION(0x4, "tdm", "fsync"),
	   MPP_FUNCTION(0x5, "audio", "sdi")),
	MPP_MODE(11,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd0"),
	   MPP_FUNCTION(0x2, "uart1", "rxd"),
	   MPP_FUNCTION(0x3, "sd0", "cmd"),
	   MPP_FUNCTION(0x4, "spi0", "cs1"),
	   MPP_FUNCTION(0x5, "sata1", "prsnt"),
	   MPP_FUNCTION(0x6, "spi1", "cs1")),
	MPP_MODE(12,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd1"),
	   MPP_FUNCTION(0x2, "i2c1", "sda"),
	   MPP_FUNCTION(0x3, "sd0", "d0"),
	   MPP_FUNCTION(0x4, "spi1", "cs0"),
	   MPP_FUNCTION(0x5, "audio", "spdifi")),
	MPP_MODE(13,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd2"),
	   MPP_FUNCTION(0x2, "i2c1", "sck"),
	   MPP_FUNCTION(0x3, "sd0", "d1"),
	   MPP_FUNCTION(0x4, "tdm", "pclk"),
	   MPP_FUNCTION(0x5, "audio", "rmclk")),
	MPP_MODE(14,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd3"),
	   MPP_FUNCTION(0x2, "pcie", "clkreq0"),
	   MPP_FUNCTION(0x3, "sd0", "d2"),
	   MPP_FUNCTION(0x4, "spi1", "mosi"),
	   MPP_FUNCTION(0x5, "spi0", "cs2")),
	MPP_MODE(15,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxctl"),
	   MPP_FUNCTION(0x2, "pcie", "clkreq1"),
	   MPP_FUNCTION(0x3, "sd0", "d3"),
	   MPP_FUNCTION(0x4, "spi1", "miso"),
	   MPP_FUNCTION(0x5, "spi0", "cs3")),
	MPP_MODE(16,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxclk"),
	   MPP_FUNCTION(0x2, "uart1", "rxd"),
	   MPP_FUNCTION(0x4, "tdm", "int"),
	   MPP_FUNCTION(0x5, "audio", "extclk")),
	MPP_MODE(17,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge", "mdc")),
	MPP_MODE(18,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge", "mdio")),
	MPP_MODE(19,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txclk"),
	   MPP_FUNCTION(0x2, "ge1", "txclkout"),
	   MPP_FUNCTION(0x4, "tdm", "pclk")),
	MPP_MODE(20,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd4"),
	   MPP_FUNCTION(0x2, "ge1", "txd0")),
	MPP_MODE(21,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd5"),
	   MPP_FUNCTION(0x2, "ge1", "txd1"),
	   MPP_FUNCTION(0x4, "uart1", "txd")),
	MPP_MODE(22,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd6"),
	   MPP_FUNCTION(0x2, "ge1", "txd2"),
	   MPP_FUNCTION(0x4, "uart0", "rts")),
	MPP_MODE(23,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "ge0", "txd7"),
	   MPP_FUNCTION(0x2, "ge1", "txd3"),
	   MPP_FUNCTION(0x4, "spi1", "mosi")),
	MPP_MODE(24,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "col"),
	   MPP_FUNCTION(0x2, "ge1", "txctl"),
	   MPP_FUNCTION(0x4, "spi1", "cs0")),
	MPP_MODE(25,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxerr"),
	   MPP_FUNCTION(0x2, "ge1", "rxd0"),
	   MPP_FUNCTION(0x4, "uart1", "rxd")),
	MPP_MODE(26,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "crs"),
	   MPP_FUNCTION(0x2, "ge1", "rxd1"),
	   MPP_FUNCTION(0x4, "spi1", "miso")),
	MPP_MODE(27,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd4"),
	   MPP_FUNCTION(0x2, "ge1", "rxd2"),
	   MPP_FUNCTION(0x4, "uart0", "cts")),
	MPP_MODE(28,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd5"),
	   MPP_FUNCTION(0x2, "ge1", "rxd3")),
	MPP_MODE(29,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd6"),
	   MPP_FUNCTION(0x2, "ge1", "rxctl"),
	   MPP_FUNCTION(0x4, "i2c1", "sda")),
	MPP_MODE(30,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "ge0", "rxd7"),
	   MPP_FUNCTION(0x2, "ge1", "rxclk"),
	   MPP_FUNCTION(0x4, "i2c1", "sck")),
	MPP_MODE(31,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x3, "tclk", NULL),
	   MPP_FUNCTION(0x4, "ge0", "txerr")),
	MPP_MODE(32,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "spi0", "cs0")),
	MPP_MODE(33,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "bootcs"),
	   MPP_FUNCTION(0x2, "spi0", "cs0")),
	MPP_MODE(34,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "we0"),
	   MPP_FUNCTION(0x2, "spi0", "mosi")),
	MPP_MODE(35,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "oe"),
	   MPP_FUNCTION(0x2, "spi0", "sck")),
	MPP_MODE(36,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "a1"),
	   MPP_FUNCTION(0x2, "spi0", "miso")),
	MPP_MODE(37,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "a0"),
	   MPP_FUNCTION(0x2, "sata0", "prsnt")),
	MPP_MODE(38,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ready"),
	   MPP_FUNCTION(0x2, "uart1", "cts"),
	   MPP_FUNCTION(0x3, "uart0", "cts")),
	MPP_MODE(39,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad0"),
	   MPP_FUNCTION(0x2, "audio", "spdifo")),
	MPP_MODE(40,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad1"),
	   MPP_FUNCTION(0x2, "uart1", "rts"),
	   MPP_FUNCTION(0x3, "uart0", "rts")),
	MPP_MODE(41,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad2"),
	   MPP_FUNCTION(0x2, "uart1", "rxd")),
	MPP_MODE(42,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad3"),
	   MPP_FUNCTION(0x2, "uart1", "txd")),
	MPP_MODE(43,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad4"),
	   MPP_FUNCTION(0x2, "audio", "bclk")),
	MPP_MODE(44,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad5"),
	   MPP_FUNCTION(0x2, "audio", "mclk")),
	MPP_MODE(45,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad6"),
	   MPP_FUNCTION(0x2, "audio", "lrclk")),
	MPP_MODE(46,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad7"),
	   MPP_FUNCTION(0x2, "audio", "sdo")),
	MPP_MODE(47,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad8"),
	   MPP_FUNCTION(0x3, "sd0", "clk"),
	   MPP_FUNCTION(0x5, "audio", "spdifo")),
	MPP_MODE(48,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad9"),
	   MPP_FUNCTION(0x2, "uart0", "rts"),
	   MPP_FUNCTION(0x3, "sd0", "cmd"),
	   MPP_FUNCTION(0x4, "sata1", "prsnt"),
	   MPP_FUNCTION(0x5, "spi0", "cs1")),
	MPP_MODE(49,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad10"),
	   MPP_FUNCTION(0x2, "pcie", "clkreq1"),
	   MPP_FUNCTION(0x3, "sd0", "d0"),
	   MPP_FUNCTION(0x4, "spi1", "cs0"),
	   MPP_FUNCTION(0x5, "audio", "spdifi")),
	MPP_MODE(50,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad11"),
	   MPP_FUNCTION(0x2, "uart0", "cts"),
	   MPP_FUNCTION(0x3, "sd0", "d1"),
	   MPP_FUNCTION(0x4, "spi1", "miso"),
	   MPP_FUNCTION(0x5, "audio", "rmclk")),
	MPP_MODE(51,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad12"),
	   MPP_FUNCTION(0x2, "i2c1", "sda"),
	   MPP_FUNCTION(0x3, "sd0", "d2"),
	   MPP_FUNCTION(0x4, "spi1", "mosi")),
	MPP_MODE(52,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad13"),
	   MPP_FUNCTION(0x2, "i2c1", "sck"),
	   MPP_FUNCTION(0x3, "sd0", "d3"),
	   MPP_FUNCTION(0x4, "spi1", "sck")),
	MPP_MODE(53,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad14"),
	   MPP_FUNCTION(0x2, "sd0", "clk"),
	   MPP_FUNCTION(0x3, "tdm", "pclk"),
	   MPP_FUNCTION(0x4, "spi0", "cs2"),
	   MPP_FUNCTION(0x5, "pcie", "clkreq1")),
	MPP_MODE(54,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ad15"),
	   MPP_FUNCTION(0x3, "tdm", "dtx")),
	MPP_MODE(55,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "cs1"),
	   MPP_FUNCTION(0x2, "uart1", "txd"),
	   MPP_FUNCTION(0x3, "tdm", "rst"),
	   MPP_FUNCTION(0x4, "sata1", "prsnt"),
	   MPP_FUNCTION(0x5, "sata0", "prsnt")),
	MPP_MODE(56,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "cs2"),
	   MPP_FUNCTION(0x2, "uart1", "cts"),
	   MPP_FUNCTION(0x3, "uart0", "cts"),
	   MPP_FUNCTION(0x4, "spi0", "cs3"),
	   MPP_FUNCTION(0x5, "pcie", "clkreq0"),
	   MPP_FUNCTION(0x6, "spi1", "cs1")),
	MPP_MODE(57,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "cs3"),
	   MPP_FUNCTION(0x2, "uart1", "rxd"),
	   MPP_FUNCTION(0x3, "tdm", "fsync"),
	   MPP_FUNCTION(0x4, "sata0", "prsnt"),
	   MPP_FUNCTION(0x5, "audio", "sdo")),
	MPP_MODE(58,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "cs0"),
	   MPP_FUNCTION(0x2, "uart1", "rts"),
	   MPP_FUNCTION(0x3, "tdm", "int"),
	   MPP_FUNCTION(0x5, "audio", "extclk"),
	   MPP_FUNCTION(0x6, "uart0", "rts")),
	MPP_MODE(59,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "ale0"),
	   MPP_FUNCTION(0x2, "uart1", "rts"),
	   MPP_FUNCTION(0x3, "uart0", "rts"),
	   MPP_FUNCTION(0x5, "audio", "bclk")),
	MPP_MODE(60,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "ale1"),
	   MPP_FUNCTION(0x2, "uart1", "rxd"),
	   MPP_FUNCTION(0x3, "sata0", "prsnt"),
	   MPP_FUNCTION(0x4, "pcie", "rstout"),
	   MPP_FUNCTION(0x5, "audio", "sdi")),
	MPP_MODE(61,
	   MPP_FUNCTION(0x0, "gpo", NULL),
	   MPP_FUNCTION(0x1, "dev", "we1"),
	   MPP_FUNCTION(0x2, "uart1", "txd"),
	   MPP_FUNCTION(0x5, "audio", "lrclk")),
	MPP_MODE(62,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "dev", "a2"),
	   MPP_FUNCTION(0x2, "uart1", "cts"),
	   MPP_FUNCTION(0x3, "tdm", "drx"),
	   MPP_FUNCTION(0x4, "pcie", "clkreq0"),
	   MPP_FUNCTION(0x5, "audio", "mclk"),
	   MPP_FUNCTION(0x6, "uart0", "cts")),
	MPP_MODE(63,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "spi0", "sck"),
	   MPP_FUNCTION(0x2, "tclk", NULL)),
	MPP_MODE(64,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "spi0", "miso"),
	   MPP_FUNCTION(0x2, "spi0", "cs1")),
	MPP_MODE(65,
	   MPP_FUNCTION(0x0, "gpio", NULL),
	   MPP_FUNCTION(0x1, "spi0", "mosi"),
	   MPP_FUNCTION(0x2, "spi0", "cs2")),
};

static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;

static const struct of_device_id armada_370_pinctrl_of_match[] = {
	{ .compatible = "marvell,mv88f6710-pinctrl" },
	{ },
};

static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
	MPP_FUNC_CTRL(0, 65, NULL, mvebu_mmio_mpp_ctrl),
};

static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
	MPP_GPIO_RANGE(0,   0,  0, 32),
	MPP_GPIO_RANGE(1,  32, 32, 32),
	MPP_GPIO_RANGE(2,  64, 64,  2),
};

static int armada_370_pinctrl_probe(struct platform_device *pdev)
{
	struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;

	soc->variant = 0; /* no variants for Armada 370 */
	soc->controls = mv88f6710_mpp_controls;
	soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls);
	soc->modes = mv88f6710_mpp_modes;
	soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes);
	soc->gpioranges = mv88f6710_mpp_gpio_ranges;
	soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges);

	pdev->dev.platform_data = soc;

	return mvebu_pinctrl_simple_mmio_probe(pdev);
}

static struct platform_driver armada_370_pinctrl_driver = {
	.driver = {
		.name = "armada-370-pinctrl",
		.of_match_table = armada_370_pinctrl_of_match,
	},
	.probe = armada_370_pinctrl_probe,
};
builtin_platform_driver(armada_370_pinctrl_driver);
Commit	Line	Data
5f597bb2 TP	1	/*
	2	* Marvell Armada 370 pinctrl driver based on mvebu pinctrl core
	3	*
	4	* Copyright (C) 2012 Marvell
	5	*
	6	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <linux/err.h>
	15	#include <linux/init.h>
	16	#include <linux/io.h>
5f597bb2 TP	17	#include <linux/platform_device.h>
	18	#include <linux/clk.h>
	19	#include <linux/of.h>
	20	#include <linux/of_device.h>
	21	#include <linux/pinctrl/pinctrl.h>
	22
	23	#include "pinctrl-mvebu.h"
	24
	25	static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
	26	MPP_MODE(0,
	27	MPP_FUNCTION(0x0, "gpio", NULL),
	28	MPP_FUNCTION(0x1, "uart0", "rxd")),
	29	MPP_MODE(1,
	30	MPP_FUNCTION(0x0, "gpo", NULL),
	31	MPP_FUNCTION(0x1, "uart0", "txd")),
	32	MPP_MODE(2,
	33	MPP_FUNCTION(0x0, "gpio", NULL),
	34	MPP_FUNCTION(0x1, "i2c0", "sck"),
	35	MPP_FUNCTION(0x2, "uart0", "txd")),
	36	MPP_MODE(3,
	37	MPP_FUNCTION(0x0, "gpio", NULL),
	38	MPP_FUNCTION(0x1, "i2c0", "sda"),
	39	MPP_FUNCTION(0x2, "uart0", "rxd")),
	40	MPP_MODE(4,
	41	MPP_FUNCTION(0x0, "gpio", NULL),
bfacb566	42	MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
5f597bb2 TP	43	MPP_MODE(5,
5f597bb2 TP	44	MPP_FUNCTION(0x0, "gpo", NULL),
a361cbc5	45	MPP_FUNCTION(0x1, "ge0", "txclkout"),
5f597bb2	46	MPP_FUNCTION(0x2, "uart1", "txd"),
9e05db29	47	MPP_FUNCTION(0x4, "spi1", "sck"),
5f597bb2 TP	48	MPP_FUNCTION(0x5, "audio", "mclk")),
	49	MPP_MODE(6,
	50	MPP_FUNCTION(0x0, "gpio", NULL),
	51	MPP_FUNCTION(0x1, "ge0", "txd0"),
	52	MPP_FUNCTION(0x2, "sata0", "prsnt"),
	53	MPP_FUNCTION(0x4, "tdm", "rst"),
	54	MPP_FUNCTION(0x5, "audio", "sdo")),
	55	MPP_MODE(7,
	56	MPP_FUNCTION(0x0, "gpo", NULL),
	57	MPP_FUNCTION(0x1, "ge0", "txd1"),
dae5597f	58	MPP_FUNCTION(0x4, "tdm", "dtx"),
5f597bb2 TP	59	MPP_FUNCTION(0x5, "audio", "lrclk")),
	60	MPP_MODE(8,
	61	MPP_FUNCTION(0x0, "gpio", NULL),
	62	MPP_FUNCTION(0x1, "ge0", "txd2"),
	63	MPP_FUNCTION(0x2, "uart0", "rts"),
	64	MPP_FUNCTION(0x4, "tdm", "drx"),
	65	MPP_FUNCTION(0x5, "audio", "bclk")),
	66	MPP_MODE(9,
	67	MPP_FUNCTION(0x0, "gpo", NULL),
	68	MPP_FUNCTION(0x1, "ge0", "txd3"),
	69	MPP_FUNCTION(0x2, "uart1", "txd"),
	70	MPP_FUNCTION(0x3, "sd0", "clk"),
	71	MPP_FUNCTION(0x5, "audio", "spdifo")),
	72	MPP_MODE(10,
	73	MPP_FUNCTION(0x0, "gpio", NULL),
	74	MPP_FUNCTION(0x1, "ge0", "txctl"),
	75	MPP_FUNCTION(0x2, "uart0", "cts"),
	76	MPP_FUNCTION(0x4, "tdm", "fsync"),
	77	MPP_FUNCTION(0x5, "audio", "sdi")),
	78	MPP_MODE(11,
	79	MPP_FUNCTION(0x0, "gpio", NULL),
	80	MPP_FUNCTION(0x1, "ge0", "rxd0"),
	81	MPP_FUNCTION(0x2, "uart1", "rxd"),
	82	MPP_FUNCTION(0x3, "sd0", "cmd"),
	83	MPP_FUNCTION(0x4, "spi0", "cs1"),
	84	MPP_FUNCTION(0x5, "sata1", "prsnt"),
	85	MPP_FUNCTION(0x6, "spi1", "cs1")),
	86	MPP_MODE(12,
	87	MPP_FUNCTION(0x0, "gpio", NULL),
	88	MPP_FUNCTION(0x1, "ge0", "rxd1"),
	89	MPP_FUNCTION(0x2, "i2c1", "sda"),
	90	MPP_FUNCTION(0x3, "sd0", "d0"),
	91	MPP_FUNCTION(0x4, "spi1", "cs0"),
	92	MPP_FUNCTION(0x5, "audio", "spdifi")),
	93	MPP_MODE(13,
	94	MPP_FUNCTION(0x0, "gpio", NULL),
	95	MPP_FUNCTION(0x1, "ge0", "rxd2"),
	96	MPP_FUNCTION(0x2, "i2c1", "sck"),
	97	MPP_FUNCTION(0x3, "sd0", "d1"),
	98	MPP_FUNCTION(0x4, "tdm", "pclk"),
	99	MPP_FUNCTION(0x5, "audio", "rmclk")),
	100	MPP_MODE(14,
	101	MPP_FUNCTION(0x0, "gpio", NULL),
	102	MPP_FUNCTION(0x1, "ge0", "rxd3"),
	103	MPP_FUNCTION(0x2, "pcie", "clkreq0"),
	104	MPP_FUNCTION(0x3, "sd0", "d2"),
	105	MPP_FUNCTION(0x4, "spi1", "mosi"),
	106	MPP_FUNCTION(0x5, "spi0", "cs2")),
	107	MPP_MODE(15,
	108	MPP_FUNCTION(0x0, "gpio", NULL),
	109	MPP_FUNCTION(0x1, "ge0", "rxctl"),
	110	MPP_FUNCTION(0x2, "pcie", "clkreq1"),
	111	MPP_FUNCTION(0x3, "sd0", "d3"),
	112	MPP_FUNCTION(0x4, "spi1", "miso"),
	113	MPP_FUNCTION(0x5, "spi0", "cs3")),
	114	MPP_MODE(16,
	115	MPP_FUNCTION(0x0, "gpio", NULL),
	116	MPP_FUNCTION(0x1, "ge0", "rxclk"),
	117	MPP_FUNCTION(0x2, "uart1", "rxd"),
	118	MPP_FUNCTION(0x4, "tdm", "int"),
	119	MPP_FUNCTION(0x5, "audio", "extclk")),
	120	MPP_MODE(17,
	121	MPP_FUNCTION(0x0, "gpo", NULL),
	122	MPP_FUNCTION(0x1, "ge", "mdc")),
123	MPP_MODE(18,
124	MPP_FUNCTION(0x0, "gpio", NULL),
125	MPP_FUNCTION(0x1, "ge", "mdio")),
126	MPP_MODE(19,
127	MPP_FUNCTION(0x0, "gpio", NULL),
128	MPP_FUNCTION(0x1, "ge0", "txclk"),
129	MPP_FUNCTION(0x2, "ge1", "txclkout"),
130	MPP_FUNCTION(0x4, "tdm", "pclk")),
131	MPP_MODE(20,
132	MPP_FUNCTION(0x0, "gpo", NULL),
133	MPP_FUNCTION(0x1, "ge0", "txd4"),
134	MPP_FUNCTION(0x2, "ge1", "txd0")),
135	MPP_MODE(21,
136	MPP_FUNCTION(0x0, "gpo", NULL),
137	MPP_FUNCTION(0x1, "ge0", "txd5"),
138	MPP_FUNCTION(0x2, "ge1", "txd1"),
139	MPP_FUNCTION(0x4, "uart1", "txd")),
140	MPP_MODE(22,
141	MPP_FUNCTION(0x0, "gpo", NULL),
142	MPP_FUNCTION(0x1, "ge0", "txd6"),
143	MPP_FUNCTION(0x2, "ge1", "txd2"),
144	MPP_FUNCTION(0x4, "uart0", "rts")),
145	MPP_MODE(23,
146	MPP_FUNCTION(0x0, "gpo", NULL),
147	MPP_FUNCTION(0x1, "ge0", "txd7"),
148	MPP_FUNCTION(0x2, "ge1", "txd3"),
149	MPP_FUNCTION(0x4, "spi1", "mosi")),
150	MPP_MODE(24,
151	MPP_FUNCTION(0x0, "gpio", NULL),
152	MPP_FUNCTION(0x1, "ge0", "col"),
153	MPP_FUNCTION(0x2, "ge1", "txctl"),
154	MPP_FUNCTION(0x4, "spi1", "cs0")),
155	MPP_MODE(25,
156	MPP_FUNCTION(0x0, "gpio", NULL),
157	MPP_FUNCTION(0x1, "ge0", "rxerr"),
158	MPP_FUNCTION(0x2, "ge1", "rxd0"),
159	MPP_FUNCTION(0x4, "uart1", "rxd")),
160	MPP_MODE(26,
161	MPP_FUNCTION(0x0, "gpio", NULL),
162	MPP_FUNCTION(0x1, "ge0", "crs"),
163	MPP_FUNCTION(0x2, "ge1", "rxd1"),
164	MPP_FUNCTION(0x4, "spi1", "miso")),
165	MPP_MODE(27,
166	MPP_FUNCTION(0x0, "gpio", NULL),
167	MPP_FUNCTION(0x1, "ge0", "rxd4"),
168	MPP_FUNCTION(0x2, "ge1", "rxd2"),
169	MPP_FUNCTION(0x4, "uart0", "cts")),
170	MPP_MODE(28,
171	MPP_FUNCTION(0x0, "gpio", NULL),
172	MPP_FUNCTION(0x1, "ge0", "rxd5"),
173	MPP_FUNCTION(0x2, "ge1", "rxd3")),
174	MPP_MODE(29,
175	MPP_FUNCTION(0x0, "gpio", NULL),
176	MPP_FUNCTION(0x1, "ge0", "rxd6"),
177	MPP_FUNCTION(0x2, "ge1", "rxctl"),
178	MPP_FUNCTION(0x4, "i2c1", "sda")),
179	MPP_MODE(30,
180	MPP_FUNCTION(0x0, "gpio", NULL),
181	MPP_FUNCTION(0x1, "ge0", "rxd7"),
182	MPP_FUNCTION(0x2, "ge1", "rxclk"),
183	MPP_FUNCTION(0x4, "i2c1", "sck")),
184	MPP_MODE(31,
185	MPP_FUNCTION(0x0, "gpio", NULL),
186	MPP_FUNCTION(0x3, "tclk", NULL),
187	MPP_FUNCTION(0x4, "ge0", "txerr")),
188	MPP_MODE(32,
189	MPP_FUNCTION(0x0, "gpio", NULL),
190	MPP_FUNCTION(0x1, "spi0", "cs0")),
191	MPP_MODE(33,
192	MPP_FUNCTION(0x0, "gpio", NULL),
193	MPP_FUNCTION(0x1, "dev", "bootcs"),
194	MPP_FUNCTION(0x2, "spi0", "cs0")),
195	MPP_MODE(34,
196	MPP_FUNCTION(0x0, "gpo", NULL),
7bd6a26d	197	MPP_FUNCTION(0x1, "dev", "we0"),
5f597bb2 TP	198	MPP_FUNCTION(0x2, "spi0", "mosi")),
	199	MPP_MODE(35,
	200	MPP_FUNCTION(0x0, "gpo", NULL),
7bd6a26d	201	MPP_FUNCTION(0x1, "dev", "oe"),
5f597bb2 TP	202	MPP_FUNCTION(0x2, "spi0", "sck")),
	203	MPP_MODE(36,
	204	MPP_FUNCTION(0x0, "gpo", NULL),
	205	MPP_FUNCTION(0x1, "dev", "a1"),
	206	MPP_FUNCTION(0x2, "spi0", "miso")),
	207	MPP_MODE(37,
	208	MPP_FUNCTION(0x0, "gpo", NULL),
	209	MPP_FUNCTION(0x1, "dev", "a0"),
	210	MPP_FUNCTION(0x2, "sata0", "prsnt")),
	211	MPP_MODE(38,
	212	MPP_FUNCTION(0x0, "gpio", NULL),
	213	MPP_FUNCTION(0x1, "dev", "ready"),
	214	MPP_FUNCTION(0x2, "uart1", "cts"),
	215	MPP_FUNCTION(0x3, "uart0", "cts")),
	216	MPP_MODE(39,
	217	MPP_FUNCTION(0x0, "gpo", NULL),
	218	MPP_FUNCTION(0x1, "dev", "ad0"),
	219	MPP_FUNCTION(0x2, "audio", "spdifo")),
	220	MPP_MODE(40,
	221	MPP_FUNCTION(0x0, "gpio", NULL),
	222	MPP_FUNCTION(0x1, "dev", "ad1"),
	223	MPP_FUNCTION(0x2, "uart1", "rts"),
	224	MPP_FUNCTION(0x3, "uart0", "rts")),
	225	MPP_MODE(41,
	226	MPP_FUNCTION(0x0, "gpio", NULL),
	227	MPP_FUNCTION(0x1, "dev", "ad2"),
	228	MPP_FUNCTION(0x2, "uart1", "rxd")),
	229	MPP_MODE(42,
	230	MPP_FUNCTION(0x0, "gpo", NULL),
	231	MPP_FUNCTION(0x1, "dev", "ad3"),
	232	MPP_FUNCTION(0x2, "uart1", "txd")),
	233	MPP_MODE(43,
	234	MPP_FUNCTION(0x0, "gpo", NULL),
	235	MPP_FUNCTION(0x1, "dev", "ad4"),
	236	MPP_FUNCTION(0x2, "audio", "bclk")),
	237	MPP_MODE(44,
	238	MPP_FUNCTION(0x0, "gpo", NULL),
	239	MPP_FUNCTION(0x1, "dev", "ad5"),
	240	MPP_FUNCTION(0x2, "audio", "mclk")),
	241	MPP_MODE(45,
	242	MPP_FUNCTION(0x0, "gpo", NULL),
	243	MPP_FUNCTION(0x1, "dev", "ad6"),
	244	MPP_FUNCTION(0x2, "audio", "lrclk")),
	245	MPP_MODE(46,
	246	MPP_FUNCTION(0x0, "gpo", NULL),
	247	MPP_FUNCTION(0x1, "dev", "ad7"),
	248	MPP_FUNCTION(0x2, "audio", "sdo")),
	249	MPP_MODE(47,
	250	MPP_FUNCTION(0x0, "gpo", NULL),
	251	MPP_FUNCTION(0x1, "dev", "ad8"),
	252	MPP_FUNCTION(0x3, "sd0", "clk"),
	253	MPP_FUNCTION(0x5, "audio", "spdifo")),
	254	MPP_MODE(48,
	255	MPP_FUNCTION(0x0, "gpio", NULL),
	256	MPP_FUNCTION(0x1, "dev", "ad9"),
	257	MPP_FUNCTION(0x2, "uart0", "rts"),
	258	MPP_FUNCTION(0x3, "sd0", "cmd"),
	259	MPP_FUNCTION(0x4, "sata1", "prsnt"),
	260	MPP_FUNCTION(0x5, "spi0", "cs1")),
	261	MPP_MODE(49,
	262	MPP_FUNCTION(0x0, "gpio", NULL),
	263	MPP_FUNCTION(0x1, "dev", "ad10"),
	264	MPP_FUNCTION(0x2, "pcie", "clkreq1"),
	265	MPP_FUNCTION(0x3, "sd0", "d0"),
266	MPP_FUNCTION(0x4, "spi1", "cs0"),
267	MPP_FUNCTION(0x5, "audio", "spdifi")),
268	MPP_MODE(50,
269	MPP_FUNCTION(0x0, "gpio", NULL),
270	MPP_FUNCTION(0x1, "dev", "ad11"),
271	MPP_FUNCTION(0x2, "uart0", "cts"),
272	MPP_FUNCTION(0x3, "sd0", "d1"),
273	MPP_FUNCTION(0x4, "spi1", "miso"),
274	MPP_FUNCTION(0x5, "audio", "rmclk")),
275	MPP_MODE(51,
276	MPP_FUNCTION(0x0, "gpio", NULL),
277	MPP_FUNCTION(0x1, "dev", "ad12"),
278	MPP_FUNCTION(0x2, "i2c1", "sda"),
279	MPP_FUNCTION(0x3, "sd0", "d2"),
280	MPP_FUNCTION(0x4, "spi1", "mosi")),
281	MPP_MODE(52,
282	MPP_FUNCTION(0x0, "gpio", NULL),
283	MPP_FUNCTION(0x1, "dev", "ad13"),
284	MPP_FUNCTION(0x2, "i2c1", "sck"),
285	MPP_FUNCTION(0x3, "sd0", "d3"),
286	MPP_FUNCTION(0x4, "spi1", "sck")),
287	MPP_MODE(53,
288	MPP_FUNCTION(0x0, "gpio", NULL),
289	MPP_FUNCTION(0x1, "dev", "ad14"),
290	MPP_FUNCTION(0x2, "sd0", "clk"),
291	MPP_FUNCTION(0x3, "tdm", "pclk"),
292	MPP_FUNCTION(0x4, "spi0", "cs2"),
293	MPP_FUNCTION(0x5, "pcie", "clkreq1")),
294	MPP_MODE(54,
295	MPP_FUNCTION(0x0, "gpo", NULL),
296	MPP_FUNCTION(0x1, "dev", "ad15"),
297	MPP_FUNCTION(0x3, "tdm", "dtx")),
298	MPP_MODE(55,
299	MPP_FUNCTION(0x0, "gpio", NULL),
300	MPP_FUNCTION(0x1, "dev", "cs1"),
301	MPP_FUNCTION(0x2, "uart1", "txd"),
302	MPP_FUNCTION(0x3, "tdm", "rst"),
303	MPP_FUNCTION(0x4, "sata1", "prsnt"),
304	MPP_FUNCTION(0x5, "sata0", "prsnt")),
305	MPP_MODE(56,
306	MPP_FUNCTION(0x0, "gpio", NULL),
307	MPP_FUNCTION(0x1, "dev", "cs2"),
308	MPP_FUNCTION(0x2, "uart1", "cts"),
309	MPP_FUNCTION(0x3, "uart0", "cts"),
310	MPP_FUNCTION(0x4, "spi0", "cs3"),
311	MPP_FUNCTION(0x5, "pcie", "clkreq0"),
312	MPP_FUNCTION(0x6, "spi1", "cs1")),
313	MPP_MODE(57,
314	MPP_FUNCTION(0x0, "gpio", NULL),
315	MPP_FUNCTION(0x1, "dev", "cs3"),
316	MPP_FUNCTION(0x2, "uart1", "rxd"),
317	MPP_FUNCTION(0x3, "tdm", "fsync"),
318	MPP_FUNCTION(0x4, "sata0", "prsnt"),
319	MPP_FUNCTION(0x5, "audio", "sdo")),
320	MPP_MODE(58,
321	MPP_FUNCTION(0x0, "gpio", NULL),
322	MPP_FUNCTION(0x1, "dev", "cs0"),
323	MPP_FUNCTION(0x2, "uart1", "rts"),
324	MPP_FUNCTION(0x3, "tdm", "int"),
325	MPP_FUNCTION(0x5, "audio", "extclk"),
326	MPP_FUNCTION(0x6, "uart0", "rts")),
327	MPP_MODE(59,
328	MPP_FUNCTION(0x0, "gpo", NULL),
329	MPP_FUNCTION(0x1, "dev", "ale0"),
330	MPP_FUNCTION(0x2, "uart1", "rts"),
331	MPP_FUNCTION(0x3, "uart0", "rts"),
332	MPP_FUNCTION(0x5, "audio", "bclk")),
333	MPP_MODE(60,
334	MPP_FUNCTION(0x0, "gpio", NULL),
335	MPP_FUNCTION(0x1, "dev", "ale1"),
336	MPP_FUNCTION(0x2, "uart1", "rxd"),
337	MPP_FUNCTION(0x3, "sata0", "prsnt"),
d4974c16	338	MPP_FUNCTION(0x4, "pcie", "rstout"),
5f597bb2 TP	339	MPP_FUNCTION(0x5, "audio", "sdi")),
	340	MPP_MODE(61,
	341	MPP_FUNCTION(0x0, "gpo", NULL),
7bd6a26d	342	MPP_FUNCTION(0x1, "dev", "we1"),
5f597bb2	343	MPP_FUNCTION(0x2, "uart1", "txd"),
f32f01e1	344	MPP_FUNCTION(0x5, "audio", "lrclk")),
5f597bb2 TP	345	MPP_MODE(62,
	346	MPP_FUNCTION(0x0, "gpio", NULL),
	347	MPP_FUNCTION(0x1, "dev", "a2"),
	348	MPP_FUNCTION(0x2, "uart1", "cts"),
	349	MPP_FUNCTION(0x3, "tdm", "drx"),
	350	MPP_FUNCTION(0x4, "pcie", "clkreq0"),
	351	MPP_FUNCTION(0x5, "audio", "mclk"),
	352	MPP_FUNCTION(0x6, "uart0", "cts")),
	353	MPP_MODE(63,
a526973e	354	MPP_FUNCTION(0x0, "gpio", NULL),
5f597bb2 TP	355	MPP_FUNCTION(0x1, "spi0", "sck"),
	356	MPP_FUNCTION(0x2, "tclk", NULL)),
	357	MPP_MODE(64,
	358	MPP_FUNCTION(0x0, "gpio", NULL),
	359	MPP_FUNCTION(0x1, "spi0", "miso"),
438881df	360	MPP_FUNCTION(0x2, "spi0", "cs1")),
5f597bb2 TP	361	MPP_MODE(65,
	362	MPP_FUNCTION(0x0, "gpio", NULL),
	363	MPP_FUNCTION(0x1, "spi0", "mosi"),
438881df	364	MPP_FUNCTION(0x2, "spi0", "cs2")),
5f597bb2 TP	365	};
	366
	367	static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;
	368
baa9946e	369	static const struct of_device_id armada_370_pinctrl_of_match[] = {
5f597bb2 TP	370	{ .compatible = "marvell,mv88f6710-pinctrl" },
	371	{ },
	372	};
	373
30be3fb9	374	static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
ad9ec4ec	375	MPP_FUNC_CTRL(0, 65, NULL, mvebu_mmio_mpp_ctrl),
5f597bb2 TP	376	};
	377
	378	static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
	379	MPP_GPIO_RANGE(0, 0, 0, 32),
	380	MPP_GPIO_RANGE(1, 32, 32, 32),
	381	MPP_GPIO_RANGE(2, 64, 64, 2),
	382	};
	383
150632b0	384	static int armada_370_pinctrl_probe(struct platform_device *pdev)
5f597bb2 TP	385	{
	386	struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;
	387
	388	soc->variant = 0; /* no variants for Armada 370 */
	389	soc->controls = mv88f6710_mpp_controls;
	390	soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls);
	391	soc->modes = mv88f6710_mpp_modes;
	392	soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes);
	393	soc->gpioranges = mv88f6710_mpp_gpio_ranges;
	394	soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges);
	395
	396	pdev->dev.platform_data = soc;
	397
ad9ec4ec	398	return mvebu_pinctrl_simple_mmio_probe(pdev);
5f597bb2 TP	399	}
5f597bb2 TP	400
5f597bb2 TP	401	static struct platform_driver armada_370_pinctrl_driver = {
	402	.driver = {
	403	.name = "armada-370-pinctrl",
f2e9394d	404	.of_match_table = armada_370_pinctrl_of_match,
5f597bb2 TP	405	},
5f597bb2 TP	406	.probe = armada_370_pinctrl_probe,
5f597bb2	407	};
fdbde81b	408	builtin_platform_driver(armada_370_pinctrl_driver);