]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/pinctrl/mvebu/pinctrl-armada-375.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / mvebu / pinctrl-armada-375.c
CommitLineData
ce3ed59d
TP		 1/*
2 * Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/err.h>
15#include <linux/init.h>
16#include <linux/io.h>
ce3ed59d
TP		 17#include <linux/platform_device.h>
18#include <linux/clk.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/pinctrl/pinctrl.h>
22
23#include "pinctrl-mvebu.h"
24
ce3ed59d
TP		 25static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
26 MPP_MODE(0,
27 MPP_FUNCTION(0x0, "gpio", NULL),
28 MPP_FUNCTION(0x1, "dev", "ad2"),
29 MPP_FUNCTION(0x2, "spi0", "cs1"),
30 MPP_FUNCTION(0x3, "spi1", "cs1"),
31 MPP_FUNCTION(0x5, "nand", "io2")),
32 MPP_MODE(1,
33 MPP_FUNCTION(0x0, "gpio", NULL),
34 MPP_FUNCTION(0x1, "dev", "ad3"),
35 MPP_FUNCTION(0x2, "spi0", "mosi"),
36 MPP_FUNCTION(0x3, "spi1", "mosi"),
37 MPP_FUNCTION(0x5, "nand", "io3")),
38 MPP_MODE(2,
39 MPP_FUNCTION(0x0, "gpio", NULL),
40 MPP_FUNCTION(0x1, "dev", "ad4"),
9540cf53 41 MPP_FUNCTION(0x2, "ptp", "evreq"),
ce3ed59d
TP		 42 MPP_FUNCTION(0x3, "led", "c0"),
43 MPP_FUNCTION(0x4, "audio", "sdi"),
44 MPP_FUNCTION(0x5, "nand", "io4"),
45 MPP_FUNCTION(0x6, "spi1", "mosi")),
46 MPP_MODE(3,
47 MPP_FUNCTION(0x0, "gpio", NULL),
48 MPP_FUNCTION(0x1, "dev", "ad5"),
9540cf53 49 MPP_FUNCTION(0x2, "ptp", "trig"),
ce3ed59d
TP		 50 MPP_FUNCTION(0x3, "led", "p3"),
51 MPP_FUNCTION(0x4, "audio", "mclk"),
52 MPP_FUNCTION(0x5, "nand", "io5"),
53 MPP_FUNCTION(0x6, "spi1", "miso")),
54 MPP_MODE(4,
55 MPP_FUNCTION(0x0, "gpio", NULL),
56 MPP_FUNCTION(0x1, "dev", "ad6"),
57 MPP_FUNCTION(0x2, "spi0", "miso"),
58 MPP_FUNCTION(0x3, "spi1", "miso"),
59 MPP_FUNCTION(0x5, "nand", "io6")),
60 MPP_MODE(5,
61 MPP_FUNCTION(0x0, "gpio", NULL),
62 MPP_FUNCTION(0x1, "dev", "ad7"),
63 MPP_FUNCTION(0x2, "spi0", "cs2"),
64 MPP_FUNCTION(0x3, "spi1", "cs2"),
65 MPP_FUNCTION(0x5, "nand", "io7"),
66 MPP_FUNCTION(0x6, "spi1", "miso")),
67 MPP_MODE(6,
68 MPP_FUNCTION(0x0, "gpio", NULL),
69 MPP_FUNCTION(0x1, "dev", "ad0"),
70 MPP_FUNCTION(0x3, "led", "p1"),
f32f01e1 71 MPP_FUNCTION(0x4, "audio", "lrclk"),
ce3ed59d
TP		 72 MPP_FUNCTION(0x5, "nand", "io0")),
73 MPP_MODE(7,
74 MPP_FUNCTION(0x0, "gpio", NULL),
75 MPP_FUNCTION(0x1, "dev", "ad1"),
76 MPP_FUNCTION(0x2, "ptp", "clk"),
77 MPP_FUNCTION(0x3, "led", "p2"),
78 MPP_FUNCTION(0x4, "audio", "extclk"),
79 MPP_FUNCTION(0x5, "nand", "io1")),
80 MPP_MODE(8,
81 MPP_FUNCTION(0x0, "gpio", NULL),
d538990e 82 MPP_FUNCTION(0x1, "dev", "bootcs"),
ce3ed59d
TP		 83 MPP_FUNCTION(0x2, "spi0", "cs0"),
84 MPP_FUNCTION(0x3, "spi1", "cs0"),
85 MPP_FUNCTION(0x5, "nand", "ce")),
86 MPP_MODE(9,
87 MPP_FUNCTION(0x0, "gpio", NULL),
ce3ed59d
TP		 88 MPP_FUNCTION(0x2, "spi0", "sck"),
89 MPP_FUNCTION(0x3, "spi1", "sck"),
90 MPP_FUNCTION(0x5, "nand", "we")),
91 MPP_MODE(10,
92 MPP_FUNCTION(0x0, "gpio", NULL),
ce3ed59d
TP		 93 MPP_FUNCTION(0x2, "dram", "vttctrl"),
94 MPP_FUNCTION(0x3, "led", "c1"),
95 MPP_FUNCTION(0x5, "nand", "re"),
96 MPP_FUNCTION(0x6, "spi1", "sck")),
97 MPP_MODE(11,
98 MPP_FUNCTION(0x0, "gpio", NULL),
99 MPP_FUNCTION(0x1, "dev", "a0"),
100 MPP_FUNCTION(0x3, "led", "c2"),
101 MPP_FUNCTION(0x4, "audio", "sdo"),
102 MPP_FUNCTION(0x5, "nand", "cle")),
103 MPP_MODE(12,
104 MPP_FUNCTION(0x0, "gpio", NULL),
105 MPP_FUNCTION(0x1, "dev", "a1"),
106 MPP_FUNCTION(0x4, "audio", "bclk"),
107 MPP_FUNCTION(0x5, "nand", "ale")),
108 MPP_MODE(13,
109 MPP_FUNCTION(0x0, "gpio", NULL),
7bd6a26d 110 MPP_FUNCTION(0x1, "dev", "ready"),
d4974c16
TP		 111 MPP_FUNCTION(0x2, "pcie0", "rstout"),
112 MPP_FUNCTION(0x3, "pcie1", "rstout"),
ce3ed59d
TP		 113 MPP_FUNCTION(0x5, "nand", "rb"),
114 MPP_FUNCTION(0x6, "spi1", "mosi")),
115 MPP_MODE(14,
116 MPP_FUNCTION(0x0, "gpio", NULL),
117 MPP_FUNCTION(0x2, "i2c0", "sda"),
118 MPP_FUNCTION(0x3, "uart1", "txd")),
119 MPP_MODE(15,
120 MPP_FUNCTION(0x0, "gpio", NULL),
121 MPP_FUNCTION(0x2, "i2c0", "sck"),
122 MPP_FUNCTION(0x3, "uart1", "rxd")),
123 MPP_MODE(16,
124 MPP_FUNCTION(0x0, "gpio", NULL),
125 MPP_FUNCTION(0x2, "uart0", "txd")),
126 MPP_MODE(17,
127 MPP_FUNCTION(0x0, "gpio", NULL),
128 MPP_FUNCTION(0x2, "uart0", "rxd")),
129 MPP_MODE(18,
130 MPP_FUNCTION(0x0, "gpio", NULL),
dae5597f 131 MPP_FUNCTION(0x2, "tdm", "int")),
ce3ed59d
TP		 132 MPP_MODE(19,
133 MPP_FUNCTION(0x0, "gpio", NULL),
dae5597f 134 MPP_FUNCTION(0x2, "tdm", "rst")),
ce3ed59d
TP		 135 MPP_MODE(20,
136 MPP_FUNCTION(0x0, "gpio", NULL),
137 MPP_FUNCTION(0x2, "tdm", "pclk")),
138 MPP_MODE(21,
139 MPP_FUNCTION(0x0, "gpio", NULL),
140 MPP_FUNCTION(0x2, "tdm", "fsync")),
141 MPP_MODE(22,
142 MPP_FUNCTION(0x0, "gpio", NULL),
143 MPP_FUNCTION(0x2, "tdm", "drx")),
144 MPP_MODE(23,
145 MPP_FUNCTION(0x0, "gpio", NULL),
146 MPP_FUNCTION(0x2, "tdm", "dtx")),
147 MPP_MODE(24,
148 MPP_FUNCTION(0x0, "gpio", NULL),
149 MPP_FUNCTION(0x1, "led", "p0"),
150 MPP_FUNCTION(0x2, "ge1", "rxd0"),
151 MPP_FUNCTION(0x3, "sd", "cmd"),
152 MPP_FUNCTION(0x4, "uart0", "rts"),
153 MPP_FUNCTION(0x5, "spi0", "cs0"),
154 MPP_FUNCTION(0x6, "dev", "cs1")),
155 MPP_MODE(25,
156 MPP_FUNCTION(0x0, "gpio", NULL),
157 MPP_FUNCTION(0x1, "led", "p2"),
158 MPP_FUNCTION(0x2, "ge1", "rxd1"),
159 MPP_FUNCTION(0x3, "sd", "d0"),
160 MPP_FUNCTION(0x4, "uart0", "cts"),
161 MPP_FUNCTION(0x5, "spi0", "mosi"),
162 MPP_FUNCTION(0x6, "dev", "cs2")),
163 MPP_MODE(26,
164 MPP_FUNCTION(0x0, "gpio", NULL),
165 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
166 MPP_FUNCTION(0x2, "ge1", "rxd2"),
167 MPP_FUNCTION(0x3, "sd", "d2"),
168 MPP_FUNCTION(0x4, "uart1", "rts"),
169 MPP_FUNCTION(0x5, "spi0", "cs1"),
170 MPP_FUNCTION(0x6, "led", "c1")),
171 MPP_MODE(27,
172 MPP_FUNCTION(0x0, "gpio", NULL),
173 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
174 MPP_FUNCTION(0x2, "ge1", "rxd3"),
175 MPP_FUNCTION(0x3, "sd", "d1"),
176 MPP_FUNCTION(0x4, "uart1", "cts"),
177 MPP_FUNCTION(0x5, "spi0", "miso"),
178 MPP_FUNCTION(0x6, "led", "c2")),
179 MPP_MODE(28,
180 MPP_FUNCTION(0x0, "gpio", NULL),
181 MPP_FUNCTION(0x1, "led", "p3"),
182 MPP_FUNCTION(0x2, "ge1", "txctl"),
183 MPP_FUNCTION(0x3, "sd", "clk"),
184 MPP_FUNCTION(0x5, "dram", "vttctrl")),
185 MPP_MODE(29,
186 MPP_FUNCTION(0x0, "gpio", NULL),
187 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
188 MPP_FUNCTION(0x2, "ge1", "rxclk"),
189 MPP_FUNCTION(0x3, "sd", "d3"),
190 MPP_FUNCTION(0x5, "spi0", "sck"),
d4974c16 191 MPP_FUNCTION(0x6, "pcie0", "rstout")),
ce3ed59d
TP		 192 MPP_MODE(30,
193 MPP_FUNCTION(0x0, "gpio", NULL),
194 MPP_FUNCTION(0x2, "ge1", "txd0"),
195 MPP_FUNCTION(0x3, "spi1", "cs0"),
196 MPP_FUNCTION(0x5, "led", "p3"),
9540cf53 197 MPP_FUNCTION(0x6, "ptp", "evreq")),
ce3ed59d
TP		 198 MPP_MODE(31,
199 MPP_FUNCTION(0x0, "gpio", NULL),
200 MPP_FUNCTION(0x2, "ge1", "txd1"),
201 MPP_FUNCTION(0x3, "spi1", "mosi"),
202 MPP_FUNCTION(0x5, "led", "p0")),
203 MPP_MODE(32,
204 MPP_FUNCTION(0x0, "gpio", NULL),
205 MPP_FUNCTION(0x2, "ge1", "txd2"),
206 MPP_FUNCTION(0x3, "spi1", "sck"),
9540cf53 207 MPP_FUNCTION(0x4, "ptp", "trig"),
ce3ed59d
TP		 208 MPP_FUNCTION(0x5, "led", "c0")),
209 MPP_MODE(33,
210 MPP_FUNCTION(0x0, "gpio", NULL),
211 MPP_FUNCTION(0x2, "ge1", "txd3"),
212 MPP_FUNCTION(0x3, "spi1", "miso"),
213 MPP_FUNCTION(0x5, "led", "p2")),
214 MPP_MODE(34,
215 MPP_FUNCTION(0x0, "gpio", NULL),
216 MPP_FUNCTION(0x2, "ge1", "txclkout"),
217 MPP_FUNCTION(0x3, "spi1", "sck"),
218 MPP_FUNCTION(0x5, "led", "c1")),
219 MPP_MODE(35,
220 MPP_FUNCTION(0x0, "gpio", NULL),
221 MPP_FUNCTION(0x2, "ge1", "rxctl"),
222 MPP_FUNCTION(0x3, "spi1", "cs1"),
223 MPP_FUNCTION(0x4, "spi0", "cs2"),
224 MPP_FUNCTION(0x5, "led", "p1")),
225 MPP_MODE(36,
226 MPP_FUNCTION(0x0, "gpio", NULL),
227 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
228 MPP_FUNCTION(0x5, "led", "c2")),
229 MPP_MODE(37,
230 MPP_FUNCTION(0x0, "gpio", NULL),
231 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
dae5597f 232 MPP_FUNCTION(0x2, "tdm", "int"),
ce3ed59d
TP		 233 MPP_FUNCTION(0x4, "ge", "mdc")),
234 MPP_MODE(38,
235 MPP_FUNCTION(0x0, "gpio", NULL),
236 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
237 MPP_FUNCTION(0x4, "ge", "mdio")),
238 MPP_MODE(39,
239 MPP_FUNCTION(0x0, "gpio", NULL),
240 MPP_FUNCTION(0x4, "ref", "clkout"),
241 MPP_FUNCTION(0x5, "led", "p3")),
242 MPP_MODE(40,
243 MPP_FUNCTION(0x0, "gpio", NULL),
244 MPP_FUNCTION(0x4, "uart1", "txd"),
245 MPP_FUNCTION(0x5, "led", "p0")),
246 MPP_MODE(41,
247 MPP_FUNCTION(0x0, "gpio", NULL),
248 MPP_FUNCTION(0x4, "uart1", "rxd"),
249 MPP_FUNCTION(0x5, "led", "p1")),
250 MPP_MODE(42,
251 MPP_FUNCTION(0x0, "gpio", NULL),
252 MPP_FUNCTION(0x3, "spi1", "cs2"),
253 MPP_FUNCTION(0x4, "led", "c0"),
254 MPP_FUNCTION(0x6, "ptp", "clk")),
255 MPP_MODE(43,
256 MPP_FUNCTION(0x0, "gpio", NULL),
257 MPP_FUNCTION(0x2, "sata0", "prsnt"),
258 MPP_FUNCTION(0x4, "dram", "vttctrl"),
259 MPP_FUNCTION(0x5, "led", "c1")),
260 MPP_MODE(44,
261 MPP_FUNCTION(0x0, "gpio", NULL),
262 MPP_FUNCTION(0x4, "sata0", "prsnt")),
263 MPP_MODE(45,
264 MPP_FUNCTION(0x0, "gpio", NULL),
265 MPP_FUNCTION(0x2, "spi0", "cs2"),
d4974c16 266 MPP_FUNCTION(0x4, "pcie0", "rstout"),
ce3ed59d
TP		 267 MPP_FUNCTION(0x5, "led", "c2"),
268 MPP_FUNCTION(0x6, "spi1", "cs2")),
269 MPP_MODE(46,
270 MPP_FUNCTION(0x0, "gpio", NULL),
271 MPP_FUNCTION(0x1, "led", "p0"),
272 MPP_FUNCTION(0x2, "ge0", "txd0"),
273 MPP_FUNCTION(0x3, "ge1", "txd0"),
7bd6a26d 274 MPP_FUNCTION(0x6, "dev", "we1")),
ce3ed59d
TP		 275 MPP_MODE(47,
276 MPP_FUNCTION(0x0, "gpio", NULL),
277 MPP_FUNCTION(0x1, "led", "p1"),
278 MPP_FUNCTION(0x2, "ge0", "txd1"),
279 MPP_FUNCTION(0x3, "ge1", "txd1"),
9540cf53 280 MPP_FUNCTION(0x5, "ptp", "trig"),
ce3ed59d
TP		 281 MPP_FUNCTION(0x6, "dev", "ale0")),
282 MPP_MODE(48,
283 MPP_FUNCTION(0x0, "gpio", NULL),
284 MPP_FUNCTION(0x1, "led", "p2"),
285 MPP_FUNCTION(0x2, "ge0", "txd2"),
286 MPP_FUNCTION(0x3, "ge1", "txd2"),
287 MPP_FUNCTION(0x6, "dev", "ale1")),
288 MPP_MODE(49,
289 MPP_FUNCTION(0x0, "gpio", NULL),
290 MPP_FUNCTION(0x1, "led", "p3"),
291 MPP_FUNCTION(0x2, "ge0", "txd3"),
292 MPP_FUNCTION(0x3, "ge1", "txd3"),
293 MPP_FUNCTION(0x6, "dev", "a2")),
294 MPP_MODE(50,
295 MPP_FUNCTION(0x0, "gpio", NULL),
296 MPP_FUNCTION(0x1, "led", "c0"),
297 MPP_FUNCTION(0x2, "ge0", "rxd0"),
298 MPP_FUNCTION(0x3, "ge1", "rxd0"),
9540cf53 299 MPP_FUNCTION(0x5, "ptp", "evreq"),
ce3ed59d
TP		 300 MPP_FUNCTION(0x6, "dev", "ad12")),
301 MPP_MODE(51,
302 MPP_FUNCTION(0x0, "gpio", NULL),
303 MPP_FUNCTION(0x1, "led", "c1"),
304 MPP_FUNCTION(0x2, "ge0", "rxd1"),
305 MPP_FUNCTION(0x3, "ge1", "rxd1"),
306 MPP_FUNCTION(0x6, "dev", "ad8")),
307 MPP_MODE(52,
308 MPP_FUNCTION(0x0, "gpio", NULL),
309 MPP_FUNCTION(0x1, "led", "c2"),
310 MPP_FUNCTION(0x2, "ge0", "rxd2"),
311 MPP_FUNCTION(0x3, "ge1", "rxd2"),
312 MPP_FUNCTION(0x5, "i2c0", "sda"),
313 MPP_FUNCTION(0x6, "dev", "ad9")),
314 MPP_MODE(53,
315 MPP_FUNCTION(0x0, "gpio", NULL),
d4974c16 316 MPP_FUNCTION(0x1, "pcie1", "rstout"),
ce3ed59d
TP		 317 MPP_FUNCTION(0x2, "ge0", "rxd3"),
318 MPP_FUNCTION(0x3, "ge1", "rxd3"),
319 MPP_FUNCTION(0x5, "i2c0", "sck"),
320 MPP_FUNCTION(0x6, "dev", "ad10")),
321 MPP_MODE(54,
322 MPP_FUNCTION(0x0, "gpio", NULL),
d4974c16 323 MPP_FUNCTION(0x1, "pcie0", "rstout"),
ce3ed59d
TP		 324 MPP_FUNCTION(0x2, "ge0", "rxctl"),
325 MPP_FUNCTION(0x3, "ge1", "rxctl"),
326 MPP_FUNCTION(0x6, "dev", "ad11")),
327 MPP_MODE(55,
328 MPP_FUNCTION(0x0, "gpio", NULL),
329 MPP_FUNCTION(0x2, "ge0", "rxclk"),
330 MPP_FUNCTION(0x3, "ge1", "rxclk"),
331 MPP_FUNCTION(0x6, "dev", "cs0")),
332 MPP_MODE(56,
333 MPP_FUNCTION(0x0, "gpio", NULL),
334 MPP_FUNCTION(0x2, "ge0", "txclkout"),
335 MPP_FUNCTION(0x3, "ge1", "txclkout"),
336 MPP_FUNCTION(0x6, "dev", "oe")),
337 MPP_MODE(57,
338 MPP_FUNCTION(0x0, "gpio", NULL),
339 MPP_FUNCTION(0x2, "ge0", "txctl"),
340 MPP_FUNCTION(0x3, "ge1", "txctl"),
7bd6a26d 341 MPP_FUNCTION(0x6, "dev", "we0")),
ce3ed59d
TP		 342 MPP_MODE(58,
343 MPP_FUNCTION(0x0, "gpio", NULL),
344 MPP_FUNCTION(0x4, "led", "c0")),
345 MPP_MODE(59,
346 MPP_FUNCTION(0x0, "gpio", NULL),
347 MPP_FUNCTION(0x4, "led", "c1")),
348 MPP_MODE(60,
349 MPP_FUNCTION(0x0, "gpio", NULL),
350 MPP_FUNCTION(0x2, "uart1", "txd"),
351 MPP_FUNCTION(0x4, "led", "c2"),
352 MPP_FUNCTION(0x6, "dev", "ad13")),
353 MPP_MODE(61,
354 MPP_FUNCTION(0x0, "gpio", NULL),
355 MPP_FUNCTION(0x1, "i2c1", "sda"),
356 MPP_FUNCTION(0x2, "uart1", "rxd"),
357 MPP_FUNCTION(0x3, "spi1", "cs2"),
358 MPP_FUNCTION(0x4, "led", "p0"),
359 MPP_FUNCTION(0x6, "dev", "ad14")),
360 MPP_MODE(62,
361 MPP_FUNCTION(0x0, "gpio", NULL),
362 MPP_FUNCTION(0x1, "i2c1", "sck"),
363 MPP_FUNCTION(0x4, "led", "p1"),
364 MPP_FUNCTION(0x6, "dev", "ad15")),
365 MPP_MODE(63,
366 MPP_FUNCTION(0x0, "gpio", NULL),
9540cf53 367 MPP_FUNCTION(0x2, "ptp", "trig"),
ce3ed59d 368 MPP_FUNCTION(0x4, "led", "p2"),
7bd6a26d 369 MPP_FUNCTION(0x6, "dev", "burst/last")),
ce3ed59d
TP		 370 MPP_MODE(64,
371 MPP_FUNCTION(0x0, "gpio", NULL),
372 MPP_FUNCTION(0x2, "dram", "vttctrl"),
373 MPP_FUNCTION(0x4, "led", "p3")),
374 MPP_MODE(65,
375 MPP_FUNCTION(0x0, "gpio", NULL),
376 MPP_FUNCTION(0x1, "sata1", "prsnt")),
377 MPP_MODE(66,
378 MPP_FUNCTION(0x0, "gpio", NULL),
9540cf53 379 MPP_FUNCTION(0x2, "ptp", "evreq"),
ce3ed59d 380 MPP_FUNCTION(0x4, "spi1", "cs3"),
d4974c16 381 MPP_FUNCTION(0x5, "pcie0", "rstout"),
ce3ed59d
TP		 382 MPP_FUNCTION(0x6, "dev", "cs3")),
383};
384
385static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
386
baa9946e 387static const struct of_device_id armada_375_pinctrl_of_match[] = {
ce3ed59d
TP		 388 { .compatible = "marvell,mv88f6720-pinctrl" },
389 { },
390};
391
30be3fb9 392static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
ad9ec4ec 393 MPP_FUNC_CTRL(0, 69, NULL, mvebu_mmio_mpp_ctrl),
ce3ed59d
TP		 394};
395
396static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = {
397 MPP_GPIO_RANGE(0, 0, 0, 32),
398 MPP_GPIO_RANGE(1, 32, 32, 32),
399 MPP_GPIO_RANGE(2, 64, 64, 3),
400};
401
402static int armada_375_pinctrl_probe(struct platform_device *pdev)
403{
404 struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info;
ce3ed59d
TP		 405
406 soc->variant = 0; /* no variants for Armada 375 */
407 soc->controls = mv88f6720_mpp_controls;
408 soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls);
409 soc->modes = mv88f6720_mpp_modes;
410 soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes);
411 soc->gpioranges = mv88f6720_mpp_gpio_ranges;
412 soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges);
413
414 pdev->dev.platform_data = soc;
415
ad9ec4ec 416 return mvebu_pinctrl_simple_mmio_probe(pdev);
ce3ed59d
TP		 417}
418
ce3ed59d
TP		 419static struct platform_driver armada_375_pinctrl_driver = {
420 .driver = {
421 .name = "armada-375-pinctrl",
ce3ed59d
TP		 422 .of_match_table = of_match_ptr(armada_375_pinctrl_of_match),
423 },
424 .probe = armada_375_pinctrl_probe,
ce3ed59d 425};
fdbde81b 426builtin_platform_driver(armada_375_pinctrl_driver);
Ubuntu Artful kernel mirror