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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
def8e228
HH
2/*
3 * Marvell Armada CP110 pinctrl driver based on mvebu pinctrl core
4 *
5 * Copyright (C) 2017 Marvell
6 *
7 * Hanna Hawa <hannah@marvell.com>
def8e228
HH
8 */
9
10#include <linux/err.h>
11#include <linux/init.h>
12#include <linux/io.h>
13#include <linux/mfd/syscon.h>
14#include <linux/of.h>
15#include <linux/of_device.h>
16#include <linux/pinctrl/pinctrl.h>
17#include <linux/platform_device.h>
18
19#include "pinctrl-mvebu.h"
20
21/*
22 * Even if the pin controller is the same the MMP available depend on the SoC
23 * integration.
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
25 * MMP 39 to 43)
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
28 * V_ARMADA_8K_CPS) set which MPP is available to the CPx.
29 * The x_PLUS enum mean that the MPP available for CPx and for Armada70x0
30 */
31enum {
32 V_ARMADA_7K = BIT(0),
33 V_ARMADA_8K_CPM = BIT(1),
34 V_ARMADA_8K_CPS = BIT(2),
35 V_ARMADA_7K_8K_CPM = (V_ARMADA_7K | V_ARMADA_8K_CPM),
36 V_ARMADA_7K_8K_CPS = (V_ARMADA_7K | V_ARMADA_8K_CPS),
37};
38
39static struct mvebu_mpp_mode armada_cp110_mpp_modes[] = {
40 MPP_MODE(0,
41 MPP_FUNCTION(0, "gpio", NULL),
42 MPP_FUNCTION(1, "dev", "ale1"),
43 MPP_FUNCTION(2, "au", "i2smclk"),
44 MPP_FUNCTION(3, "ge0", "rxd3"),
45 MPP_FUNCTION(4, "tdm", "pclk"),
46 MPP_FUNCTION(6, "ptp", "pulse"),
47 MPP_FUNCTION(7, "mss_i2c", "sda"),
48 MPP_FUNCTION(8, "uart0", "rxd"),
49 MPP_FUNCTION(9, "sata0", "present_act"),
50 MPP_FUNCTION(10, "ge", "mdio")),
51 MPP_MODE(1,
52 MPP_FUNCTION(0, "gpio", NULL),
53 MPP_FUNCTION(1, "dev", "ale0"),
54 MPP_FUNCTION(2, "au", "i2sdo_spdifo"),
55 MPP_FUNCTION(3, "ge0", "rxd2"),
56 MPP_FUNCTION(4, "tdm", "drx"),
57 MPP_FUNCTION(6, "ptp", "clk"),
58 MPP_FUNCTION(7, "mss_i2c", "sck"),
59 MPP_FUNCTION(8, "uart0", "txd"),
60 MPP_FUNCTION(9, "sata1", "present_act"),
61 MPP_FUNCTION(10, "ge", "mdc")),
62 MPP_MODE(2,
63 MPP_FUNCTION(0, "gpio", NULL),
64 MPP_FUNCTION(1, "dev", "ad15"),
65 MPP_FUNCTION(2, "au", "i2sextclk"),
66 MPP_FUNCTION(3, "ge0", "rxd1"),
67 MPP_FUNCTION(4, "tdm", "dtx"),
68 MPP_FUNCTION(5, "mss_uart", "rxd"),
69 MPP_FUNCTION(6, "ptp", "pclk_out"),
70 MPP_FUNCTION(7, "i2c1", "sck"),
71 MPP_FUNCTION(8, "uart1", "rxd"),
72 MPP_FUNCTION(9, "sata0", "present_act"),
73 MPP_FUNCTION(10, "xg", "mdc")),
74 MPP_MODE(3,
75 MPP_FUNCTION(0, "gpio", NULL),
76 MPP_FUNCTION(1, "dev", "ad14"),
77 MPP_FUNCTION(2, "au", "i2slrclk"),
78 MPP_FUNCTION(3, "ge0", "rxd0"),
79 MPP_FUNCTION(4, "tdm", "fsync"),
80 MPP_FUNCTION(5, "mss_uart", "txd"),
81 MPP_FUNCTION(6, "pcie", "rstoutn"),
82 MPP_FUNCTION(7, "i2c1", "sda"),
83 MPP_FUNCTION(8, "uart1", "txd"),
84 MPP_FUNCTION(9, "sata1", "present_act"),
85 MPP_FUNCTION(10, "xg", "mdio")),
86 MPP_MODE(4,
87 MPP_FUNCTION(0, "gpio", NULL),
88 MPP_FUNCTION(1, "dev", "ad13"),
89 MPP_FUNCTION(2, "au", "i2sbclk"),
90 MPP_FUNCTION(3, "ge0", "rxctl"),
91 MPP_FUNCTION(4, "tdm", "rstn"),
92 MPP_FUNCTION(5, "mss_uart", "rxd"),
93 MPP_FUNCTION(6, "uart1", "cts"),
94 MPP_FUNCTION(7, "pcie0", "clkreq"),
95 MPP_FUNCTION(8, "uart3", "rxd"),
96 MPP_FUNCTION(10, "ge", "mdc")),
97 MPP_MODE(5,
98 MPP_FUNCTION(0, "gpio", NULL),
99 MPP_FUNCTION(1, "dev", "ad12"),
100 MPP_FUNCTION(2, "au", "i2sdi"),
101 MPP_FUNCTION(3, "ge0", "rxclk"),
102 MPP_FUNCTION(4, "tdm", "intn"),
103 MPP_FUNCTION(5, "mss_uart", "txd"),
104 MPP_FUNCTION(6, "uart1", "rts"),
105 MPP_FUNCTION(7, "pcie1", "clkreq"),
106 MPP_FUNCTION(8, "uart3", "txd"),
107 MPP_FUNCTION(10, "ge", "mdio")),
108 MPP_MODE(6,
109 MPP_FUNCTION(0, "gpio", NULL),
110 MPP_FUNCTION(1, "dev", "ad11"),
111 MPP_FUNCTION(3, "ge0", "txd3"),
112 MPP_FUNCTION(4, "spi0", "csn2"),
113 MPP_FUNCTION(5, "au", "i2sextclk"),
114 MPP_FUNCTION(6, "sata1", "present_act"),
115 MPP_FUNCTION(7, "pcie2", "clkreq"),
116 MPP_FUNCTION(8, "uart0", "rxd"),
117 MPP_FUNCTION(9, "ptp", "pulse")),
118 MPP_MODE(7,
119 MPP_FUNCTION(0, "gpio", NULL),
120 MPP_FUNCTION(1, "dev", "ad10"),
121 MPP_FUNCTION(3, "ge0", "txd2"),
122 MPP_FUNCTION(4, "spi0", "csn1"),
123 MPP_FUNCTION(5, "spi1", "csn1"),
124 MPP_FUNCTION(6, "sata0", "present_act"),
125 MPP_FUNCTION(7, "led", "data"),
126 MPP_FUNCTION(8, "uart0", "txd"),
127 MPP_FUNCTION(9, "ptp", "clk")),
128 MPP_MODE(8,
129 MPP_FUNCTION(0, "gpio", NULL),
130 MPP_FUNCTION(1, "dev", "ad9"),
131 MPP_FUNCTION(3, "ge0", "txd1"),
132 MPP_FUNCTION(4, "spi0", "csn0"),
133 MPP_FUNCTION(5, "spi1", "csn0"),
134 MPP_FUNCTION(6, "uart0", "cts"),
135 MPP_FUNCTION(7, "led", "stb"),
136 MPP_FUNCTION(8, "uart2", "rxd"),
137 MPP_FUNCTION(9, "ptp", "pclk_out"),
138 MPP_FUNCTION(10, "synce1", "clk")),
139 MPP_MODE(9,
140 MPP_FUNCTION(0, "gpio", NULL),
141 MPP_FUNCTION(1, "dev", "ad8"),
142 MPP_FUNCTION(3, "ge0", "txd0"),
143 MPP_FUNCTION(4, "spi0", "mosi"),
144 MPP_FUNCTION(5, "spi1", "mosi"),
145 MPP_FUNCTION(7, "pcie", "rstoutn"),
146 MPP_FUNCTION(10, "synce2", "clk")),
147 MPP_MODE(10,
148 MPP_FUNCTION(0, "gpio", NULL),
149 MPP_FUNCTION(1, "dev", "readyn"),
150 MPP_FUNCTION(3, "ge0", "txctl"),
151 MPP_FUNCTION(4, "spi0", "miso"),
152 MPP_FUNCTION(5, "spi1", "miso"),
153 MPP_FUNCTION(6, "uart0", "cts"),
154 MPP_FUNCTION(7, "sata1", "present_act")),
155 MPP_MODE(11,
156 MPP_FUNCTION(0, "gpio", NULL),
157 MPP_FUNCTION(1, "dev", "wen1"),
158 MPP_FUNCTION(3, "ge0", "txclkout"),
159 MPP_FUNCTION(4, "spi0", "clk"),
160 MPP_FUNCTION(5, "spi1", "clk"),
161 MPP_FUNCTION(6, "uart0", "rts"),
162 MPP_FUNCTION(7, "led", "clk"),
163 MPP_FUNCTION(8, "uart2", "txd"),
164 MPP_FUNCTION(9, "sata0", "present_act")),
165 MPP_MODE(12,
166 MPP_FUNCTION(0, "gpio", NULL),
167 MPP_FUNCTION(1, "dev", "clk_out"),
168 MPP_FUNCTION(2, "nf", "rbn1"),
169 MPP_FUNCTION(3, "spi1", "csn1"),
170 MPP_FUNCTION(4, "ge0", "rxclk")),
171 MPP_MODE(13,
172 MPP_FUNCTION(0, "gpio", NULL),
173 MPP_FUNCTION(1, "dev", "burstn"),
174 MPP_FUNCTION(2, "nf", "rbn0"),
175 MPP_FUNCTION(3, "spi1", "miso"),
176 MPP_FUNCTION(4, "ge0", "rxctl"),
177 MPP_FUNCTION(8, "mss_spi", "miso")),
178 MPP_MODE(14,
179 MPP_FUNCTION(0, "gpio", NULL),
180 MPP_FUNCTION(1, "dev", "bootcsn"),
181 MPP_FUNCTION(2, "dev", "csn0"),
182 MPP_FUNCTION(3, "spi1", "csn0"),
183 MPP_FUNCTION(4, "spi0", "csn3"),
184 MPP_FUNCTION(5, "au", "i2sextclk"),
185 MPP_FUNCTION(6, "spi0", "miso"),
186 MPP_FUNCTION(7, "sata0", "present_act"),
187 MPP_FUNCTION(8, "mss_spi", "csn")),
188 MPP_MODE(15,
189 MPP_FUNCTION(0, "gpio", NULL),
190 MPP_FUNCTION(1, "dev", "ad7"),
191 MPP_FUNCTION(3, "spi1", "mosi"),
192 MPP_FUNCTION(6, "spi0", "mosi"),
193 MPP_FUNCTION(8, "mss_spi", "mosi"),
194 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")),
195 MPP_MODE(16,
196 MPP_FUNCTION(0, "gpio", NULL),
197 MPP_FUNCTION(1, "dev", "ad6"),
198 MPP_FUNCTION(3, "spi1", "clk"),
199 MPP_FUNCTION(8, "mss_spi", "clk")),
200 MPP_MODE(17,
201 MPP_FUNCTION(0, "gpio", NULL),
202 MPP_FUNCTION(1, "dev", "ad5"),
203 MPP_FUNCTION(4, "ge0", "txd3")),
204 MPP_MODE(18,
205 MPP_FUNCTION(0, "gpio", NULL),
206 MPP_FUNCTION(1, "dev", "ad4"),
207 MPP_FUNCTION(4, "ge0", "txd2"),
208 MPP_FUNCTION(11, "ptp", "clk_cp2cp")),
209 MPP_MODE(19,
210 MPP_FUNCTION(0, "gpio", NULL),
211 MPP_FUNCTION(1, "dev", "ad3"),
212 MPP_FUNCTION(4, "ge0", "txd1"),
213 MPP_FUNCTION(11, "wakeup", "out_cp2cp")),
214 MPP_MODE(20,
215 MPP_FUNCTION(0, "gpio", NULL),
216 MPP_FUNCTION(1, "dev", "ad2"),
217 MPP_FUNCTION(4, "ge0", "txd0")),
218 MPP_MODE(21,
219 MPP_FUNCTION(0, "gpio", NULL),
220 MPP_FUNCTION(1, "dev", "ad1"),
221 MPP_FUNCTION(4, "ge0", "txctl"),
222 MPP_FUNCTION(11, "sei", "in_cp2cp")),
223 MPP_MODE(22,
224 MPP_FUNCTION(0, "gpio", NULL),
225 MPP_FUNCTION(1, "dev", "ad0"),
226 MPP_FUNCTION(4, "ge0", "txclkout"),
227 MPP_FUNCTION(11, "wakeup", "in_cp2cp")),
228 MPP_MODE(23,
229 MPP_FUNCTION(0, "gpio", NULL),
230 MPP_FUNCTION(1, "dev", "a1"),
231 MPP_FUNCTION(5, "au", "i2smclk"),
232 MPP_FUNCTION(11, "link", "rd_in_cp2cp")),
233 MPP_MODE(24,
234 MPP_FUNCTION(0, "gpio", NULL),
235 MPP_FUNCTION(1, "dev", "a0"),
236 MPP_FUNCTION(5, "au", "i2slrclk")),
237 MPP_MODE(25,
238 MPP_FUNCTION(0, "gpio", NULL),
239 MPP_FUNCTION(1, "dev", "oen"),
240 MPP_FUNCTION(5, "au", "i2sdo_spdifo")),
241 MPP_MODE(26,
242 MPP_FUNCTION(0, "gpio", NULL),
243 MPP_FUNCTION(1, "dev", "wen0"),
244 MPP_FUNCTION(5, "au", "i2sbclk")),
245 MPP_MODE(27,
246 MPP_FUNCTION(0, "gpio", NULL),
247 MPP_FUNCTION(1, "dev", "csn0"),
248 MPP_FUNCTION(2, "spi1", "miso"),
249 MPP_FUNCTION(3, "mss_gpio4", NULL),
250 MPP_FUNCTION(4, "ge0", "rxd3"),
251 MPP_FUNCTION(5, "spi0", "csn4"),
252 MPP_FUNCTION(8, "ge", "mdio"),
253 MPP_FUNCTION(9, "sata0", "present_act"),
254 MPP_FUNCTION(10, "uart0", "rts"),
255 MPP_FUNCTION(11, "rei", "in_cp2cp")),
256 MPP_MODE(28,
257 MPP_FUNCTION(0, "gpio", NULL),
258 MPP_FUNCTION(1, "dev", "csn1"),
259 MPP_FUNCTION(2, "spi1", "csn0"),
260 MPP_FUNCTION(3, "mss_gpio5", NULL),
261 MPP_FUNCTION(4, "ge0", "rxd2"),
262 MPP_FUNCTION(5, "spi0", "csn5"),
263 MPP_FUNCTION(6, "pcie2", "clkreq"),
264 MPP_FUNCTION(7, "ptp", "pulse"),
265 MPP_FUNCTION(8, "ge", "mdc"),
266 MPP_FUNCTION(9, "sata1", "present_act"),
267 MPP_FUNCTION(10, "uart0", "cts"),
268 MPP_FUNCTION(11, "led", "data")),
269 MPP_MODE(29,
270 MPP_FUNCTION(0, "gpio", NULL),
271 MPP_FUNCTION(1, "dev", "csn2"),
272 MPP_FUNCTION(2, "spi1", "mosi"),
273 MPP_FUNCTION(3, "mss_gpio6", NULL),
274 MPP_FUNCTION(4, "ge0", "rxd1"),
275 MPP_FUNCTION(5, "spi0", "csn6"),
276 MPP_FUNCTION(6, "pcie1", "clkreq"),
277 MPP_FUNCTION(7, "ptp", "clk"),
278 MPP_FUNCTION(8, "mss_i2c", "sda"),
279 MPP_FUNCTION(9, "sata0", "present_act"),
280 MPP_FUNCTION(10, "uart0", "rxd"),
281 MPP_FUNCTION(11, "led", "stb")),
282 MPP_MODE(30,
283 MPP_FUNCTION(0, "gpio", NULL),
284 MPP_FUNCTION(1, "dev", "csn3"),
285 MPP_FUNCTION(2, "spi1", "clk"),
286 MPP_FUNCTION(3, "mss_gpio7", NULL),
287 MPP_FUNCTION(4, "ge0", "rxd0"),
288 MPP_FUNCTION(5, "spi0", "csn7"),
289 MPP_FUNCTION(6, "pcie0", "clkreq"),
290 MPP_FUNCTION(7, "ptp", "pclk_out"),
291 MPP_FUNCTION(8, "mss_i2c", "sck"),
292 MPP_FUNCTION(9, "sata1", "present_act"),
293 MPP_FUNCTION(10, "uart0", "txd"),
294 MPP_FUNCTION(11, "led", "clk")),
295 MPP_MODE(31,
296 MPP_FUNCTION(0, "gpio", NULL),
297 MPP_FUNCTION(1, "dev", "a2"),
298 MPP_FUNCTION(3, "mss_gpio4", NULL),
299 MPP_FUNCTION(6, "pcie", "rstoutn"),
300 MPP_FUNCTION(8, "ge", "mdc")),
301 MPP_MODE(32,
302 MPP_FUNCTION(0, "gpio", NULL),
303 MPP_FUNCTION(1, "mii", "col"),
304 MPP_FUNCTION(2, "mii", "txerr"),
305 MPP_FUNCTION(3, "mss_spi", "miso"),
306 MPP_FUNCTION(4, "tdm", "drx"),
307 MPP_FUNCTION(5, "au", "i2sextclk"),
308 MPP_FUNCTION(6, "au", "i2sdi"),
309 MPP_FUNCTION(7, "ge", "mdio"),
310 MPP_FUNCTION(8, "sdio", "v18_en"),
311 MPP_FUNCTION(9, "pcie1", "clkreq"),
312 MPP_FUNCTION(10, "mss_gpio0", NULL)),
313 MPP_MODE(33,
314 MPP_FUNCTION(0, "gpio", NULL),
315 MPP_FUNCTION(1, "mii", "txclk"),
316 MPP_FUNCTION(2, "sdio", "pwr10"),
317 MPP_FUNCTION(3, "mss_spi", "csn"),
318 MPP_FUNCTION(4, "tdm", "fsync"),
319 MPP_FUNCTION(5, "au", "i2smclk"),
320 MPP_FUNCTION(6, "sdio", "bus_pwr"),
321 MPP_FUNCTION(8, "xg", "mdio"),
322 MPP_FUNCTION(9, "pcie2", "clkreq"),
323 MPP_FUNCTION(10, "mss_gpio1", NULL)),
324 MPP_MODE(34,
325 MPP_FUNCTION(0, "gpio", NULL),
326 MPP_FUNCTION(1, "mii", "rxerr"),
327 MPP_FUNCTION(2, "sdio", "pwr11"),
328 MPP_FUNCTION(3, "mss_spi", "mosi"),
329 MPP_FUNCTION(4, "tdm", "dtx"),
330 MPP_FUNCTION(5, "au", "i2slrclk"),
331 MPP_FUNCTION(6, "sdio", "wr_protect"),
332 MPP_FUNCTION(7, "ge", "mdc"),
333 MPP_FUNCTION(9, "pcie0", "clkreq"),
334 MPP_FUNCTION(10, "mss_gpio2", NULL)),
335 MPP_MODE(35,
336 MPP_FUNCTION(0, "gpio", NULL),
337 MPP_FUNCTION(1, "sata1", "present_act"),
338 MPP_FUNCTION(2, "i2c1", "sda"),
339 MPP_FUNCTION(3, "mss_spi", "clk"),
340 MPP_FUNCTION(4, "tdm", "pclk"),
341 MPP_FUNCTION(5, "au", "i2sdo_spdifo"),
342 MPP_FUNCTION(6, "sdio", "card_detect"),
343 MPP_FUNCTION(7, "xg", "mdio"),
344 MPP_FUNCTION(8, "ge", "mdio"),
345 MPP_FUNCTION(9, "pcie", "rstoutn"),
346 MPP_FUNCTION(10, "mss_gpio3", NULL)),
347 MPP_MODE(36,
348 MPP_FUNCTION(0, "gpio", NULL),
349 MPP_FUNCTION(1, "synce2", "clk"),
350 MPP_FUNCTION(2, "i2c1", "sck"),
351 MPP_FUNCTION(3, "ptp", "clk"),
352 MPP_FUNCTION(4, "synce1", "clk"),
353 MPP_FUNCTION(5, "au", "i2sbclk"),
354 MPP_FUNCTION(6, "sata0", "present_act"),
355 MPP_FUNCTION(7, "xg", "mdc"),
356 MPP_FUNCTION(8, "ge", "mdc"),
357 MPP_FUNCTION(9, "pcie2", "clkreq"),
358 MPP_FUNCTION(10, "mss_gpio5", NULL)),
359 MPP_MODE(37,
360 MPP_FUNCTION(0, "gpio", NULL),
361 MPP_FUNCTION(1, "uart2", "rxd"),
362 MPP_FUNCTION(2, "i2c0", "sck"),
363 MPP_FUNCTION(3, "ptp", "pclk_out"),
364 MPP_FUNCTION(4, "tdm", "intn"),
365 MPP_FUNCTION(5, "mss_i2c", "sck"),
366 MPP_FUNCTION(6, "sata1", "present_act"),
367 MPP_FUNCTION(7, "ge", "mdc"),
368 MPP_FUNCTION(8, "xg", "mdc"),
369 MPP_FUNCTION(9, "pcie1", "clkreq"),
370 MPP_FUNCTION(10, "mss_gpio6", NULL),
371 MPP_FUNCTION(11, "link", "rd_out_cp2cp")),
372 MPP_MODE(38,
373 MPP_FUNCTION(0, "gpio", NULL),
374 MPP_FUNCTION(1, "uart2", "txd"),
375 MPP_FUNCTION(2, "i2c0", "sda"),
376 MPP_FUNCTION(3, "ptp", "pulse"),
377 MPP_FUNCTION(4, "tdm", "rstn"),
378 MPP_FUNCTION(5, "mss_i2c", "sda"),
379 MPP_FUNCTION(6, "sata0", "present_act"),
380 MPP_FUNCTION(7, "ge", "mdio"),
381 MPP_FUNCTION(8, "xg", "mdio"),
382 MPP_FUNCTION(9, "au", "i2sextclk"),
383 MPP_FUNCTION(10, "mss_gpio7", NULL),
384 MPP_FUNCTION(11, "ptp", "pulse_cp2cp")),
385 MPP_MODE(39,
386 MPP_FUNCTION(0, "gpio", NULL),
387 MPP_FUNCTION(1, "sdio", "wr_protect"),
388 MPP_FUNCTION(4, "au", "i2sbclk"),
389 MPP_FUNCTION(5, "ptp", "clk"),
390 MPP_FUNCTION(6, "spi0", "csn1"),
391 MPP_FUNCTION(9, "sata1", "present_act"),
392 MPP_FUNCTION(10, "mss_gpio0", NULL)),
393 MPP_MODE(40,
394 MPP_FUNCTION(0, "gpio", NULL),
395 MPP_FUNCTION(1, "sdio", "pwr11"),
396 MPP_FUNCTION(2, "synce1", "clk"),
397 MPP_FUNCTION(3, "mss_i2c", "sda"),
398 MPP_FUNCTION(4, "au", "i2sdo_spdifo"),
399 MPP_FUNCTION(5, "ptp", "pclk_out"),
400 MPP_FUNCTION(6, "spi0", "clk"),
401 MPP_FUNCTION(7, "uart1", "txd"),
402 MPP_FUNCTION(8, "ge", "mdio"),
403 MPP_FUNCTION(9, "sata0", "present_act"),
404 MPP_FUNCTION(10, "mss_gpio1", NULL)),
405 MPP_MODE(41,
406 MPP_FUNCTION(0, "gpio", NULL),
407 MPP_FUNCTION(1, "sdio", "pwr10"),
408 MPP_FUNCTION(2, "sdio", "bus_pwr"),
409 MPP_FUNCTION(3, "mss_i2c", "sck"),
410 MPP_FUNCTION(4, "au", "i2slrclk"),
411 MPP_FUNCTION(5, "ptp", "pulse"),
412 MPP_FUNCTION(6, "spi0", "mosi"),
413 MPP_FUNCTION(7, "uart1", "rxd"),
414 MPP_FUNCTION(8, "ge", "mdc"),
415 MPP_FUNCTION(9, "sata1", "present_act"),
416 MPP_FUNCTION(10, "mss_gpio2", NULL),
417 MPP_FUNCTION(11, "rei", "out_cp2cp")),
418 MPP_MODE(42,
419 MPP_FUNCTION(0, "gpio", NULL),
420 MPP_FUNCTION(1, "sdio", "v18_en"),
421 MPP_FUNCTION(2, "sdio", "wr_protect"),
422 MPP_FUNCTION(3, "synce2", "clk"),
423 MPP_FUNCTION(4, "au", "i2smclk"),
424 MPP_FUNCTION(5, "mss_uart", "txd"),
425 MPP_FUNCTION(6, "spi0", "miso"),
426 MPP_FUNCTION(7, "uart1", "cts"),
427 MPP_FUNCTION(8, "xg", "mdc"),
428 MPP_FUNCTION(9, "sata0", "present_act"),
429 MPP_FUNCTION(10, "mss_gpio4", NULL)),
430 MPP_MODE(43,
431 MPP_FUNCTION(0, "gpio", NULL),
432 MPP_FUNCTION(1, "sdio", "card_detect"),
433 MPP_FUNCTION(3, "synce1", "clk"),
434 MPP_FUNCTION(4, "au", "i2sextclk"),
435 MPP_FUNCTION(5, "mss_uart", "rxd"),
436 MPP_FUNCTION(6, "spi0", "csn0"),
437 MPP_FUNCTION(7, "uart1", "rts"),
438 MPP_FUNCTION(8, "xg", "mdio"),
439 MPP_FUNCTION(9, "sata1", "present_act"),
440 MPP_FUNCTION(10, "mss_gpio5", NULL),
441 MPP_FUNCTION(11, "wakeup", "out_cp2cp")),
442 MPP_MODE(44,
443 MPP_FUNCTION(0, "gpio", NULL),
444 MPP_FUNCTION(1, "ge1", "txd2"),
445 MPP_FUNCTION(7, "uart0", "rts"),
446 MPP_FUNCTION(11, "ptp", "clk_cp2cp")),
447 MPP_MODE(45,
448 MPP_FUNCTION(0, "gpio", NULL),
449 MPP_FUNCTION(1, "ge1", "txd3"),
450 MPP_FUNCTION(7, "uart0", "txd"),
451 MPP_FUNCTION(9, "pcie", "rstoutn")),
452 MPP_MODE(46,
453 MPP_FUNCTION(0, "gpio", NULL),
454 MPP_FUNCTION(1, "ge1", "txd1"),
455 MPP_FUNCTION(7, "uart1", "rts")),
456 MPP_MODE(47,
457 MPP_FUNCTION(0, "gpio", NULL),
458 MPP_FUNCTION(1, "ge1", "txd0"),
459 MPP_FUNCTION(5, "spi1", "clk"),
460 MPP_FUNCTION(7, "uart1", "txd"),
461 MPP_FUNCTION(8, "ge", "mdc")),
462 MPP_MODE(48,
463 MPP_FUNCTION(0, "gpio", NULL),
464 MPP_FUNCTION(1, "ge1", "txctl_txen"),
465 MPP_FUNCTION(5, "spi1", "mosi"),
466 MPP_FUNCTION(8, "xg", "mdc"),
467 MPP_FUNCTION(11, "wakeup", "in_cp2cp")),
468 MPP_MODE(49,
469 MPP_FUNCTION(0, "gpio", NULL),
470 MPP_FUNCTION(1, "ge1", "txclkout"),
471 MPP_FUNCTION(2, "mii", "crs"),
472 MPP_FUNCTION(5, "spi1", "miso"),
473 MPP_FUNCTION(7, "uart1", "rxd"),
474 MPP_FUNCTION(8, "ge", "mdio"),
475 MPP_FUNCTION(9, "pcie0", "clkreq"),
476 MPP_FUNCTION(10, "sdio", "v18_en"),
477 MPP_FUNCTION(11, "sei", "out_cp2cp")),
478 MPP_MODE(50,
479 MPP_FUNCTION(0, "gpio", NULL),
480 MPP_FUNCTION(1, "ge1", "rxclk"),
481 MPP_FUNCTION(2, "mss_i2c", "sda"),
482 MPP_FUNCTION(5, "spi1", "csn0"),
483 MPP_FUNCTION(6, "uart2", "txd"),
484 MPP_FUNCTION(7, "uart0", "rxd"),
485 MPP_FUNCTION(8, "xg", "mdio"),
486 MPP_FUNCTION(10, "sdio", "pwr11")),
487 MPP_MODE(51,
488 MPP_FUNCTION(0, "gpio", NULL),
489 MPP_FUNCTION(1, "ge1", "rxd0"),
490 MPP_FUNCTION(2, "mss_i2c", "sck"),
491 MPP_FUNCTION(5, "spi1", "csn1"),
492 MPP_FUNCTION(6, "uart2", "rxd"),
493 MPP_FUNCTION(7, "uart0", "cts"),
494 MPP_FUNCTION(10, "sdio", "pwr10")),
495 MPP_MODE(52,
496 MPP_FUNCTION(0, "gpio", NULL),
497 MPP_FUNCTION(1, "ge1", "rxd1"),
498 MPP_FUNCTION(2, "synce1", "clk"),
499 MPP_FUNCTION(4, "synce2", "clk"),
500 MPP_FUNCTION(5, "spi1", "csn2"),
501 MPP_FUNCTION(7, "uart1", "cts"),
502 MPP_FUNCTION(8, "led", "clk"),
503 MPP_FUNCTION(9, "pcie", "rstoutn"),
504 MPP_FUNCTION(10, "pcie0", "clkreq")),
505 MPP_MODE(53,
506 MPP_FUNCTION(0, "gpio", NULL),
507 MPP_FUNCTION(1, "ge1", "rxd2"),
508 MPP_FUNCTION(3, "ptp", "clk"),
509 MPP_FUNCTION(5, "spi1", "csn3"),
510 MPP_FUNCTION(7, "uart1", "rxd"),
511 MPP_FUNCTION(8, "led", "stb"),
512 MPP_FUNCTION(11, "sdio", "led")),
513 MPP_MODE(54,
514 MPP_FUNCTION(0, "gpio", NULL),
515 MPP_FUNCTION(1, "ge1", "rxd3"),
516 MPP_FUNCTION(2, "synce2", "clk"),
517 MPP_FUNCTION(3, "ptp", "pclk_out"),
518 MPP_FUNCTION(4, "synce1", "clk"),
519 MPP_FUNCTION(8, "led", "data"),
520 MPP_FUNCTION(10, "sdio", "hw_rst"),
521 MPP_FUNCTION(11, "sdio", "wr_protect")),
522 MPP_MODE(55,
523 MPP_FUNCTION(0, "gpio", NULL),
524 MPP_FUNCTION(1, "ge1", "rxctl_rxdv"),
525 MPP_FUNCTION(3, "ptp", "pulse"),
526 MPP_FUNCTION(10, "sdio", "led"),
527 MPP_FUNCTION(11, "sdio", "card_detect")),
528 MPP_MODE(56,
529 MPP_FUNCTION(0, "gpio", NULL),
530 MPP_FUNCTION(4, "tdm", "drx"),
531 MPP_FUNCTION(5, "au", "i2sdo_spdifo"),
532 MPP_FUNCTION(6, "spi0", "clk"),
533 MPP_FUNCTION(7, "uart1", "rxd"),
534 MPP_FUNCTION(9, "sata1", "present_act"),
535 MPP_FUNCTION(14, "sdio", "clk")),
536 MPP_MODE(57,
537 MPP_FUNCTION(0, "gpio", NULL),
538 MPP_FUNCTION(2, "mss_i2c", "sda"),
539 MPP_FUNCTION(3, "ptp", "pclk_out"),
540 MPP_FUNCTION(4, "tdm", "intn"),
541 MPP_FUNCTION(5, "au", "i2sbclk"),
542 MPP_FUNCTION(6, "spi0", "mosi"),
543 MPP_FUNCTION(7, "uart1", "txd"),
544 MPP_FUNCTION(9, "sata0", "present_act"),
545 MPP_FUNCTION(14, "sdio", "cmd")),
546 MPP_MODE(58,
547 MPP_FUNCTION(0, "gpio", NULL),
548 MPP_FUNCTION(2, "mss_i2c", "sck"),
549 MPP_FUNCTION(3, "ptp", "clk"),
550 MPP_FUNCTION(4, "tdm", "rstn"),
551 MPP_FUNCTION(5, "au", "i2sdi"),
552 MPP_FUNCTION(6, "spi0", "miso"),
553 MPP_FUNCTION(7, "uart1", "cts"),
554 MPP_FUNCTION(8, "led", "clk"),
555 MPP_FUNCTION(14, "sdio", "d0")),
556 MPP_MODE(59,
557 MPP_FUNCTION(0, "gpio", NULL),
558 MPP_FUNCTION(1, "mss_gpio7", NULL),
559 MPP_FUNCTION(2, "synce2", "clk"),
560 MPP_FUNCTION(4, "tdm", "fsync"),
561 MPP_FUNCTION(5, "au", "i2slrclk"),
562 MPP_FUNCTION(6, "spi0", "csn0"),
563 MPP_FUNCTION(7, "uart0", "cts"),
564 MPP_FUNCTION(8, "led", "stb"),
565 MPP_FUNCTION(9, "uart1", "txd"),
566 MPP_FUNCTION(14, "sdio", "d1")),
567 MPP_MODE(60,
568 MPP_FUNCTION(0, "gpio", NULL),
569 MPP_FUNCTION(1, "mss_gpio6", NULL),
570 MPP_FUNCTION(3, "ptp", "pulse"),
571 MPP_FUNCTION(4, "tdm", "dtx"),
572 MPP_FUNCTION(5, "au", "i2smclk"),
573 MPP_FUNCTION(6, "spi0", "csn1"),
574 MPP_FUNCTION(7, "uart0", "rts"),
575 MPP_FUNCTION(8, "led", "data"),
576 MPP_FUNCTION(9, "uart1", "rxd"),
577 MPP_FUNCTION(14, "sdio", "d2")),
578 MPP_MODE(61,
579 MPP_FUNCTION(0, "gpio", NULL),
580 MPP_FUNCTION(1, "mss_gpio5", NULL),
581 MPP_FUNCTION(3, "ptp", "clk"),
582 MPP_FUNCTION(4, "tdm", "pclk"),
583 MPP_FUNCTION(5, "au", "i2sextclk"),
584 MPP_FUNCTION(6, "spi0", "csn2"),
585 MPP_FUNCTION(7, "uart0", "txd"),
586 MPP_FUNCTION(8, "uart2", "txd"),
587 MPP_FUNCTION(9, "sata1", "present_act"),
588 MPP_FUNCTION(10, "ge", "mdio"),
589 MPP_FUNCTION(14, "sdio", "d3")),
590 MPP_MODE(62,
591 MPP_FUNCTION(0, "gpio", NULL),
592 MPP_FUNCTION(1, "mss_gpio4", NULL),
593 MPP_FUNCTION(2, "synce1", "clk"),
594 MPP_FUNCTION(3, "ptp", "pclk_out"),
595 MPP_FUNCTION(5, "sata1", "present_act"),
596 MPP_FUNCTION(6, "spi0", "csn3"),
597 MPP_FUNCTION(7, "uart0", "rxd"),
598 MPP_FUNCTION(8, "uart2", "rxd"),
599 MPP_FUNCTION(9, "sata0", "present_act"),
600 MPP_FUNCTION(10, "ge", "mdc")),
601};
602
603static const struct of_device_id armada_cp110_pinctrl_of_match[] = {
604 {
605 .compatible = "marvell,armada-7k-pinctrl",
606 .data = (void *) V_ARMADA_7K,
607 },
608 {
609 .compatible = "marvell,armada-8k-cpm-pinctrl",
610 .data = (void *) V_ARMADA_8K_CPM,
611 },
612 {
613 .compatible = "marvell,armada-8k-cps-pinctrl",
614 .data = (void *) V_ARMADA_8K_CPS,
615 },
616 { },
617};
618
619static const struct mvebu_mpp_ctrl armada_cp110_mpp_controls[] = {
620 MPP_FUNC_CTRL(0, 62, NULL, mvebu_regmap_mpp_ctrl),
621};
622
623static void mvebu_pinctrl_assign_variant(struct mvebu_mpp_mode *m,
624 u8 variant)
625{
626 struct mvebu_mpp_ctrl_setting *s;
627
628 for (s = m->settings ; s->name ; s++)
629 s->variant = variant;
630}
631
632static int armada_cp110_pinctrl_probe(struct platform_device *pdev)
633{
634 struct mvebu_pinctrl_soc_info *soc;
635 const struct of_device_id *match =
636 of_match_device(armada_cp110_pinctrl_of_match, &pdev->dev);
637 int i;
638
639 if (!pdev->dev.parent)
640 return -ENODEV;
641
642 soc = devm_kzalloc(&pdev->dev,
643 sizeof(struct mvebu_pinctrl_soc_info), GFP_KERNEL);
644 if (!soc)
645 return -ENOMEM;
646
647 soc->variant = (unsigned long) match->data & 0xff;
648 soc->controls = armada_cp110_mpp_controls;
649 soc->ncontrols = ARRAY_SIZE(armada_cp110_mpp_controls);
650 soc->modes = armada_cp110_mpp_modes;
651 soc->nmodes = ARRAY_SIZE(armada_cp110_mpp_modes);
652 for (i = 0; i < ARRAY_SIZE(armada_cp110_mpp_modes); i++) {
653 struct mvebu_mpp_mode *m = &armada_cp110_mpp_modes[i];
654
655 switch (i) {
656 case 0 ... 31:
657 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPS);
658 break;
659 case 32 ... 38:
660 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM);
661 break;
662 case 39 ... 43:
663 mvebu_pinctrl_assign_variant(m, V_ARMADA_8K_CPM);
664 break;
665 case 44 ... 62:
666 mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM);
667 break;
668 }
669 }
670 pdev->dev.platform_data = soc;
671
672 return mvebu_pinctrl_simple_regmap_probe(pdev, pdev->dev.parent, 0);
673}
674
675static struct platform_driver armada_cp110_pinctrl_driver = {
676 .driver = {
677 .name = "armada-cp110-pinctrl",
678 .of_match_table = of_match_ptr(armada_cp110_pinctrl_of_match),
679 },
680 .probe = armada_cp110_pinctrl_probe,
681};
682
683builtin_platform_driver(armada_cp110_pinctrl_driver);