[mirror_ubuntu-hirsute-kernel.git] / drivers / pinctrl / pinctrl-digicolor.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  Driver for Conexant Digicolor General Purpose Pin Mapping
 *
 * Author: Baruch Siach <baruch@tkos.co.il>
 *
 * Copyright (C) 2015 Paradox Innovation Ltd.
 *
 * TODO:
 * - GPIO interrupt support
 * - Pin pad configuration (pull up/down, strength)
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/io.h>
#include <linux/gpio/driver.h>
#include <linux/spinlock.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include "pinctrl-utils.h"

#define DRIVER_NAME	"pinctrl-digicolor"

#define GP_CLIENTSEL(clct)	((clct)*8 + 0x20)
#define GP_DRIVE0(clct)		(GP_CLIENTSEL(clct) + 2)
#define GP_OUTPUT0(clct)	(GP_CLIENTSEL(clct) + 3)
#define GP_INPUT(clct)		(GP_CLIENTSEL(clct) + 6)

#define PIN_COLLECTIONS		('R' - 'A' + 1)
#define PINS_PER_COLLECTION	8
#define PINS_COUNT		(PIN_COLLECTIONS * PINS_PER_COLLECTION)

struct dc_pinmap {
	void __iomem		*regs;
	struct device		*dev;
	struct pinctrl_dev	*pctl;

	struct pinctrl_desc	*desc;
	const char		*pin_names[PINS_COUNT];

	struct gpio_chip	chip;
	spinlock_t		lock;
};

static int dc_get_groups_count(struct pinctrl_dev *pctldev)
{
	return PINS_COUNT;
}

static const char *dc_get_group_name(struct pinctrl_dev *pctldev,
				     unsigned selector)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	/* Exactly one group per pin */
	return pmap->desc->pins[selector].name;
}

static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
			     const unsigned **pins,
			     unsigned *num_pins)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	*pins = &pmap->desc->pins[selector].number;
	*num_pins = 1;

	return 0;
}

static const struct pinctrl_ops dc_pinctrl_ops = {
	.get_groups_count	= dc_get_groups_count,
	.get_group_name		= dc_get_group_name,
	.get_group_pins		= dc_get_group_pins,
	.dt_node_to_map		= pinconf_generic_dt_node_to_map_pin,
	.dt_free_map		= pinctrl_utils_free_map,
};

static const char *const dc_functions[] = {
	"gpio",
	"client_a",
	"client_b",
	"client_c",
};

static int dc_get_functions_count(struct pinctrl_dev *pctldev)
{
	return ARRAY_SIZE(dc_functions);
}

static const char *dc_get_fname(struct pinctrl_dev *pctldev, unsigned selector)
{
	return dc_functions[selector];
}

static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
			 const char * const **groups,
			 unsigned * const num_groups)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);

	*groups = pmap->pin_names;
	*num_groups = PINS_COUNT;

	return 0;
}

static void dc_client_sel(int pin_num, int *reg, int *bit)
{
	*bit = (pin_num % PINS_PER_COLLECTION) * 2;
	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);

	if (*bit >= PINS_PER_COLLECTION) {
		*bit -= PINS_PER_COLLECTION;
		*reg += 1;
	}
}

static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
		      unsigned group)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	int bit_off, reg_off;
	u8 reg;

	dc_client_sel(group, &reg_off, &bit_off);

	reg = readb_relaxed(pmap->regs + reg_off);
	reg &= ~(3 << bit_off);
	reg |= (selector << bit_off);
	writeb_relaxed(reg, pmap->regs + reg_off);

	return 0;
}

static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
			       struct pinctrl_gpio_range *range,
			       unsigned offset)
{
	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
	int bit_off, reg_off;
	u8 reg;

	dc_client_sel(offset, &reg_off, &bit_off);

	reg = readb_relaxed(pmap->regs + reg_off);
	if ((reg & (3 << bit_off)) != 0)
		return -EBUSY;

	return 0;
}

static const struct pinmux_ops dc_pmxops = {
	.get_functions_count	= dc_get_functions_count,
	.get_function_name	= dc_get_fname,
	.get_function_groups	= dc_get_groups,
	.set_mux		= dc_set_mux,
	.gpio_request_enable	= dc_pmx_request_gpio,
};

static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
	struct dc_pinmap *pmap = gpiochip_get_data(chip);
	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 drive;
	unsigned long flags;

	spin_lock_irqsave(&pmap->lock, flags);
	drive = readb_relaxed(pmap->regs + reg_off);
	drive &= ~BIT(bit_off);
	writeb_relaxed(drive, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);

	return 0;
}

static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);

static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
				    int value)
{
	struct dc_pinmap *pmap = gpiochip_get_data(chip);
	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 drive;
	unsigned long flags;

	dc_gpio_set(chip, gpio, value);

	spin_lock_irqsave(&pmap->lock, flags);
	drive = readb_relaxed(pmap->regs + reg_off);
	drive |= BIT(bit_off);
	writeb_relaxed(drive, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);

	return 0;
}

static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
{
	struct dc_pinmap *pmap = gpiochip_get_data(chip);
	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 input;

	input = readb_relaxed(pmap->regs + reg_off);

	return !!(input & BIT(bit_off));
}

static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
{
	struct dc_pinmap *pmap = gpiochip_get_data(chip);
	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
	int bit_off = gpio % PINS_PER_COLLECTION;
	u8 output;
	unsigned long flags;

	spin_lock_irqsave(&pmap->lock, flags);
	output = readb_relaxed(pmap->regs + reg_off);
	if (value)
		output |= BIT(bit_off);
	else
		output &= ~BIT(bit_off);
	writeb_relaxed(output, pmap->regs + reg_off);
	spin_unlock_irqrestore(&pmap->lock, flags);
}

static int dc_gpiochip_add(struct dc_pinmap *pmap, struct device_node *np)
{
	struct gpio_chip *chip = &pmap->chip;
	int ret;

	chip->label		= DRIVER_NAME;
	chip->parent		= pmap->dev;
	chip->request		= gpiochip_generic_request;
	chip->free		= gpiochip_generic_free;
	chip->direction_input	= dc_gpio_direction_input;
	chip->direction_output	= dc_gpio_direction_output;
	chip->get		= dc_gpio_get;
	chip->set		= dc_gpio_set;
	chip->base		= -1;
	chip->ngpio		= PINS_COUNT;
	chip->of_node		= np;
	chip->of_gpio_n_cells	= 2;

	spin_lock_init(&pmap->lock);

	ret = gpiochip_add_data(chip, pmap);
	if (ret < 0)
		return ret;

	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
				     PINS_COUNT);
	if (ret < 0) {
		gpiochip_remove(chip);
		return ret;
	}

	return 0;
}

static int dc_pinctrl_probe(struct platform_device *pdev)
{
	struct dc_pinmap *pmap;
	struct pinctrl_pin_desc *pins;
	struct pinctrl_desc *pctl_desc;
	char *pin_names;
	int name_len = strlen("GP_xx") + 1;
	int i, j;

	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
	if (!pmap)
		return -ENOMEM;

	pmap->regs = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(pmap->regs))
		return PTR_ERR(pmap->regs);

	pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
			    GFP_KERNEL);
	if (!pins)
		return -ENOMEM;
	pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
				 GFP_KERNEL);
	if (!pin_names)
		return -ENOMEM;

	for (i = 0; i < PIN_COLLECTIONS; i++) {
		for (j = 0; j < PINS_PER_COLLECTION; j++) {
			int pin_id = i*PINS_PER_COLLECTION + j;
			char *name = &pin_names[pin_id * name_len];

			snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);

			pins[pin_id].number = pin_id;
			pins[pin_id].name = name;
			pmap->pin_names[pin_id] = name;
		}
	}

	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
	if (!pctl_desc)
		return -ENOMEM;

	pctl_desc->name	= DRIVER_NAME,
	pctl_desc->owner = THIS_MODULE,
	pctl_desc->pctlops = &dc_pinctrl_ops,
	pctl_desc->pmxops = &dc_pmxops,
	pctl_desc->npins = PINS_COUNT;
	pctl_desc->pins = pins;
	pmap->desc = pctl_desc;

	pmap->dev = &pdev->dev;

	pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
	if (IS_ERR(pmap->pctl)) {
		dev_err(&pdev->dev, "pinctrl driver registration failed\n");
		return PTR_ERR(pmap->pctl);
	}

	return dc_gpiochip_add(pmap, pdev->dev.of_node);
}

static const struct of_device_id dc_pinctrl_ids[] = {
	{ .compatible = "cnxt,cx92755-pinctrl" },
	{ /* sentinel */ }
};

static struct platform_driver dc_pinctrl_driver = {
	.driver = {
		.name = DRIVER_NAME,
		.of_match_table = dc_pinctrl_ids,
		.suppress_bind_attrs = true,
	},
	.probe = dc_pinctrl_probe,
};
builtin_platform_driver(dc_pinctrl_driver);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
38b0e507 BS	2	/*
	3	* Driver for Conexant Digicolor General Purpose Pin Mapping
	4	*
	5	* Author: Baruch Siach <baruch@tkos.co.il>
	6	*
	7	* Copyright (C) 2015 Paradox Innovation Ltd.
	8	*
38b0e507 BS	9	* TODO:
	10	* - GPIO interrupt support
	11	* - Pin pad configuration (pull up/down, strength)
	12	*/
	13
546c6d79	14	#include <linux/init.h>
38b0e507 BS	15	#include <linux/platform_device.h>
	16	#include <linux/of.h>
	17	#include <linux/of_device.h>
	18	#include <linux/io.h>
38b0e507 BS	19	#include <linux/gpio/driver.h>
	20	#include <linux/spinlock.h>
	21	#include <linux/pinctrl/machine.h>
	22	#include <linux/pinctrl/pinconf.h>
	23	#include <linux/pinctrl/pinconf-generic.h>
	24	#include <linux/pinctrl/pinctrl.h>
	25	#include <linux/pinctrl/pinmux.h>
	26	#include "pinctrl-utils.h"
	27
	28	#define DRIVER_NAME "pinctrl-digicolor"
	29
	30	#define GP_CLIENTSEL(clct) ((clct)*8 + 0x20)
	31	#define GP_DRIVE0(clct) (GP_CLIENTSEL(clct) + 2)
	32	#define GP_OUTPUT0(clct) (GP_CLIENTSEL(clct) + 3)
	33	#define GP_INPUT(clct) (GP_CLIENTSEL(clct) + 6)
	34
	35	#define PIN_COLLECTIONS ('R' - 'A' + 1)
	36	#define PINS_PER_COLLECTION 8
	37	#define PINS_COUNT (PIN_COLLECTIONS * PINS_PER_COLLECTION)
	38
	39	struct dc_pinmap {
	40	void __iomem *regs;
	41	struct device *dev;
	42	struct pinctrl_dev *pctl;
	43
	44	struct pinctrl_desc *desc;
	45	const char *pin_names[PINS_COUNT];
	46
	47	struct gpio_chip chip;
	48	spinlock_t lock;
	49	};
	50
	51	static int dc_get_groups_count(struct pinctrl_dev *pctldev)
	52	{
	53	return PINS_COUNT;
	54	}
	55
	56	static const char dc_get_group_name(struct pinctrl_dev pctldev,
	57	unsigned selector)
	58	{
	59	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	60
	61	/* Exactly one group per pin */
	62	return pmap->desc->pins[selector].name;
	63	}
	64
	65	static int dc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
	66	const unsigned **pins,
	67	unsigned *num_pins)
	68	{
	69	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	70
	71	*pins = &pmap->desc->pins[selector].number;
	72	*num_pins = 1;
	73
	74	return 0;
	75	}
	76
db74f96d	77	static const struct pinctrl_ops dc_pinctrl_ops = {
38b0e507 BS	78	.get_groups_count = dc_get_groups_count,
	79	.get_group_name = dc_get_group_name,
	80	.get_group_pins = dc_get_group_pins,
	81	.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
d32f7fd3	82	.dt_free_map = pinctrl_utils_free_map,
38b0e507 BS	83	};
	84
	85	static const char *const dc_functions[] = {
	86	"gpio",
	87	"client_a",
	88	"client_b",
	89	"client_c",
	90	};
	91
	92	static int dc_get_functions_count(struct pinctrl_dev *pctldev)
	93	{
	94	return ARRAY_SIZE(dc_functions);
	95	}
	96
	97	static const char dc_get_fname(struct pinctrl_dev pctldev, unsigned selector)
	98	{
	99	return dc_functions[selector];
	100	}
	101
	102	static int dc_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
	103	const char * const **groups,
	104	unsigned * const num_groups)
	105	{
	106	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	107
	108	*groups = pmap->pin_names;
	109	*num_groups = PINS_COUNT;
	110
	111	return 0;
	112	}
	113
	114	static void dc_client_sel(int pin_num, int reg, int bit)
	115	{
	116	bit = (pin_num % PINS_PER_COLLECTION) 2;
	117	*reg = GP_CLIENTSEL(pin_num/PINS_PER_COLLECTION);
	118
	119	if (*bit >= PINS_PER_COLLECTION) {
	120	*bit -= PINS_PER_COLLECTION;
	121	*reg += 1;
	122	}
	123	}
	124
	125	static int dc_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
	126	unsigned group)
	127	{
	128	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pctldev);
	129	int bit_off, reg_off;
	130	u8 reg;
	131
	132	dc_client_sel(group, &reg_off, &bit_off);
	133
	134	reg = readb_relaxed(pmap->regs + reg_off);
	135	reg &= ~(3 << bit_off);
	136	reg \|= (selector << bit_off);
	137	writeb_relaxed(reg, pmap->regs + reg_off);
	138
	139	return 0;
	140	}
	141
	142	static int dc_pmx_request_gpio(struct pinctrl_dev *pcdev,
	143	struct pinctrl_gpio_range *range,
	144	unsigned offset)
	145	{
	146	struct dc_pinmap *pmap = pinctrl_dev_get_drvdata(pcdev);
147	int bit_off, reg_off;
148	u8 reg;
149
150	dc_client_sel(offset, &reg_off, &bit_off);
151
152	reg = readb_relaxed(pmap->regs + reg_off);
153	if ((reg & (3 << bit_off)) != 0)
154	return -EBUSY;
155
156	return 0;
157	}
158
db74f96d	159	static const struct pinmux_ops dc_pmxops = {
38b0e507 BS	160	.get_functions_count = dc_get_functions_count,
	161	.get_function_name = dc_get_fname,
	162	.get_function_groups = dc_get_groups,
	163	.set_mux = dc_set_mux,
	164	.gpio_request_enable = dc_pmx_request_gpio,
	165	};
	166
38b0e507 BS	167	static int dc_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
38b0e507 BS	168	{
57371833	169	struct dc_pinmap *pmap = gpiochip_get_data(chip);
38b0e507 BS	170	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	171	int bit_off = gpio % PINS_PER_COLLECTION;
	172	u8 drive;
	173	unsigned long flags;
	174
	175	spin_lock_irqsave(&pmap->lock, flags);
	176	drive = readb_relaxed(pmap->regs + reg_off);
	177	drive &= ~BIT(bit_off);
	178	writeb_relaxed(drive, pmap->regs + reg_off);
	179	spin_unlock_irqrestore(&pmap->lock, flags);
	180
	181	return 0;
	182	}
	183
	184	static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value);
	185
	186	static int dc_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
	187	int value)
	188	{
57371833	189	struct dc_pinmap *pmap = gpiochip_get_data(chip);
38b0e507 BS	190	int reg_off = GP_DRIVE0(gpio/PINS_PER_COLLECTION);
	191	int bit_off = gpio % PINS_PER_COLLECTION;
	192	u8 drive;
	193	unsigned long flags;
	194
	195	dc_gpio_set(chip, gpio, value);
	196
	197	spin_lock_irqsave(&pmap->lock, flags);
	198	drive = readb_relaxed(pmap->regs + reg_off);
	199	drive \|= BIT(bit_off);
	200	writeb_relaxed(drive, pmap->regs + reg_off);
	201	spin_unlock_irqrestore(&pmap->lock, flags);
	202
	203	return 0;
	204	}
	205
	206	static int dc_gpio_get(struct gpio_chip *chip, unsigned gpio)
	207	{
57371833	208	struct dc_pinmap *pmap = gpiochip_get_data(chip);
38b0e507 BS	209	int reg_off = GP_INPUT(gpio/PINS_PER_COLLECTION);
	210	int bit_off = gpio % PINS_PER_COLLECTION;
	211	u8 input;
	212
	213	input = readb_relaxed(pmap->regs + reg_off);
	214
	215	return !!(input & BIT(bit_off));
	216	}
	217
	218	static void dc_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
	219	{
57371833	220	struct dc_pinmap *pmap = gpiochip_get_data(chip);
38b0e507 BS	221	int reg_off = GP_OUTPUT0(gpio/PINS_PER_COLLECTION);
	222	int bit_off = gpio % PINS_PER_COLLECTION;
	223	u8 output;
	224	unsigned long flags;
	225
	226	spin_lock_irqsave(&pmap->lock, flags);
	227	output = readb_relaxed(pmap->regs + reg_off);
	228	if (value)
	229	output \|= BIT(bit_off);
	230	else
	231	output &= ~BIT(bit_off);
	232	writeb_relaxed(output, pmap->regs + reg_off);
	233	spin_unlock_irqrestore(&pmap->lock, flags);
	234	}
	235
	236	static int dc_gpiochip_add(struct dc_pinmap pmap, struct device_node np)
	237	{
	238	struct gpio_chip *chip = &pmap->chip;
	239	int ret;
	240
	241	chip->label = DRIVER_NAME;
58383c78	242	chip->parent = pmap->dev;
98c85d58 JG	243	chip->request = gpiochip_generic_request;
98c85d58 JG	244	chip->free = gpiochip_generic_free;
38b0e507 BS	245	chip->direction_input = dc_gpio_direction_input;
	246	chip->direction_output = dc_gpio_direction_output;
	247	chip->get = dc_gpio_get;
	248	chip->set = dc_gpio_set;
	249	chip->base = -1;
	250	chip->ngpio = PINS_COUNT;
	251	chip->of_node = np;
	252	chip->of_gpio_n_cells = 2;
	253
	254	spin_lock_init(&pmap->lock);
	255
57371833	256	ret = gpiochip_add_data(chip, pmap);
38b0e507 BS	257	if (ret < 0)
	258	return ret;
	259
	260	ret = gpiochip_add_pin_range(chip, dev_name(pmap->dev), 0, 0,
	261	PINS_COUNT);
	262	if (ret < 0) {
	263	gpiochip_remove(chip);
	264	return ret;
	265	}
	266
	267	return 0;
	268	}
	269
	270	static int dc_pinctrl_probe(struct platform_device *pdev)
	271	{
	272	struct dc_pinmap *pmap;
38b0e507 BS	273	struct pinctrl_pin_desc *pins;
	274	struct pinctrl_desc *pctl_desc;
	275	char *pin_names;
	276	int name_len = strlen("GP_xx") + 1;
8f91ed47	277	int i, j;
38b0e507 BS	278
	279	pmap = devm_kzalloc(&pdev->dev, sizeof(*pmap), GFP_KERNEL);
	280	if (!pmap)
	281	return -ENOMEM;
	282
4b024225	283	pmap->regs = devm_platform_ioremap_resource(pdev, 0);
38b0e507 BS	284	if (IS_ERR(pmap->regs))
	285	return PTR_ERR(pmap->regs);
	286
a86854d0 KC	287	pins = devm_kcalloc(&pdev->dev, PINS_COUNT, sizeof(*pins),
a86854d0 KC	288	GFP_KERNEL);
38b0e507 BS	289	if (!pins)
38b0e507 BS	290	return -ENOMEM;
a86854d0	291	pin_names = devm_kcalloc(&pdev->dev, PINS_COUNT, name_len,
38b0e507 BS	292	GFP_KERNEL);
	293	if (!pin_names)
	294	return -ENOMEM;
	295
	296	for (i = 0; i < PIN_COLLECTIONS; i++) {
	297	for (j = 0; j < PINS_PER_COLLECTION; j++) {
	298	int pin_id = i*PINS_PER_COLLECTION + j;
	299	char name = &pin_names[pin_id name_len];
	300
	301	snprintf(name, name_len, "GP_%c%c", 'A'+i, '0'+j);
	302
	303	pins[pin_id].number = pin_id;
	304	pins[pin_id].name = name;
	305	pmap->pin_names[pin_id] = name;
	306	}
	307	}
	308
	309	pctl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctl_desc), GFP_KERNEL);
	310	if (!pctl_desc)
	311	return -ENOMEM;
	312
	313	pctl_desc->name = DRIVER_NAME,
	314	pctl_desc->owner = THIS_MODULE,
	315	pctl_desc->pctlops = &dc_pinctrl_ops,
	316	pctl_desc->pmxops = &dc_pmxops,
	317	pctl_desc->npins = PINS_COUNT;
	318	pctl_desc->pins = pins;
	319	pmap->desc = pctl_desc;
	320
	321	pmap->dev = &pdev->dev;
	322
8f91ed47	323	pmap->pctl = devm_pinctrl_register(&pdev->dev, pctl_desc, pmap);
5a99233e	324	if (IS_ERR(pmap->pctl)) {
38b0e507	325	dev_err(&pdev->dev, "pinctrl driver registration failed\n");
5a99233e	326	return PTR_ERR(pmap->pctl);
38b0e507 BS	327	}
38b0e507 BS	328
8f91ed47	329	return dc_gpiochip_add(pmap, pdev->dev.of_node);
38b0e507 BS	330	}
38b0e507 BS	331
38b0e507 BS	332	static const struct of_device_id dc_pinctrl_ids[] = {
	333	{ .compatible = "cnxt,cx92755-pinctrl" },
	334	{ /* sentinel */ }
	335	};
38b0e507 BS	336
	337	static struct platform_driver dc_pinctrl_driver = {
	338	.driver = {
	339	.name = DRIVER_NAME,
	340	.of_match_table = dc_pinctrl_ids,
546c6d79	341	.suppress_bind_attrs = true,
38b0e507 BS	342	},
38b0e507 BS	343	.probe = dc_pinctrl_probe,
38b0e507	344	};
546c6d79	345	builtin_platform_driver(dc_pinctrl_driver);