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30574f0d TA |
1 | /* |
2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This driver implements the Samsung pinctrl driver. It supports setting up of | |
17 | * pinmux and pinconf configurations. The gpiolib interface is also included. | |
18 | * External interrupt (gpio and wakeup) support are not included in this driver | |
19 | * but provides extensions to which platform specific implementation of the gpio | |
20 | * and wakeup interrupts can be hooked to. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/err.h> | |
28 | #include <linux/gpio.h> | |
a19fe2d4 | 29 | #include <linux/irqdomain.h> |
30574f0d TA |
30 | |
31 | #include "core.h" | |
32 | #include "pinctrl-samsung.h" | |
33 | ||
34 | #define GROUP_SUFFIX "-grp" | |
35 | #define GSUFFIX_LEN sizeof(GROUP_SUFFIX) | |
36 | #define FUNCTION_SUFFIX "-mux" | |
37 | #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX) | |
38 | ||
39 | /* list of all possible config options supported */ | |
d5fd5da2 | 40 | static struct pin_config { |
30574f0d TA |
41 | char *prop_cfg; |
42 | unsigned int cfg_type; | |
43 | } pcfgs[] = { | |
44 | { "samsung,pin-pud", PINCFG_TYPE_PUD }, | |
45 | { "samsung,pin-drv", PINCFG_TYPE_DRV }, | |
46 | { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, | |
47 | { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, | |
48 | }; | |
49 | ||
6fb6f1ba | 50 | static unsigned int pin_base; |
40ba6227 | 51 | |
d3a7b9e3 TF |
52 | static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) |
53 | { | |
54 | return container_of(gc, struct samsung_pin_bank, gpio_chip); | |
55 | } | |
56 | ||
30574f0d TA |
57 | /* check if the selector is a valid pin group selector */ |
58 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) | |
59 | { | |
60 | struct samsung_pinctrl_drv_data *drvdata; | |
61 | ||
62 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
63 | return drvdata->nr_groups; | |
64 | } | |
65 | ||
66 | /* return the name of the group selected by the group selector */ | |
67 | static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, | |
68 | unsigned selector) | |
69 | { | |
70 | struct samsung_pinctrl_drv_data *drvdata; | |
71 | ||
72 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
73 | return drvdata->pin_groups[selector].name; | |
74 | } | |
75 | ||
76 | /* return the pin numbers associated with the specified group */ | |
77 | static int samsung_get_group_pins(struct pinctrl_dev *pctldev, | |
78 | unsigned selector, const unsigned **pins, unsigned *num_pins) | |
79 | { | |
80 | struct samsung_pinctrl_drv_data *drvdata; | |
81 | ||
82 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
83 | *pins = drvdata->pin_groups[selector].pins; | |
84 | *num_pins = drvdata->pin_groups[selector].num_pins; | |
85 | return 0; | |
86 | } | |
87 | ||
88 | /* create pinctrl_map entries by parsing device tree nodes */ | |
89 | static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, | |
90 | struct device_node *np, struct pinctrl_map **maps, | |
91 | unsigned *nmaps) | |
92 | { | |
93 | struct device *dev = pctldev->dev; | |
94 | struct pinctrl_map *map; | |
95 | unsigned long *cfg = NULL; | |
96 | char *gname, *fname; | |
97 | int cfg_cnt = 0, map_cnt = 0, idx = 0; | |
98 | ||
99 | /* count the number of config options specfied in the node */ | |
100 | for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++) { | |
101 | if (of_find_property(np, pcfgs[idx].prop_cfg, NULL)) | |
102 | cfg_cnt++; | |
103 | } | |
104 | ||
105 | /* | |
106 | * Find out the number of map entries to create. All the config options | |
107 | * can be accomadated into a single config map entry. | |
108 | */ | |
109 | if (cfg_cnt) | |
110 | map_cnt = 1; | |
111 | if (of_find_property(np, "samsung,pin-function", NULL)) | |
112 | map_cnt++; | |
113 | if (!map_cnt) { | |
114 | dev_err(dev, "node %s does not have either config or function " | |
115 | "configurations\n", np->name); | |
116 | return -EINVAL; | |
117 | } | |
118 | ||
119 | /* Allocate memory for pin-map entries */ | |
120 | map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL); | |
121 | if (!map) { | |
122 | dev_err(dev, "could not alloc memory for pin-maps\n"); | |
123 | return -ENOMEM; | |
124 | } | |
125 | *nmaps = 0; | |
126 | ||
127 | /* | |
128 | * Allocate memory for pin group name. The pin group name is derived | |
129 | * from the node name from which these map entries are be created. | |
130 | */ | |
131 | gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL); | |
132 | if (!gname) { | |
133 | dev_err(dev, "failed to alloc memory for group name\n"); | |
134 | goto free_map; | |
135 | } | |
136 | sprintf(gname, "%s%s", np->name, GROUP_SUFFIX); | |
137 | ||
138 | /* | |
139 | * don't have config options? then skip over to creating function | |
140 | * map entries. | |
141 | */ | |
142 | if (!cfg_cnt) | |
143 | goto skip_cfgs; | |
144 | ||
145 | /* Allocate memory for config entries */ | |
146 | cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL); | |
147 | if (!cfg) { | |
148 | dev_err(dev, "failed to alloc memory for configs\n"); | |
149 | goto free_gname; | |
150 | } | |
151 | ||
152 | /* Prepare a list of config settings */ | |
153 | for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) { | |
154 | u32 value; | |
155 | if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value)) | |
156 | cfg[cfg_cnt++] = | |
157 | PINCFG_PACK(pcfgs[idx].cfg_type, value); | |
158 | } | |
159 | ||
160 | /* create the config map entry */ | |
161 | map[*nmaps].data.configs.group_or_pin = gname; | |
162 | map[*nmaps].data.configs.configs = cfg; | |
163 | map[*nmaps].data.configs.num_configs = cfg_cnt; | |
164 | map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP; | |
165 | *nmaps += 1; | |
166 | ||
167 | skip_cfgs: | |
168 | /* create the function map entry */ | |
169 | if (of_find_property(np, "samsung,pin-function", NULL)) { | |
170 | fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL); | |
171 | if (!fname) { | |
172 | dev_err(dev, "failed to alloc memory for func name\n"); | |
173 | goto free_cfg; | |
174 | } | |
175 | sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX); | |
176 | ||
177 | map[*nmaps].data.mux.group = gname; | |
178 | map[*nmaps].data.mux.function = fname; | |
179 | map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP; | |
180 | *nmaps += 1; | |
181 | } | |
182 | ||
183 | *maps = map; | |
184 | return 0; | |
185 | ||
186 | free_cfg: | |
187 | kfree(cfg); | |
188 | free_gname: | |
189 | kfree(gname); | |
190 | free_map: | |
191 | kfree(map); | |
192 | return -ENOMEM; | |
193 | } | |
194 | ||
195 | /* free the memory allocated to hold the pin-map table */ | |
196 | static void samsung_dt_free_map(struct pinctrl_dev *pctldev, | |
197 | struct pinctrl_map *map, unsigned num_maps) | |
198 | { | |
199 | int idx; | |
200 | ||
201 | for (idx = 0; idx < num_maps; idx++) { | |
202 | if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) { | |
203 | kfree(map[idx].data.mux.function); | |
204 | if (!idx) | |
205 | kfree(map[idx].data.mux.group); | |
206 | } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) { | |
207 | kfree(map[idx].data.configs.configs); | |
208 | if (!idx) | |
209 | kfree(map[idx].data.configs.group_or_pin); | |
210 | } | |
211 | }; | |
212 | ||
213 | kfree(map); | |
214 | } | |
215 | ||
216 | /* list of pinctrl callbacks for the pinctrl core */ | |
217 | static struct pinctrl_ops samsung_pctrl_ops = { | |
218 | .get_groups_count = samsung_get_group_count, | |
219 | .get_group_name = samsung_get_group_name, | |
220 | .get_group_pins = samsung_get_group_pins, | |
221 | .dt_node_to_map = samsung_dt_node_to_map, | |
222 | .dt_free_map = samsung_dt_free_map, | |
223 | }; | |
224 | ||
225 | /* check if the selector is a valid pin function selector */ | |
226 | static int samsung_get_functions_count(struct pinctrl_dev *pctldev) | |
227 | { | |
228 | struct samsung_pinctrl_drv_data *drvdata; | |
229 | ||
230 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
231 | return drvdata->nr_functions; | |
232 | } | |
233 | ||
234 | /* return the name of the pin function specified */ | |
235 | static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, | |
236 | unsigned selector) | |
237 | { | |
238 | struct samsung_pinctrl_drv_data *drvdata; | |
239 | ||
240 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
241 | return drvdata->pmx_functions[selector].name; | |
242 | } | |
243 | ||
244 | /* return the groups associated for the specified function selector */ | |
245 | static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, | |
246 | unsigned selector, const char * const **groups, | |
247 | unsigned * const num_groups) | |
248 | { | |
249 | struct samsung_pinctrl_drv_data *drvdata; | |
250 | ||
251 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
252 | *groups = drvdata->pmx_functions[selector].groups; | |
253 | *num_groups = drvdata->pmx_functions[selector].num_groups; | |
254 | return 0; | |
255 | } | |
256 | ||
257 | /* | |
258 | * given a pin number that is local to a pin controller, find out the pin bank | |
259 | * and the register base of the pin bank. | |
260 | */ | |
62f14c0e TF |
261 | static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, |
262 | unsigned pin, void __iomem **reg, u32 *offset, | |
30574f0d TA |
263 | struct samsung_pin_bank **bank) |
264 | { | |
30574f0d TA |
265 | struct samsung_pin_bank *b; |
266 | ||
30574f0d TA |
267 | b = drvdata->ctrl->pin_banks; |
268 | ||
269 | while ((pin >= b->pin_base) && | |
270 | ((b->pin_base + b->nr_pins - 1) < pin)) | |
271 | b++; | |
272 | ||
273 | *reg = drvdata->virt_base + b->pctl_offset; | |
274 | *offset = pin - b->pin_base; | |
275 | if (bank) | |
276 | *bank = b; | |
277 | ||
278 | /* some banks have two config registers in a single bank */ | |
279 | if (*offset * b->func_width > BITS_PER_LONG) | |
280 | *reg += 4; | |
281 | } | |
282 | ||
283 | /* enable or disable a pinmux function */ | |
284 | static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, | |
285 | unsigned group, bool enable) | |
286 | { | |
287 | struct samsung_pinctrl_drv_data *drvdata; | |
288 | const unsigned int *pins; | |
289 | struct samsung_pin_bank *bank; | |
290 | void __iomem *reg; | |
291 | u32 mask, shift, data, pin_offset, cnt; | |
292 | ||
293 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
294 | pins = drvdata->pin_groups[group].pins; | |
295 | ||
296 | /* | |
297 | * for each pin in the pin group selected, program the correspoding pin | |
298 | * pin function number in the config register. | |
299 | */ | |
300 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) { | |
62f14c0e | 301 | pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base, |
30574f0d TA |
302 | ®, &pin_offset, &bank); |
303 | mask = (1 << bank->func_width) - 1; | |
304 | shift = pin_offset * bank->func_width; | |
305 | ||
306 | data = readl(reg); | |
307 | data &= ~(mask << shift); | |
308 | if (enable) | |
309 | data |= drvdata->pin_groups[group].func << shift; | |
310 | writel(data, reg); | |
311 | } | |
312 | } | |
313 | ||
314 | /* enable a specified pinmux by writing to registers */ | |
315 | static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector, | |
316 | unsigned group) | |
317 | { | |
318 | samsung_pinmux_setup(pctldev, selector, group, true); | |
319 | return 0; | |
320 | } | |
321 | ||
322 | /* disable a specified pinmux by writing to registers */ | |
323 | static void samsung_pinmux_disable(struct pinctrl_dev *pctldev, | |
324 | unsigned selector, unsigned group) | |
325 | { | |
326 | samsung_pinmux_setup(pctldev, selector, group, false); | |
327 | } | |
328 | ||
329 | /* | |
330 | * The calls to gpio_direction_output() and gpio_direction_input() | |
331 | * leads to this function call (via the pinctrl_gpio_direction_{input|output}() | |
332 | * function called from the gpiolib interface). | |
333 | */ | |
334 | static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, | |
335 | struct pinctrl_gpio_range *range, unsigned offset, bool input) | |
336 | { | |
337 | struct samsung_pin_bank *bank; | |
62f14c0e | 338 | struct samsung_pinctrl_drv_data *drvdata; |
30574f0d TA |
339 | void __iomem *reg; |
340 | u32 data, pin_offset, mask, shift; | |
341 | ||
d3a7b9e3 | 342 | bank = gc_to_pin_bank(range->gc); |
62f14c0e TF |
343 | drvdata = pinctrl_dev_get_drvdata(pctldev); |
344 | ||
d3a7b9e3 TF |
345 | pin_offset = offset - bank->pin_base; |
346 | reg = drvdata->virt_base + bank->pctl_offset; | |
347 | ||
30574f0d TA |
348 | mask = (1 << bank->func_width) - 1; |
349 | shift = pin_offset * bank->func_width; | |
350 | ||
351 | data = readl(reg); | |
352 | data &= ~(mask << shift); | |
353 | if (!input) | |
354 | data |= FUNC_OUTPUT << shift; | |
355 | writel(data, reg); | |
356 | return 0; | |
357 | } | |
358 | ||
359 | /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ | |
360 | static struct pinmux_ops samsung_pinmux_ops = { | |
361 | .get_functions_count = samsung_get_functions_count, | |
362 | .get_function_name = samsung_pinmux_get_fname, | |
363 | .get_function_groups = samsung_pinmux_get_groups, | |
364 | .enable = samsung_pinmux_enable, | |
365 | .disable = samsung_pinmux_disable, | |
366 | .gpio_set_direction = samsung_pinmux_gpio_set_direction, | |
367 | }; | |
368 | ||
369 | /* set or get the pin config settings for a specified pin */ | |
370 | static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, | |
371 | unsigned long *config, bool set) | |
372 | { | |
373 | struct samsung_pinctrl_drv_data *drvdata; | |
374 | struct samsung_pin_bank *bank; | |
375 | void __iomem *reg_base; | |
376 | enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); | |
377 | u32 data, width, pin_offset, mask, shift; | |
378 | u32 cfg_value, cfg_reg; | |
379 | ||
380 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
62f14c0e | 381 | pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, ®_base, |
30574f0d TA |
382 | &pin_offset, &bank); |
383 | ||
384 | switch (cfg_type) { | |
385 | case PINCFG_TYPE_PUD: | |
386 | width = bank->pud_width; | |
387 | cfg_reg = PUD_REG; | |
388 | break; | |
389 | case PINCFG_TYPE_DRV: | |
390 | width = bank->drv_width; | |
391 | cfg_reg = DRV_REG; | |
392 | break; | |
393 | case PINCFG_TYPE_CON_PDN: | |
394 | width = bank->conpdn_width; | |
395 | cfg_reg = CONPDN_REG; | |
396 | break; | |
397 | case PINCFG_TYPE_PUD_PDN: | |
398 | width = bank->pudpdn_width; | |
399 | cfg_reg = PUDPDN_REG; | |
400 | break; | |
401 | default: | |
402 | WARN_ON(1); | |
403 | return -EINVAL; | |
404 | } | |
405 | ||
7c367d3d TF |
406 | if (!width) |
407 | return -EINVAL; | |
408 | ||
30574f0d TA |
409 | mask = (1 << width) - 1; |
410 | shift = pin_offset * width; | |
411 | data = readl(reg_base + cfg_reg); | |
412 | ||
413 | if (set) { | |
414 | cfg_value = PINCFG_UNPACK_VALUE(*config); | |
415 | data &= ~(mask << shift); | |
416 | data |= (cfg_value << shift); | |
417 | writel(data, reg_base + cfg_reg); | |
418 | } else { | |
419 | data >>= shift; | |
420 | data &= mask; | |
421 | *config = PINCFG_PACK(cfg_type, data); | |
422 | } | |
423 | return 0; | |
424 | } | |
425 | ||
426 | /* set the pin config settings for a specified pin */ | |
427 | static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |
428 | unsigned long config) | |
429 | { | |
430 | return samsung_pinconf_rw(pctldev, pin, &config, true); | |
431 | } | |
432 | ||
433 | /* get the pin config settings for a specified pin */ | |
434 | static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, | |
435 | unsigned long *config) | |
436 | { | |
437 | return samsung_pinconf_rw(pctldev, pin, config, false); | |
438 | } | |
439 | ||
440 | /* set the pin config settings for a specified pin group */ | |
441 | static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, | |
442 | unsigned group, unsigned long config) | |
443 | { | |
444 | struct samsung_pinctrl_drv_data *drvdata; | |
445 | const unsigned int *pins; | |
446 | unsigned int cnt; | |
447 | ||
448 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
449 | pins = drvdata->pin_groups[group].pins; | |
450 | ||
451 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) | |
452 | samsung_pinconf_set(pctldev, pins[cnt], config); | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | /* get the pin config settings for a specified pin group */ | |
458 | static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, | |
459 | unsigned int group, unsigned long *config) | |
460 | { | |
461 | struct samsung_pinctrl_drv_data *drvdata; | |
462 | const unsigned int *pins; | |
463 | ||
464 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
465 | pins = drvdata->pin_groups[group].pins; | |
466 | samsung_pinconf_get(pctldev, pins[0], config); | |
467 | return 0; | |
468 | } | |
469 | ||
470 | /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ | |
471 | static struct pinconf_ops samsung_pinconf_ops = { | |
472 | .pin_config_get = samsung_pinconf_get, | |
473 | .pin_config_set = samsung_pinconf_set, | |
474 | .pin_config_group_get = samsung_pinconf_group_get, | |
475 | .pin_config_group_set = samsung_pinconf_group_set, | |
476 | }; | |
477 | ||
478 | /* gpiolib gpio_set callback function */ | |
479 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
480 | { | |
d3a7b9e3 | 481 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); |
30574f0d | 482 | void __iomem *reg; |
d3a7b9e3 | 483 | u32 data; |
30574f0d | 484 | |
d3a7b9e3 | 485 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 486 | |
30574f0d | 487 | data = readl(reg + DAT_REG); |
d3a7b9e3 | 488 | data &= ~(1 << offset); |
30574f0d | 489 | if (value) |
d3a7b9e3 | 490 | data |= 1 << offset; |
30574f0d TA |
491 | writel(data, reg + DAT_REG); |
492 | } | |
493 | ||
494 | /* gpiolib gpio_get callback function */ | |
495 | static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) | |
496 | { | |
497 | void __iomem *reg; | |
d3a7b9e3 TF |
498 | u32 data; |
499 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
62f14c0e | 500 | |
d3a7b9e3 | 501 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 502 | |
30574f0d | 503 | data = readl(reg + DAT_REG); |
d3a7b9e3 | 504 | data >>= offset; |
30574f0d TA |
505 | data &= 1; |
506 | return data; | |
507 | } | |
508 | ||
509 | /* | |
510 | * gpiolib gpio_direction_input callback function. The setting of the pin | |
511 | * mux function as 'gpio input' will be handled by the pinctrl susbsystem | |
512 | * interface. | |
513 | */ | |
514 | static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |
515 | { | |
516 | return pinctrl_gpio_direction_input(gc->base + offset); | |
517 | } | |
518 | ||
519 | /* | |
520 | * gpiolib gpio_direction_output callback function. The setting of the pin | |
521 | * mux function as 'gpio output' will be handled by the pinctrl susbsystem | |
522 | * interface. | |
523 | */ | |
524 | static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
525 | int value) | |
526 | { | |
527 | samsung_gpio_set(gc, offset, value); | |
528 | return pinctrl_gpio_direction_output(gc->base + offset); | |
529 | } | |
530 | ||
a19fe2d4 TF |
531 | /* |
532 | * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin | |
533 | * and a virtual IRQ, if not already present. | |
534 | */ | |
535 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
536 | { | |
537 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
538 | unsigned int virq; | |
539 | ||
540 | if (!bank->irq_domain) | |
541 | return -ENXIO; | |
542 | ||
543 | virq = irq_create_mapping(bank->irq_domain, offset); | |
544 | ||
545 | return (virq) ? : -ENXIO; | |
546 | } | |
547 | ||
30574f0d TA |
548 | /* |
549 | * Parse the pin names listed in the 'samsung,pins' property and convert it | |
550 | * into a list of gpio numbers are create a pin group from it. | |
551 | */ | |
150632b0 GKH |
552 | static int samsung_pinctrl_parse_dt_pins(struct platform_device *pdev, |
553 | struct device_node *cfg_np, | |
554 | struct pinctrl_desc *pctl, | |
555 | unsigned int **pin_list, | |
556 | unsigned int *npins) | |
30574f0d TA |
557 | { |
558 | struct device *dev = &pdev->dev; | |
559 | struct property *prop; | |
560 | struct pinctrl_pin_desc const *pdesc = pctl->pins; | |
561 | unsigned int idx = 0, cnt; | |
562 | const char *pin_name; | |
563 | ||
564 | *npins = of_property_count_strings(cfg_np, "samsung,pins"); | |
4a991b41 | 565 | if (IS_ERR_VALUE(*npins)) { |
30574f0d TA |
566 | dev_err(dev, "invalid pin list in %s node", cfg_np->name); |
567 | return -EINVAL; | |
568 | } | |
569 | ||
570 | *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL); | |
571 | if (!*pin_list) { | |
572 | dev_err(dev, "failed to allocate memory for pin list\n"); | |
573 | return -ENOMEM; | |
574 | } | |
575 | ||
576 | of_property_for_each_string(cfg_np, "samsung,pins", prop, pin_name) { | |
577 | for (cnt = 0; cnt < pctl->npins; cnt++) { | |
578 | if (pdesc[cnt].name) { | |
579 | if (!strcmp(pin_name, pdesc[cnt].name)) { | |
580 | (*pin_list)[idx++] = pdesc[cnt].number; | |
581 | break; | |
582 | } | |
583 | } | |
584 | } | |
585 | if (cnt == pctl->npins) { | |
586 | dev_err(dev, "pin %s not valid in %s node\n", | |
587 | pin_name, cfg_np->name); | |
588 | devm_kfree(dev, *pin_list); | |
589 | return -EINVAL; | |
590 | } | |
591 | } | |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
596 | /* | |
597 | * Parse the information about all the available pin groups and pin functions | |
598 | * from device node of the pin-controller. A pin group is formed with all | |
599 | * the pins listed in the "samsung,pins" property. | |
600 | */ | |
150632b0 GKH |
601 | static int samsung_pinctrl_parse_dt(struct platform_device *pdev, |
602 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
603 | { |
604 | struct device *dev = &pdev->dev; | |
605 | struct device_node *dev_np = dev->of_node; | |
606 | struct device_node *cfg_np; | |
607 | struct samsung_pin_group *groups, *grp; | |
608 | struct samsung_pmx_func *functions, *func; | |
609 | unsigned *pin_list; | |
610 | unsigned int npins, grp_cnt, func_idx = 0; | |
611 | char *gname, *fname; | |
612 | int ret; | |
613 | ||
614 | grp_cnt = of_get_child_count(dev_np); | |
615 | if (!grp_cnt) | |
616 | return -EINVAL; | |
617 | ||
618 | groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL); | |
619 | if (!groups) { | |
620 | dev_err(dev, "failed allocate memory for ping group list\n"); | |
621 | return -EINVAL; | |
622 | } | |
623 | grp = groups; | |
624 | ||
625 | functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL); | |
626 | if (!functions) { | |
627 | dev_err(dev, "failed to allocate memory for function list\n"); | |
628 | return -EINVAL; | |
629 | } | |
630 | func = functions; | |
631 | ||
632 | /* | |
633 | * Iterate over all the child nodes of the pin controller node | |
634 | * and create pin groups and pin function lists. | |
635 | */ | |
636 | for_each_child_of_node(dev_np, cfg_np) { | |
637 | u32 function; | |
724e56a4 | 638 | if (!of_find_property(cfg_np, "samsung,pins", NULL)) |
30574f0d TA |
639 | continue; |
640 | ||
641 | ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np, | |
642 | &drvdata->pctl, &pin_list, &npins); | |
643 | if (ret) | |
644 | return ret; | |
645 | ||
646 | /* derive pin group name from the node name */ | |
647 | gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN, | |
648 | GFP_KERNEL); | |
649 | if (!gname) { | |
650 | dev_err(dev, "failed to alloc memory for group name\n"); | |
651 | return -ENOMEM; | |
652 | } | |
653 | sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX); | |
654 | ||
655 | grp->name = gname; | |
656 | grp->pins = pin_list; | |
657 | grp->num_pins = npins; | |
658 | of_property_read_u32(cfg_np, "samsung,pin-function", &function); | |
659 | grp->func = function; | |
660 | grp++; | |
661 | ||
662 | if (!of_find_property(cfg_np, "samsung,pin-function", NULL)) | |
663 | continue; | |
664 | ||
665 | /* derive function name from the node name */ | |
666 | fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN, | |
667 | GFP_KERNEL); | |
668 | if (!fname) { | |
669 | dev_err(dev, "failed to alloc memory for func name\n"); | |
670 | return -ENOMEM; | |
671 | } | |
672 | sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX); | |
673 | ||
674 | func->name = fname; | |
675 | func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL); | |
676 | if (!func->groups) { | |
677 | dev_err(dev, "failed to alloc memory for group list " | |
678 | "in pin function"); | |
679 | return -ENOMEM; | |
680 | } | |
681 | func->groups[0] = gname; | |
682 | func->num_groups = 1; | |
683 | func++; | |
684 | func_idx++; | |
685 | } | |
686 | ||
687 | drvdata->pin_groups = groups; | |
688 | drvdata->nr_groups = grp_cnt; | |
689 | drvdata->pmx_functions = functions; | |
690 | drvdata->nr_functions = func_idx; | |
691 | ||
692 | return 0; | |
693 | } | |
694 | ||
695 | /* register the pinctrl interface with the pinctrl subsystem */ | |
150632b0 GKH |
696 | static int samsung_pinctrl_register(struct platform_device *pdev, |
697 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
698 | { |
699 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; | |
700 | struct pinctrl_pin_desc *pindesc, *pdesc; | |
701 | struct samsung_pin_bank *pin_bank; | |
702 | char *pin_names; | |
703 | int pin, bank, ret; | |
704 | ||
705 | ctrldesc->name = "samsung-pinctrl"; | |
706 | ctrldesc->owner = THIS_MODULE; | |
707 | ctrldesc->pctlops = &samsung_pctrl_ops; | |
708 | ctrldesc->pmxops = &samsung_pinmux_ops; | |
709 | ctrldesc->confops = &samsung_pinconf_ops; | |
710 | ||
711 | pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * | |
712 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
713 | if (!pindesc) { | |
714 | dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n"); | |
715 | return -ENOMEM; | |
716 | } | |
717 | ctrldesc->pins = pindesc; | |
718 | ctrldesc->npins = drvdata->ctrl->nr_pins; | |
719 | ctrldesc->npins = drvdata->ctrl->nr_pins; | |
720 | ||
721 | /* dynamically populate the pin number and pin name for pindesc */ | |
722 | for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) | |
723 | pdesc->number = pin + drvdata->ctrl->base; | |
724 | ||
725 | /* | |
726 | * allocate space for storing the dynamically generated names for all | |
727 | * the pins which belong to this pin-controller. | |
728 | */ | |
729 | pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH * | |
730 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
731 | if (!pin_names) { | |
732 | dev_err(&pdev->dev, "mem alloc for pin names failed\n"); | |
733 | return -ENOMEM; | |
734 | } | |
735 | ||
736 | /* for each pin, the name of the pin is pin-bank name + pin number */ | |
737 | for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) { | |
738 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
739 | for (pin = 0; pin < pin_bank->nr_pins; pin++) { | |
740 | sprintf(pin_names, "%s-%d", pin_bank->name, pin); | |
741 | pdesc = pindesc + pin_bank->pin_base + pin; | |
742 | pdesc->name = pin_names; | |
743 | pin_names += PIN_NAME_LENGTH; | |
744 | } | |
745 | } | |
746 | ||
747 | drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata); | |
748 | if (!drvdata->pctl_dev) { | |
749 | dev_err(&pdev->dev, "could not register pinctrl driver\n"); | |
750 | return -EINVAL; | |
751 | } | |
752 | ||
d3a7b9e3 TF |
753 | for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) { |
754 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
755 | pin_bank->grange.name = pin_bank->name; | |
756 | pin_bank->grange.id = bank; | |
757 | pin_bank->grange.pin_base = pin_bank->pin_base; | |
758 | pin_bank->grange.base = pin_bank->gpio_chip.base; | |
759 | pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; | |
760 | pin_bank->grange.gc = &pin_bank->gpio_chip; | |
761 | pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); | |
762 | } | |
30574f0d TA |
763 | |
764 | ret = samsung_pinctrl_parse_dt(pdev, drvdata); | |
765 | if (ret) { | |
766 | pinctrl_unregister(drvdata->pctl_dev); | |
767 | return ret; | |
768 | } | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
d3a7b9e3 TF |
773 | static const struct gpio_chip samsung_gpiolib_chip = { |
774 | .set = samsung_gpio_set, | |
775 | .get = samsung_gpio_get, | |
776 | .direction_input = samsung_gpio_direction_input, | |
777 | .direction_output = samsung_gpio_direction_output, | |
a19fe2d4 | 778 | .to_irq = samsung_gpio_to_irq, |
d3a7b9e3 TF |
779 | .owner = THIS_MODULE, |
780 | }; | |
781 | ||
30574f0d | 782 | /* register the gpiolib interface with the gpiolib subsystem */ |
150632b0 GKH |
783 | static int samsung_gpiolib_register(struct platform_device *pdev, |
784 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 785 | { |
d3a7b9e3 TF |
786 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
787 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
30574f0d TA |
788 | struct gpio_chip *gc; |
789 | int ret; | |
d3a7b9e3 TF |
790 | int i; |
791 | ||
792 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
793 | bank->gpio_chip = samsung_gpiolib_chip; | |
794 | ||
795 | gc = &bank->gpio_chip; | |
796 | gc->base = ctrl->base + bank->pin_base; | |
797 | gc->ngpio = bank->nr_pins; | |
798 | gc->dev = &pdev->dev; | |
799 | gc->of_node = bank->of_node; | |
800 | gc->label = bank->name; | |
801 | ||
802 | ret = gpiochip_add(gc); | |
803 | if (ret) { | |
804 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | |
805 | gc->label, ret); | |
806 | goto fail; | |
807 | } | |
30574f0d TA |
808 | } |
809 | ||
810 | return 0; | |
d3a7b9e3 TF |
811 | |
812 | fail: | |
813 | for (--i, --bank; i >= 0; --i, --bank) | |
814 | if (gpiochip_remove(&bank->gpio_chip)) | |
815 | dev_err(&pdev->dev, "gpio chip %s remove failed\n", | |
816 | bank->gpio_chip.label); | |
817 | return ret; | |
30574f0d TA |
818 | } |
819 | ||
820 | /* unregister the gpiolib interface with the gpiolib subsystem */ | |
150632b0 GKH |
821 | static int samsung_gpiolib_unregister(struct platform_device *pdev, |
822 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 823 | { |
d3a7b9e3 TF |
824 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
825 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
826 | int ret = 0; | |
827 | int i; | |
828 | ||
829 | for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank) | |
830 | ret = gpiochip_remove(&bank->gpio_chip); | |
831 | ||
832 | if (ret) | |
30574f0d | 833 | dev_err(&pdev->dev, "gpio chip remove failed\n"); |
d3a7b9e3 TF |
834 | |
835 | return ret; | |
30574f0d TA |
836 | } |
837 | ||
838 | static const struct of_device_id samsung_pinctrl_dt_match[]; | |
839 | ||
840 | /* retrieve the soc specific data */ | |
2f0253ff | 841 | static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data( |
6defe9a0 | 842 | struct samsung_pinctrl_drv_data *d, |
30574f0d TA |
843 | struct platform_device *pdev) |
844 | { | |
845 | int id; | |
846 | const struct of_device_id *match; | |
6defe9a0 | 847 | struct device_node *node = pdev->dev.of_node; |
ab663789 | 848 | struct device_node *np; |
40ba6227 TF |
849 | struct samsung_pin_ctrl *ctrl; |
850 | struct samsung_pin_bank *bank; | |
851 | int i; | |
30574f0d | 852 | |
6defe9a0 | 853 | id = of_alias_get_id(node, "pinctrl"); |
30574f0d TA |
854 | if (id < 0) { |
855 | dev_err(&pdev->dev, "failed to get alias id\n"); | |
856 | return NULL; | |
857 | } | |
858 | match = of_match_node(samsung_pinctrl_dt_match, node); | |
40ba6227 TF |
859 | ctrl = (struct samsung_pin_ctrl *)match->data + id; |
860 | ||
861 | bank = ctrl->pin_banks; | |
862 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
6defe9a0 | 863 | bank->drvdata = d; |
40ba6227 TF |
864 | bank->pin_base = ctrl->nr_pins; |
865 | ctrl->nr_pins += bank->nr_pins; | |
40ba6227 TF |
866 | } |
867 | ||
ab663789 TF |
868 | for_each_child_of_node(node, np) { |
869 | if (!of_find_property(np, "gpio-controller", NULL)) | |
870 | continue; | |
871 | bank = ctrl->pin_banks; | |
872 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
873 | if (!strcmp(bank->name, np->name)) { | |
874 | bank->of_node = np; | |
875 | break; | |
876 | } | |
877 | } | |
878 | } | |
879 | ||
40ba6227 TF |
880 | ctrl->base = pin_base; |
881 | pin_base += ctrl->nr_pins; | |
882 | ||
883 | return ctrl; | |
30574f0d TA |
884 | } |
885 | ||
150632b0 | 886 | static int samsung_pinctrl_probe(struct platform_device *pdev) |
30574f0d TA |
887 | { |
888 | struct samsung_pinctrl_drv_data *drvdata; | |
889 | struct device *dev = &pdev->dev; | |
890 | struct samsung_pin_ctrl *ctrl; | |
891 | struct resource *res; | |
892 | int ret; | |
893 | ||
894 | if (!dev->of_node) { | |
895 | dev_err(dev, "device tree node not found\n"); | |
896 | return -ENODEV; | |
897 | } | |
898 | ||
30574f0d TA |
899 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); |
900 | if (!drvdata) { | |
901 | dev_err(dev, "failed to allocate memory for driver's " | |
902 | "private data\n"); | |
903 | return -ENOMEM; | |
904 | } | |
6defe9a0 TF |
905 | |
906 | ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); | |
907 | if (!ctrl) { | |
908 | dev_err(&pdev->dev, "driver data not available\n"); | |
909 | return -EINVAL; | |
910 | } | |
30574f0d TA |
911 | drvdata->ctrl = ctrl; |
912 | drvdata->dev = dev; | |
913 | ||
914 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
915 | if (!res) { | |
916 | dev_err(dev, "cannot find IO resource\n"); | |
917 | return -ENOENT; | |
918 | } | |
919 | ||
920 | drvdata->virt_base = devm_request_and_ioremap(&pdev->dev, res); | |
921 | if (!drvdata->virt_base) { | |
922 | dev_err(dev, "ioremap failed\n"); | |
923 | return -ENODEV; | |
924 | } | |
925 | ||
926 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
927 | if (res) | |
928 | drvdata->irq = res->start; | |
929 | ||
930 | ret = samsung_gpiolib_register(pdev, drvdata); | |
931 | if (ret) | |
932 | return ret; | |
933 | ||
934 | ret = samsung_pinctrl_register(pdev, drvdata); | |
935 | if (ret) { | |
936 | samsung_gpiolib_unregister(pdev, drvdata); | |
937 | return ret; | |
938 | } | |
939 | ||
940 | if (ctrl->eint_gpio_init) | |
941 | ctrl->eint_gpio_init(drvdata); | |
942 | if (ctrl->eint_wkup_init) | |
943 | ctrl->eint_wkup_init(drvdata); | |
944 | ||
945 | platform_set_drvdata(pdev, drvdata); | |
946 | return 0; | |
947 | } | |
948 | ||
949 | static const struct of_device_id samsung_pinctrl_dt_match[] = { | |
950 | { .compatible = "samsung,pinctrl-exynos4210", | |
951 | .data = (void *)exynos4210_pin_ctrl }, | |
6edc794a TF |
952 | { .compatible = "samsung,pinctrl-exynos4x12", |
953 | .data = (void *)exynos4x12_pin_ctrl }, | |
30574f0d TA |
954 | {}, |
955 | }; | |
956 | MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match); | |
957 | ||
958 | static struct platform_driver samsung_pinctrl_driver = { | |
959 | .probe = samsung_pinctrl_probe, | |
960 | .driver = { | |
961 | .name = "samsung-pinctrl", | |
962 | .owner = THIS_MODULE, | |
963 | .of_match_table = of_match_ptr(samsung_pinctrl_dt_match), | |
964 | }, | |
965 | }; | |
966 | ||
967 | static int __init samsung_pinctrl_drv_register(void) | |
968 | { | |
969 | return platform_driver_register(&samsung_pinctrl_driver); | |
970 | } | |
971 | postcore_initcall(samsung_pinctrl_drv_register); | |
972 | ||
973 | static void __exit samsung_pinctrl_drv_unregister(void) | |
974 | { | |
975 | platform_driver_unregister(&samsung_pinctrl_driver); | |
976 | } | |
977 | module_exit(samsung_pinctrl_drv_unregister); | |
978 | ||
979 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | |
980 | MODULE_DESCRIPTION("Samsung pinctrl driver"); | |
981 | MODULE_LICENSE("GPL v2"); |