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30574f0d TA |
1 | /* |
2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This driver implements the Samsung pinctrl driver. It supports setting up of | |
17 | * pinmux and pinconf configurations. The gpiolib interface is also included. | |
18 | * External interrupt (gpio and wakeup) support are not included in this driver | |
19 | * but provides extensions to which platform specific implementation of the gpio | |
20 | * and wakeup interrupts can be hooked to. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/err.h> | |
28 | #include <linux/gpio.h> | |
a19fe2d4 | 29 | #include <linux/irqdomain.h> |
19846950 | 30 | #include <linux/spinlock.h> |
30574f0d TA |
31 | |
32 | #include "core.h" | |
33 | #include "pinctrl-samsung.h" | |
34 | ||
35 | #define GROUP_SUFFIX "-grp" | |
36 | #define GSUFFIX_LEN sizeof(GROUP_SUFFIX) | |
37 | #define FUNCTION_SUFFIX "-mux" | |
38 | #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX) | |
39 | ||
40 | /* list of all possible config options supported */ | |
d5fd5da2 | 41 | static struct pin_config { |
30574f0d TA |
42 | char *prop_cfg; |
43 | unsigned int cfg_type; | |
44 | } pcfgs[] = { | |
45 | { "samsung,pin-pud", PINCFG_TYPE_PUD }, | |
46 | { "samsung,pin-drv", PINCFG_TYPE_DRV }, | |
47 | { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, | |
48 | { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, | |
49 | }; | |
50 | ||
6fb6f1ba | 51 | static unsigned int pin_base; |
40ba6227 | 52 | |
d3a7b9e3 TF |
53 | static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc) |
54 | { | |
55 | return container_of(gc, struct samsung_pin_bank, gpio_chip); | |
56 | } | |
57 | ||
30574f0d TA |
58 | /* check if the selector is a valid pin group selector */ |
59 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) | |
60 | { | |
61 | struct samsung_pinctrl_drv_data *drvdata; | |
62 | ||
63 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
64 | return drvdata->nr_groups; | |
65 | } | |
66 | ||
67 | /* return the name of the group selected by the group selector */ | |
68 | static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, | |
69 | unsigned selector) | |
70 | { | |
71 | struct samsung_pinctrl_drv_data *drvdata; | |
72 | ||
73 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
74 | return drvdata->pin_groups[selector].name; | |
75 | } | |
76 | ||
77 | /* return the pin numbers associated with the specified group */ | |
78 | static int samsung_get_group_pins(struct pinctrl_dev *pctldev, | |
79 | unsigned selector, const unsigned **pins, unsigned *num_pins) | |
80 | { | |
81 | struct samsung_pinctrl_drv_data *drvdata; | |
82 | ||
83 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
84 | *pins = drvdata->pin_groups[selector].pins; | |
85 | *num_pins = drvdata->pin_groups[selector].num_pins; | |
86 | return 0; | |
87 | } | |
88 | ||
89 | /* create pinctrl_map entries by parsing device tree nodes */ | |
90 | static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, | |
91 | struct device_node *np, struct pinctrl_map **maps, | |
92 | unsigned *nmaps) | |
93 | { | |
94 | struct device *dev = pctldev->dev; | |
95 | struct pinctrl_map *map; | |
96 | unsigned long *cfg = NULL; | |
97 | char *gname, *fname; | |
98 | int cfg_cnt = 0, map_cnt = 0, idx = 0; | |
99 | ||
100 | /* count the number of config options specfied in the node */ | |
101 | for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++) { | |
102 | if (of_find_property(np, pcfgs[idx].prop_cfg, NULL)) | |
103 | cfg_cnt++; | |
104 | } | |
105 | ||
106 | /* | |
107 | * Find out the number of map entries to create. All the config options | |
108 | * can be accomadated into a single config map entry. | |
109 | */ | |
110 | if (cfg_cnt) | |
111 | map_cnt = 1; | |
112 | if (of_find_property(np, "samsung,pin-function", NULL)) | |
113 | map_cnt++; | |
114 | if (!map_cnt) { | |
115 | dev_err(dev, "node %s does not have either config or function " | |
116 | "configurations\n", np->name); | |
117 | return -EINVAL; | |
118 | } | |
119 | ||
120 | /* Allocate memory for pin-map entries */ | |
121 | map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL); | |
122 | if (!map) { | |
123 | dev_err(dev, "could not alloc memory for pin-maps\n"); | |
124 | return -ENOMEM; | |
125 | } | |
126 | *nmaps = 0; | |
127 | ||
128 | /* | |
129 | * Allocate memory for pin group name. The pin group name is derived | |
130 | * from the node name from which these map entries are be created. | |
131 | */ | |
132 | gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL); | |
133 | if (!gname) { | |
134 | dev_err(dev, "failed to alloc memory for group name\n"); | |
135 | goto free_map; | |
136 | } | |
137 | sprintf(gname, "%s%s", np->name, GROUP_SUFFIX); | |
138 | ||
139 | /* | |
140 | * don't have config options? then skip over to creating function | |
141 | * map entries. | |
142 | */ | |
143 | if (!cfg_cnt) | |
144 | goto skip_cfgs; | |
145 | ||
146 | /* Allocate memory for config entries */ | |
147 | cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL); | |
148 | if (!cfg) { | |
149 | dev_err(dev, "failed to alloc memory for configs\n"); | |
150 | goto free_gname; | |
151 | } | |
152 | ||
153 | /* Prepare a list of config settings */ | |
154 | for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) { | |
155 | u32 value; | |
156 | if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value)) | |
157 | cfg[cfg_cnt++] = | |
158 | PINCFG_PACK(pcfgs[idx].cfg_type, value); | |
159 | } | |
160 | ||
161 | /* create the config map entry */ | |
162 | map[*nmaps].data.configs.group_or_pin = gname; | |
163 | map[*nmaps].data.configs.configs = cfg; | |
164 | map[*nmaps].data.configs.num_configs = cfg_cnt; | |
165 | map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP; | |
166 | *nmaps += 1; | |
167 | ||
168 | skip_cfgs: | |
169 | /* create the function map entry */ | |
170 | if (of_find_property(np, "samsung,pin-function", NULL)) { | |
171 | fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL); | |
172 | if (!fname) { | |
173 | dev_err(dev, "failed to alloc memory for func name\n"); | |
174 | goto free_cfg; | |
175 | } | |
176 | sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX); | |
177 | ||
178 | map[*nmaps].data.mux.group = gname; | |
179 | map[*nmaps].data.mux.function = fname; | |
180 | map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP; | |
181 | *nmaps += 1; | |
182 | } | |
183 | ||
184 | *maps = map; | |
185 | return 0; | |
186 | ||
187 | free_cfg: | |
188 | kfree(cfg); | |
189 | free_gname: | |
190 | kfree(gname); | |
191 | free_map: | |
192 | kfree(map); | |
193 | return -ENOMEM; | |
194 | } | |
195 | ||
196 | /* free the memory allocated to hold the pin-map table */ | |
197 | static void samsung_dt_free_map(struct pinctrl_dev *pctldev, | |
198 | struct pinctrl_map *map, unsigned num_maps) | |
199 | { | |
200 | int idx; | |
201 | ||
202 | for (idx = 0; idx < num_maps; idx++) { | |
203 | if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) { | |
204 | kfree(map[idx].data.mux.function); | |
205 | if (!idx) | |
206 | kfree(map[idx].data.mux.group); | |
207 | } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) { | |
208 | kfree(map[idx].data.configs.configs); | |
209 | if (!idx) | |
210 | kfree(map[idx].data.configs.group_or_pin); | |
211 | } | |
212 | }; | |
213 | ||
214 | kfree(map); | |
215 | } | |
216 | ||
217 | /* list of pinctrl callbacks for the pinctrl core */ | |
022ab148 | 218 | static const struct pinctrl_ops samsung_pctrl_ops = { |
30574f0d TA |
219 | .get_groups_count = samsung_get_group_count, |
220 | .get_group_name = samsung_get_group_name, | |
221 | .get_group_pins = samsung_get_group_pins, | |
222 | .dt_node_to_map = samsung_dt_node_to_map, | |
223 | .dt_free_map = samsung_dt_free_map, | |
224 | }; | |
225 | ||
226 | /* check if the selector is a valid pin function selector */ | |
227 | static int samsung_get_functions_count(struct pinctrl_dev *pctldev) | |
228 | { | |
229 | struct samsung_pinctrl_drv_data *drvdata; | |
230 | ||
231 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
232 | return drvdata->nr_functions; | |
233 | } | |
234 | ||
235 | /* return the name of the pin function specified */ | |
236 | static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, | |
237 | unsigned selector) | |
238 | { | |
239 | struct samsung_pinctrl_drv_data *drvdata; | |
240 | ||
241 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
242 | return drvdata->pmx_functions[selector].name; | |
243 | } | |
244 | ||
245 | /* return the groups associated for the specified function selector */ | |
246 | static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, | |
247 | unsigned selector, const char * const **groups, | |
248 | unsigned * const num_groups) | |
249 | { | |
250 | struct samsung_pinctrl_drv_data *drvdata; | |
251 | ||
252 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
253 | *groups = drvdata->pmx_functions[selector].groups; | |
254 | *num_groups = drvdata->pmx_functions[selector].num_groups; | |
255 | return 0; | |
256 | } | |
257 | ||
258 | /* | |
259 | * given a pin number that is local to a pin controller, find out the pin bank | |
260 | * and the register base of the pin bank. | |
261 | */ | |
62f14c0e TF |
262 | static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, |
263 | unsigned pin, void __iomem **reg, u32 *offset, | |
30574f0d TA |
264 | struct samsung_pin_bank **bank) |
265 | { | |
30574f0d TA |
266 | struct samsung_pin_bank *b; |
267 | ||
30574f0d TA |
268 | b = drvdata->ctrl->pin_banks; |
269 | ||
270 | while ((pin >= b->pin_base) && | |
271 | ((b->pin_base + b->nr_pins - 1) < pin)) | |
272 | b++; | |
273 | ||
274 | *reg = drvdata->virt_base + b->pctl_offset; | |
275 | *offset = pin - b->pin_base; | |
276 | if (bank) | |
277 | *bank = b; | |
30574f0d TA |
278 | } |
279 | ||
280 | /* enable or disable a pinmux function */ | |
281 | static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, | |
282 | unsigned group, bool enable) | |
283 | { | |
284 | struct samsung_pinctrl_drv_data *drvdata; | |
285 | const unsigned int *pins; | |
286 | struct samsung_pin_bank *bank; | |
287 | void __iomem *reg; | |
288 | u32 mask, shift, data, pin_offset, cnt; | |
19846950 | 289 | unsigned long flags; |
30574f0d TA |
290 | |
291 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
292 | pins = drvdata->pin_groups[group].pins; | |
293 | ||
294 | /* | |
295 | * for each pin in the pin group selected, program the correspoding pin | |
296 | * pin function number in the config register. | |
297 | */ | |
298 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) { | |
499147c9 TF |
299 | struct samsung_pin_bank_type *type; |
300 | ||
62f14c0e | 301 | pin_to_reg_bank(drvdata, pins[cnt] - drvdata->ctrl->base, |
30574f0d | 302 | ®, &pin_offset, &bank); |
499147c9 TF |
303 | type = bank->type; |
304 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; | |
305 | shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
c16150d8 TF |
306 | if (shift >= 32) { |
307 | /* Some banks have two config registers */ | |
308 | shift -= 32; | |
309 | reg += 4; | |
310 | } | |
30574f0d | 311 | |
19846950 TF |
312 | spin_lock_irqsave(&bank->slock, flags); |
313 | ||
43fc9e7f | 314 | data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); |
30574f0d TA |
315 | data &= ~(mask << shift); |
316 | if (enable) | |
317 | data |= drvdata->pin_groups[group].func << shift; | |
43fc9e7f | 318 | writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); |
19846950 TF |
319 | |
320 | spin_unlock_irqrestore(&bank->slock, flags); | |
30574f0d TA |
321 | } |
322 | } | |
323 | ||
324 | /* enable a specified pinmux by writing to registers */ | |
325 | static int samsung_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector, | |
326 | unsigned group) | |
327 | { | |
328 | samsung_pinmux_setup(pctldev, selector, group, true); | |
329 | return 0; | |
330 | } | |
331 | ||
332 | /* disable a specified pinmux by writing to registers */ | |
333 | static void samsung_pinmux_disable(struct pinctrl_dev *pctldev, | |
334 | unsigned selector, unsigned group) | |
335 | { | |
336 | samsung_pinmux_setup(pctldev, selector, group, false); | |
337 | } | |
338 | ||
339 | /* | |
340 | * The calls to gpio_direction_output() and gpio_direction_input() | |
341 | * leads to this function call (via the pinctrl_gpio_direction_{input|output}() | |
342 | * function called from the gpiolib interface). | |
343 | */ | |
344 | static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, | |
345 | struct pinctrl_gpio_range *range, unsigned offset, bool input) | |
346 | { | |
499147c9 | 347 | struct samsung_pin_bank_type *type; |
30574f0d | 348 | struct samsung_pin_bank *bank; |
62f14c0e | 349 | struct samsung_pinctrl_drv_data *drvdata; |
30574f0d TA |
350 | void __iomem *reg; |
351 | u32 data, pin_offset, mask, shift; | |
19846950 | 352 | unsigned long flags; |
30574f0d | 353 | |
d3a7b9e3 | 354 | bank = gc_to_pin_bank(range->gc); |
499147c9 | 355 | type = bank->type; |
62f14c0e TF |
356 | drvdata = pinctrl_dev_get_drvdata(pctldev); |
357 | ||
d3a7b9e3 | 358 | pin_offset = offset - bank->pin_base; |
43fc9e7f TF |
359 | reg = drvdata->virt_base + bank->pctl_offset + |
360 | type->reg_offset[PINCFG_TYPE_FUNC]; | |
d3a7b9e3 | 361 | |
499147c9 TF |
362 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; |
363 | shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
c16150d8 TF |
364 | if (shift >= 32) { |
365 | /* Some banks have two config registers */ | |
366 | shift -= 32; | |
367 | reg += 4; | |
368 | } | |
30574f0d | 369 | |
19846950 TF |
370 | spin_lock_irqsave(&bank->slock, flags); |
371 | ||
30574f0d TA |
372 | data = readl(reg); |
373 | data &= ~(mask << shift); | |
374 | if (!input) | |
375 | data |= FUNC_OUTPUT << shift; | |
376 | writel(data, reg); | |
19846950 TF |
377 | |
378 | spin_unlock_irqrestore(&bank->slock, flags); | |
379 | ||
30574f0d TA |
380 | return 0; |
381 | } | |
382 | ||
383 | /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ | |
022ab148 | 384 | static const struct pinmux_ops samsung_pinmux_ops = { |
30574f0d TA |
385 | .get_functions_count = samsung_get_functions_count, |
386 | .get_function_name = samsung_pinmux_get_fname, | |
387 | .get_function_groups = samsung_pinmux_get_groups, | |
388 | .enable = samsung_pinmux_enable, | |
389 | .disable = samsung_pinmux_disable, | |
390 | .gpio_set_direction = samsung_pinmux_gpio_set_direction, | |
391 | }; | |
392 | ||
393 | /* set or get the pin config settings for a specified pin */ | |
394 | static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, | |
395 | unsigned long *config, bool set) | |
396 | { | |
397 | struct samsung_pinctrl_drv_data *drvdata; | |
499147c9 | 398 | struct samsung_pin_bank_type *type; |
30574f0d TA |
399 | struct samsung_pin_bank *bank; |
400 | void __iomem *reg_base; | |
401 | enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); | |
402 | u32 data, width, pin_offset, mask, shift; | |
403 | u32 cfg_value, cfg_reg; | |
19846950 | 404 | unsigned long flags; |
30574f0d TA |
405 | |
406 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
62f14c0e | 407 | pin_to_reg_bank(drvdata, pin - drvdata->ctrl->base, ®_base, |
30574f0d | 408 | &pin_offset, &bank); |
499147c9 | 409 | type = bank->type; |
30574f0d | 410 | |
499147c9 | 411 | if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) |
7c367d3d TF |
412 | return -EINVAL; |
413 | ||
499147c9 | 414 | width = type->fld_width[cfg_type]; |
43fc9e7f | 415 | cfg_reg = type->reg_offset[cfg_type]; |
499147c9 | 416 | |
19846950 TF |
417 | spin_lock_irqsave(&bank->slock, flags); |
418 | ||
30574f0d TA |
419 | mask = (1 << width) - 1; |
420 | shift = pin_offset * width; | |
421 | data = readl(reg_base + cfg_reg); | |
422 | ||
423 | if (set) { | |
424 | cfg_value = PINCFG_UNPACK_VALUE(*config); | |
425 | data &= ~(mask << shift); | |
426 | data |= (cfg_value << shift); | |
427 | writel(data, reg_base + cfg_reg); | |
428 | } else { | |
429 | data >>= shift; | |
430 | data &= mask; | |
431 | *config = PINCFG_PACK(cfg_type, data); | |
432 | } | |
19846950 TF |
433 | |
434 | spin_unlock_irqrestore(&bank->slock, flags); | |
435 | ||
30574f0d TA |
436 | return 0; |
437 | } | |
438 | ||
439 | /* set the pin config settings for a specified pin */ | |
440 | static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |
441 | unsigned long config) | |
442 | { | |
443 | return samsung_pinconf_rw(pctldev, pin, &config, true); | |
444 | } | |
445 | ||
446 | /* get the pin config settings for a specified pin */ | |
447 | static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, | |
448 | unsigned long *config) | |
449 | { | |
450 | return samsung_pinconf_rw(pctldev, pin, config, false); | |
451 | } | |
452 | ||
453 | /* set the pin config settings for a specified pin group */ | |
454 | static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, | |
455 | unsigned group, unsigned long config) | |
456 | { | |
457 | struct samsung_pinctrl_drv_data *drvdata; | |
458 | const unsigned int *pins; | |
459 | unsigned int cnt; | |
460 | ||
461 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
462 | pins = drvdata->pin_groups[group].pins; | |
463 | ||
464 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) | |
465 | samsung_pinconf_set(pctldev, pins[cnt], config); | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | /* get the pin config settings for a specified pin group */ | |
471 | static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, | |
472 | unsigned int group, unsigned long *config) | |
473 | { | |
474 | struct samsung_pinctrl_drv_data *drvdata; | |
475 | const unsigned int *pins; | |
476 | ||
477 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
478 | pins = drvdata->pin_groups[group].pins; | |
479 | samsung_pinconf_get(pctldev, pins[0], config); | |
480 | return 0; | |
481 | } | |
482 | ||
483 | /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ | |
022ab148 | 484 | static const struct pinconf_ops samsung_pinconf_ops = { |
30574f0d TA |
485 | .pin_config_get = samsung_pinconf_get, |
486 | .pin_config_set = samsung_pinconf_set, | |
487 | .pin_config_group_get = samsung_pinconf_group_get, | |
488 | .pin_config_group_set = samsung_pinconf_group_set, | |
489 | }; | |
490 | ||
491 | /* gpiolib gpio_set callback function */ | |
492 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
493 | { | |
d3a7b9e3 | 494 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); |
499147c9 | 495 | struct samsung_pin_bank_type *type = bank->type; |
19846950 | 496 | unsigned long flags; |
30574f0d | 497 | void __iomem *reg; |
d3a7b9e3 | 498 | u32 data; |
30574f0d | 499 | |
d3a7b9e3 | 500 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 501 | |
19846950 TF |
502 | spin_lock_irqsave(&bank->slock, flags); |
503 | ||
43fc9e7f | 504 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 505 | data &= ~(1 << offset); |
30574f0d | 506 | if (value) |
d3a7b9e3 | 507 | data |= 1 << offset; |
43fc9e7f | 508 | writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); |
19846950 TF |
509 | |
510 | spin_unlock_irqrestore(&bank->slock, flags); | |
30574f0d TA |
511 | } |
512 | ||
513 | /* gpiolib gpio_get callback function */ | |
514 | static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) | |
515 | { | |
516 | void __iomem *reg; | |
d3a7b9e3 TF |
517 | u32 data; |
518 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
43fc9e7f | 519 | struct samsung_pin_bank_type *type = bank->type; |
62f14c0e | 520 | |
d3a7b9e3 | 521 | reg = bank->drvdata->virt_base + bank->pctl_offset; |
30574f0d | 522 | |
43fc9e7f | 523 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 524 | data >>= offset; |
30574f0d TA |
525 | data &= 1; |
526 | return data; | |
527 | } | |
528 | ||
529 | /* | |
530 | * gpiolib gpio_direction_input callback function. The setting of the pin | |
531 | * mux function as 'gpio input' will be handled by the pinctrl susbsystem | |
532 | * interface. | |
533 | */ | |
534 | static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |
535 | { | |
536 | return pinctrl_gpio_direction_input(gc->base + offset); | |
537 | } | |
538 | ||
539 | /* | |
540 | * gpiolib gpio_direction_output callback function. The setting of the pin | |
541 | * mux function as 'gpio output' will be handled by the pinctrl susbsystem | |
542 | * interface. | |
543 | */ | |
544 | static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
545 | int value) | |
546 | { | |
547 | samsung_gpio_set(gc, offset, value); | |
548 | return pinctrl_gpio_direction_output(gc->base + offset); | |
549 | } | |
550 | ||
a19fe2d4 TF |
551 | /* |
552 | * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin | |
553 | * and a virtual IRQ, if not already present. | |
554 | */ | |
555 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
556 | { | |
557 | struct samsung_pin_bank *bank = gc_to_pin_bank(gc); | |
558 | unsigned int virq; | |
559 | ||
560 | if (!bank->irq_domain) | |
561 | return -ENXIO; | |
562 | ||
563 | virq = irq_create_mapping(bank->irq_domain, offset); | |
564 | ||
565 | return (virq) ? : -ENXIO; | |
566 | } | |
567 | ||
30574f0d TA |
568 | /* |
569 | * Parse the pin names listed in the 'samsung,pins' property and convert it | |
570 | * into a list of gpio numbers are create a pin group from it. | |
571 | */ | |
150632b0 GKH |
572 | static int samsung_pinctrl_parse_dt_pins(struct platform_device *pdev, |
573 | struct device_node *cfg_np, | |
574 | struct pinctrl_desc *pctl, | |
575 | unsigned int **pin_list, | |
576 | unsigned int *npins) | |
30574f0d TA |
577 | { |
578 | struct device *dev = &pdev->dev; | |
579 | struct property *prop; | |
580 | struct pinctrl_pin_desc const *pdesc = pctl->pins; | |
581 | unsigned int idx = 0, cnt; | |
582 | const char *pin_name; | |
583 | ||
584 | *npins = of_property_count_strings(cfg_np, "samsung,pins"); | |
4a991b41 | 585 | if (IS_ERR_VALUE(*npins)) { |
30574f0d TA |
586 | dev_err(dev, "invalid pin list in %s node", cfg_np->name); |
587 | return -EINVAL; | |
588 | } | |
589 | ||
590 | *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL); | |
591 | if (!*pin_list) { | |
592 | dev_err(dev, "failed to allocate memory for pin list\n"); | |
593 | return -ENOMEM; | |
594 | } | |
595 | ||
596 | of_property_for_each_string(cfg_np, "samsung,pins", prop, pin_name) { | |
597 | for (cnt = 0; cnt < pctl->npins; cnt++) { | |
598 | if (pdesc[cnt].name) { | |
599 | if (!strcmp(pin_name, pdesc[cnt].name)) { | |
600 | (*pin_list)[idx++] = pdesc[cnt].number; | |
601 | break; | |
602 | } | |
603 | } | |
604 | } | |
605 | if (cnt == pctl->npins) { | |
606 | dev_err(dev, "pin %s not valid in %s node\n", | |
607 | pin_name, cfg_np->name); | |
608 | devm_kfree(dev, *pin_list); | |
609 | return -EINVAL; | |
610 | } | |
611 | } | |
612 | ||
613 | return 0; | |
614 | } | |
615 | ||
616 | /* | |
617 | * Parse the information about all the available pin groups and pin functions | |
618 | * from device node of the pin-controller. A pin group is formed with all | |
619 | * the pins listed in the "samsung,pins" property. | |
620 | */ | |
150632b0 GKH |
621 | static int samsung_pinctrl_parse_dt(struct platform_device *pdev, |
622 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
623 | { |
624 | struct device *dev = &pdev->dev; | |
625 | struct device_node *dev_np = dev->of_node; | |
626 | struct device_node *cfg_np; | |
627 | struct samsung_pin_group *groups, *grp; | |
628 | struct samsung_pmx_func *functions, *func; | |
629 | unsigned *pin_list; | |
630 | unsigned int npins, grp_cnt, func_idx = 0; | |
631 | char *gname, *fname; | |
632 | int ret; | |
633 | ||
634 | grp_cnt = of_get_child_count(dev_np); | |
635 | if (!grp_cnt) | |
636 | return -EINVAL; | |
637 | ||
638 | groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL); | |
639 | if (!groups) { | |
640 | dev_err(dev, "failed allocate memory for ping group list\n"); | |
641 | return -EINVAL; | |
642 | } | |
643 | grp = groups; | |
644 | ||
645 | functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL); | |
646 | if (!functions) { | |
647 | dev_err(dev, "failed to allocate memory for function list\n"); | |
648 | return -EINVAL; | |
649 | } | |
650 | func = functions; | |
651 | ||
652 | /* | |
653 | * Iterate over all the child nodes of the pin controller node | |
654 | * and create pin groups and pin function lists. | |
655 | */ | |
656 | for_each_child_of_node(dev_np, cfg_np) { | |
657 | u32 function; | |
724e56a4 | 658 | if (!of_find_property(cfg_np, "samsung,pins", NULL)) |
30574f0d TA |
659 | continue; |
660 | ||
661 | ret = samsung_pinctrl_parse_dt_pins(pdev, cfg_np, | |
662 | &drvdata->pctl, &pin_list, &npins); | |
663 | if (ret) | |
664 | return ret; | |
665 | ||
666 | /* derive pin group name from the node name */ | |
667 | gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN, | |
668 | GFP_KERNEL); | |
669 | if (!gname) { | |
670 | dev_err(dev, "failed to alloc memory for group name\n"); | |
671 | return -ENOMEM; | |
672 | } | |
673 | sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX); | |
674 | ||
675 | grp->name = gname; | |
676 | grp->pins = pin_list; | |
677 | grp->num_pins = npins; | |
678 | of_property_read_u32(cfg_np, "samsung,pin-function", &function); | |
679 | grp->func = function; | |
680 | grp++; | |
681 | ||
682 | if (!of_find_property(cfg_np, "samsung,pin-function", NULL)) | |
683 | continue; | |
684 | ||
685 | /* derive function name from the node name */ | |
686 | fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN, | |
687 | GFP_KERNEL); | |
688 | if (!fname) { | |
689 | dev_err(dev, "failed to alloc memory for func name\n"); | |
690 | return -ENOMEM; | |
691 | } | |
692 | sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX); | |
693 | ||
694 | func->name = fname; | |
695 | func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL); | |
696 | if (!func->groups) { | |
697 | dev_err(dev, "failed to alloc memory for group list " | |
698 | "in pin function"); | |
699 | return -ENOMEM; | |
700 | } | |
701 | func->groups[0] = gname; | |
702 | func->num_groups = 1; | |
703 | func++; | |
704 | func_idx++; | |
705 | } | |
706 | ||
707 | drvdata->pin_groups = groups; | |
708 | drvdata->nr_groups = grp_cnt; | |
709 | drvdata->pmx_functions = functions; | |
710 | drvdata->nr_functions = func_idx; | |
711 | ||
712 | return 0; | |
713 | } | |
714 | ||
715 | /* register the pinctrl interface with the pinctrl subsystem */ | |
150632b0 GKH |
716 | static int samsung_pinctrl_register(struct platform_device *pdev, |
717 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
718 | { |
719 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; | |
720 | struct pinctrl_pin_desc *pindesc, *pdesc; | |
721 | struct samsung_pin_bank *pin_bank; | |
722 | char *pin_names; | |
723 | int pin, bank, ret; | |
724 | ||
725 | ctrldesc->name = "samsung-pinctrl"; | |
726 | ctrldesc->owner = THIS_MODULE; | |
727 | ctrldesc->pctlops = &samsung_pctrl_ops; | |
728 | ctrldesc->pmxops = &samsung_pinmux_ops; | |
729 | ctrldesc->confops = &samsung_pinconf_ops; | |
730 | ||
731 | pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * | |
732 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
733 | if (!pindesc) { | |
734 | dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n"); | |
735 | return -ENOMEM; | |
736 | } | |
737 | ctrldesc->pins = pindesc; | |
738 | ctrldesc->npins = drvdata->ctrl->nr_pins; | |
30574f0d TA |
739 | |
740 | /* dynamically populate the pin number and pin name for pindesc */ | |
741 | for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) | |
742 | pdesc->number = pin + drvdata->ctrl->base; | |
743 | ||
744 | /* | |
745 | * allocate space for storing the dynamically generated names for all | |
746 | * the pins which belong to this pin-controller. | |
747 | */ | |
748 | pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH * | |
749 | drvdata->ctrl->nr_pins, GFP_KERNEL); | |
750 | if (!pin_names) { | |
751 | dev_err(&pdev->dev, "mem alloc for pin names failed\n"); | |
752 | return -ENOMEM; | |
753 | } | |
754 | ||
755 | /* for each pin, the name of the pin is pin-bank name + pin number */ | |
756 | for (bank = 0; bank < drvdata->ctrl->nr_banks; bank++) { | |
757 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
758 | for (pin = 0; pin < pin_bank->nr_pins; pin++) { | |
759 | sprintf(pin_names, "%s-%d", pin_bank->name, pin); | |
760 | pdesc = pindesc + pin_bank->pin_base + pin; | |
761 | pdesc->name = pin_names; | |
762 | pin_names += PIN_NAME_LENGTH; | |
763 | } | |
764 | } | |
765 | ||
766 | drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata); | |
767 | if (!drvdata->pctl_dev) { | |
768 | dev_err(&pdev->dev, "could not register pinctrl driver\n"); | |
769 | return -EINVAL; | |
770 | } | |
771 | ||
d3a7b9e3 TF |
772 | for (bank = 0; bank < drvdata->ctrl->nr_banks; ++bank) { |
773 | pin_bank = &drvdata->ctrl->pin_banks[bank]; | |
774 | pin_bank->grange.name = pin_bank->name; | |
775 | pin_bank->grange.id = bank; | |
776 | pin_bank->grange.pin_base = pin_bank->pin_base; | |
777 | pin_bank->grange.base = pin_bank->gpio_chip.base; | |
778 | pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; | |
779 | pin_bank->grange.gc = &pin_bank->gpio_chip; | |
780 | pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); | |
781 | } | |
30574f0d TA |
782 | |
783 | ret = samsung_pinctrl_parse_dt(pdev, drvdata); | |
784 | if (ret) { | |
785 | pinctrl_unregister(drvdata->pctl_dev); | |
786 | return ret; | |
787 | } | |
788 | ||
789 | return 0; | |
790 | } | |
791 | ||
d3a7b9e3 TF |
792 | static const struct gpio_chip samsung_gpiolib_chip = { |
793 | .set = samsung_gpio_set, | |
794 | .get = samsung_gpio_get, | |
795 | .direction_input = samsung_gpio_direction_input, | |
796 | .direction_output = samsung_gpio_direction_output, | |
a19fe2d4 | 797 | .to_irq = samsung_gpio_to_irq, |
d3a7b9e3 TF |
798 | .owner = THIS_MODULE, |
799 | }; | |
800 | ||
30574f0d | 801 | /* register the gpiolib interface with the gpiolib subsystem */ |
150632b0 GKH |
802 | static int samsung_gpiolib_register(struct platform_device *pdev, |
803 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 804 | { |
d3a7b9e3 TF |
805 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
806 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
30574f0d TA |
807 | struct gpio_chip *gc; |
808 | int ret; | |
d3a7b9e3 TF |
809 | int i; |
810 | ||
811 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
812 | bank->gpio_chip = samsung_gpiolib_chip; | |
813 | ||
814 | gc = &bank->gpio_chip; | |
815 | gc->base = ctrl->base + bank->pin_base; | |
816 | gc->ngpio = bank->nr_pins; | |
817 | gc->dev = &pdev->dev; | |
818 | gc->of_node = bank->of_node; | |
819 | gc->label = bank->name; | |
820 | ||
821 | ret = gpiochip_add(gc); | |
822 | if (ret) { | |
823 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | |
824 | gc->label, ret); | |
825 | goto fail; | |
826 | } | |
30574f0d TA |
827 | } |
828 | ||
829 | return 0; | |
d3a7b9e3 TF |
830 | |
831 | fail: | |
832 | for (--i, --bank; i >= 0; --i, --bank) | |
833 | if (gpiochip_remove(&bank->gpio_chip)) | |
834 | dev_err(&pdev->dev, "gpio chip %s remove failed\n", | |
835 | bank->gpio_chip.label); | |
836 | return ret; | |
30574f0d TA |
837 | } |
838 | ||
839 | /* unregister the gpiolib interface with the gpiolib subsystem */ | |
150632b0 GKH |
840 | static int samsung_gpiolib_unregister(struct platform_device *pdev, |
841 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 842 | { |
d3a7b9e3 TF |
843 | struct samsung_pin_ctrl *ctrl = drvdata->ctrl; |
844 | struct samsung_pin_bank *bank = ctrl->pin_banks; | |
845 | int ret = 0; | |
846 | int i; | |
847 | ||
848 | for (i = 0; !ret && i < ctrl->nr_banks; ++i, ++bank) | |
849 | ret = gpiochip_remove(&bank->gpio_chip); | |
850 | ||
851 | if (ret) | |
30574f0d | 852 | dev_err(&pdev->dev, "gpio chip remove failed\n"); |
d3a7b9e3 TF |
853 | |
854 | return ret; | |
30574f0d TA |
855 | } |
856 | ||
857 | static const struct of_device_id samsung_pinctrl_dt_match[]; | |
858 | ||
859 | /* retrieve the soc specific data */ | |
2f0253ff | 860 | static struct samsung_pin_ctrl *samsung_pinctrl_get_soc_data( |
6defe9a0 | 861 | struct samsung_pinctrl_drv_data *d, |
30574f0d TA |
862 | struct platform_device *pdev) |
863 | { | |
864 | int id; | |
865 | const struct of_device_id *match; | |
6defe9a0 | 866 | struct device_node *node = pdev->dev.of_node; |
ab663789 | 867 | struct device_node *np; |
40ba6227 TF |
868 | struct samsung_pin_ctrl *ctrl; |
869 | struct samsung_pin_bank *bank; | |
870 | int i; | |
30574f0d | 871 | |
6defe9a0 | 872 | id = of_alias_get_id(node, "pinctrl"); |
30574f0d TA |
873 | if (id < 0) { |
874 | dev_err(&pdev->dev, "failed to get alias id\n"); | |
875 | return NULL; | |
876 | } | |
877 | match = of_match_node(samsung_pinctrl_dt_match, node); | |
40ba6227 TF |
878 | ctrl = (struct samsung_pin_ctrl *)match->data + id; |
879 | ||
880 | bank = ctrl->pin_banks; | |
881 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
19846950 | 882 | spin_lock_init(&bank->slock); |
6defe9a0 | 883 | bank->drvdata = d; |
40ba6227 TF |
884 | bank->pin_base = ctrl->nr_pins; |
885 | ctrl->nr_pins += bank->nr_pins; | |
40ba6227 TF |
886 | } |
887 | ||
ab663789 TF |
888 | for_each_child_of_node(node, np) { |
889 | if (!of_find_property(np, "gpio-controller", NULL)) | |
890 | continue; | |
891 | bank = ctrl->pin_banks; | |
892 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | |
893 | if (!strcmp(bank->name, np->name)) { | |
894 | bank->of_node = np; | |
895 | break; | |
896 | } | |
897 | } | |
898 | } | |
899 | ||
40ba6227 TF |
900 | ctrl->base = pin_base; |
901 | pin_base += ctrl->nr_pins; | |
902 | ||
903 | return ctrl; | |
30574f0d TA |
904 | } |
905 | ||
150632b0 | 906 | static int samsung_pinctrl_probe(struct platform_device *pdev) |
30574f0d TA |
907 | { |
908 | struct samsung_pinctrl_drv_data *drvdata; | |
909 | struct device *dev = &pdev->dev; | |
910 | struct samsung_pin_ctrl *ctrl; | |
911 | struct resource *res; | |
912 | int ret; | |
913 | ||
914 | if (!dev->of_node) { | |
915 | dev_err(dev, "device tree node not found\n"); | |
916 | return -ENODEV; | |
917 | } | |
918 | ||
30574f0d TA |
919 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); |
920 | if (!drvdata) { | |
921 | dev_err(dev, "failed to allocate memory for driver's " | |
922 | "private data\n"); | |
923 | return -ENOMEM; | |
924 | } | |
6defe9a0 TF |
925 | |
926 | ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); | |
927 | if (!ctrl) { | |
928 | dev_err(&pdev->dev, "driver data not available\n"); | |
929 | return -EINVAL; | |
930 | } | |
30574f0d TA |
931 | drvdata->ctrl = ctrl; |
932 | drvdata->dev = dev; | |
933 | ||
934 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
935 | if (!res) { | |
936 | dev_err(dev, "cannot find IO resource\n"); | |
937 | return -ENOENT; | |
938 | } | |
939 | ||
9e0c1fb2 TR |
940 | drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res); |
941 | if (IS_ERR(drvdata->virt_base)) | |
942 | return PTR_ERR(drvdata->virt_base); | |
30574f0d TA |
943 | |
944 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
945 | if (res) | |
946 | drvdata->irq = res->start; | |
947 | ||
948 | ret = samsung_gpiolib_register(pdev, drvdata); | |
949 | if (ret) | |
950 | return ret; | |
951 | ||
952 | ret = samsung_pinctrl_register(pdev, drvdata); | |
953 | if (ret) { | |
954 | samsung_gpiolib_unregister(pdev, drvdata); | |
955 | return ret; | |
956 | } | |
957 | ||
958 | if (ctrl->eint_gpio_init) | |
959 | ctrl->eint_gpio_init(drvdata); | |
960 | if (ctrl->eint_wkup_init) | |
961 | ctrl->eint_wkup_init(drvdata); | |
962 | ||
963 | platform_set_drvdata(pdev, drvdata); | |
964 | return 0; | |
965 | } | |
966 | ||
967 | static const struct of_device_id samsung_pinctrl_dt_match[] = { | |
d5517bec | 968 | #ifdef CONFIG_PINCTRL_EXYNOS |
b533c868 | 969 | { .compatible = "samsung,exynos4210-pinctrl", |
30574f0d | 970 | .data = (void *)exynos4210_pin_ctrl }, |
b533c868 | 971 | { .compatible = "samsung,exynos4x12-pinctrl", |
6edc794a | 972 | .data = (void *)exynos4x12_pin_ctrl }, |
d5517bec | 973 | #endif |
30574f0d TA |
974 | {}, |
975 | }; | |
976 | MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match); | |
977 | ||
978 | static struct platform_driver samsung_pinctrl_driver = { | |
979 | .probe = samsung_pinctrl_probe, | |
980 | .driver = { | |
981 | .name = "samsung-pinctrl", | |
982 | .owner = THIS_MODULE, | |
983 | .of_match_table = of_match_ptr(samsung_pinctrl_dt_match), | |
984 | }, | |
985 | }; | |
986 | ||
987 | static int __init samsung_pinctrl_drv_register(void) | |
988 | { | |
989 | return platform_driver_register(&samsung_pinctrl_driver); | |
990 | } | |
991 | postcore_initcall(samsung_pinctrl_drv_register); | |
992 | ||
993 | static void __exit samsung_pinctrl_drv_unregister(void) | |
994 | { | |
995 | platform_driver_unregister(&samsung_pinctrl_driver); | |
996 | } | |
997 | module_exit(samsung_pinctrl_drv_unregister); | |
998 | ||
999 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | |
1000 | MODULE_DESCRIPTION("Samsung pinctrl driver"); | |
1001 | MODULE_LICENSE("GPL v2"); |