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af873fce | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | /* |
3 | * Core driver for the pin muxing portions of the pin control subsystem | |
4 | * | |
e93bcee0 | 5 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
6 | * Written on behalf of Linaro for ST-Ericsson |
7 | * Based on bits of regulator core, gpio core and clk core | |
8 | * | |
9 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
10 | * | |
7ecdb16f | 11 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
2744e8af LW |
12 | */ |
13 | #define pr_fmt(fmt) "pinmux core: " fmt | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/device.h> | |
19 | #include <linux/slab.h> | |
20 | #include <linux/radix-tree.h> | |
21 | #include <linux/err.h> | |
22 | #include <linux/list.h> | |
97607d15 | 23 | #include <linux/string.h> |
2744e8af LW |
24 | #include <linux/debugfs.h> |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/pinctrl/machine.h> | |
27 | #include <linux/pinctrl/pinmux.h> | |
28 | #include "core.h" | |
befe5bdf | 29 | #include "pinmux.h" |
2744e8af | 30 | |
03665e0f SW |
31 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
32 | { | |
33 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 34 | unsigned nfuncs; |
03665e0f SW |
35 | unsigned selector = 0; |
36 | ||
37 | /* Check that we implement required operations */ | |
a1d31f71 DA |
38 | if (!ops || |
39 | !ops->get_functions_count || | |
03665e0f SW |
40 | !ops->get_function_name || |
41 | !ops->get_function_groups || | |
03e9f0ca | 42 | !ops->set_mux) { |
ad6e1107 | 43 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 44 | return -EINVAL; |
ad6e1107 | 45 | } |
03665e0f | 46 | /* Check that all functions registered have names */ |
a1d31f71 | 47 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 48 | while (selector < nfuncs) { |
03665e0f SW |
49 | const char *fname = ops->get_function_name(pctldev, |
50 | selector); | |
51 | if (!fname) { | |
a1d31f71 | 52 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
53 | selector); |
54 | return -EINVAL; | |
55 | } | |
56 | selector++; | |
57 | } | |
58 | ||
59 | return 0; | |
60 | } | |
61 | ||
3f713b7c | 62 | int pinmux_validate_map(const struct pinctrl_map *map, int i) |
1e2082b5 SW |
63 | { |
64 | if (!map->data.mux.function) { | |
65 | pr_err("failed to register map %s (%d): no function given\n", | |
66 | map->name, i); | |
67 | return -EINVAL; | |
68 | } | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
472a61e7 SW |
73 | /** |
74 | * pinmux_can_be_used_for_gpio() - check if a specific pin | |
75 | * is either muxed to a different function or used as gpio. | |
76 | * | |
d340351f | 77 | * @pctldev: the associated pin controller device |
472a61e7 SW |
78 | * @pin: the pin number in the global pin space |
79 | * | |
80 | * Controllers not defined as strict will always return true, | |
81 | * menaning that the gpio can be used. | |
82 | */ | |
83 | bool pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned pin) | |
84 | { | |
85 | struct pin_desc *desc = pin_desc_get(pctldev, pin); | |
86 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
87 | ||
88 | /* Can't inspect pin, assume it can be used */ | |
6ba2fd39 | 89 | if (!desc || !ops) |
472a61e7 SW |
90 | return true; |
91 | ||
92 | if (ops->strict && desc->mux_usecount) | |
93 | return false; | |
94 | ||
95 | return !(ops->strict && !!desc->gpio_owner); | |
96 | } | |
97 | ||
2744e8af LW |
98 | /** |
99 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
d340351f | 100 | * @pctldev: the associated pin controller device |
2744e8af | 101 | * @pin: the pin number in the global pin space |
3cc70ed3 SW |
102 | * @owner: a representation of the owner of this pin; typically the device |
103 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
104 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
105 | * single GPIO pin | |
106 | */ | |
107 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 108 | int pin, const char *owner, |
2744e8af LW |
109 | struct pinctrl_gpio_range *gpio_range) |
110 | { | |
111 | struct pin_desc *desc; | |
112 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
113 | int status = -EINVAL; | |
114 | ||
2744e8af LW |
115 | desc = pin_desc_get(pctldev, pin); |
116 | if (desc == NULL) { | |
51cd24ee | 117 | dev_err(pctldev->dev, |
d4705316 SW |
118 | "pin %d is not registered so it cannot be requested\n", |
119 | pin); | |
2744e8af LW |
120 | goto out; |
121 | } | |
122 | ||
d0bd8df5 DA |
123 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
124 | pin, desc->name, owner); | |
125 | ||
b1eb8fab VZ |
126 | if ((!gpio_range || ops->strict) && |
127 | desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
128 | dev_err(pctldev->dev, | |
129 | "pin %s already requested by %s; cannot claim for %s\n", | |
130 | desc->name, desc->mux_owner, owner); | |
131 | goto out; | |
132 | } | |
133 | ||
134 | if ((gpio_range || ops->strict) && desc->gpio_owner) { | |
135 | dev_err(pctldev->dev, | |
136 | "pin %s already requested by %s; cannot claim for %s\n", | |
137 | desc->name, desc->gpio_owner, owner); | |
138 | goto out; | |
139 | } | |
0e3db173 | 140 | |
b1eb8fab | 141 | if (gpio_range) { |
652162d4 SW |
142 | desc->gpio_owner = owner; |
143 | } else { | |
652162d4 SW |
144 | desc->mux_usecount++; |
145 | if (desc->mux_usecount > 1) | |
146 | return 0; | |
147 | ||
148 | desc->mux_owner = owner; | |
149 | } | |
2744e8af LW |
150 | |
151 | /* Let each pin increase references to this module */ | |
152 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 153 | dev_err(pctldev->dev, |
2744e8af LW |
154 | "could not increase module refcount for pin %d\n", |
155 | pin); | |
156 | status = -EINVAL; | |
157 | goto out_free_pin; | |
158 | } | |
159 | ||
160 | /* | |
161 | * If there is no kind of request function for the pin we just assume | |
162 | * we got it by default and proceed. | |
163 | */ | |
3712a3c4 | 164 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
165 | /* This requests and enables a single GPIO pin */ |
166 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
167 | else if (ops->request) | |
168 | status = ops->request(pctldev, pin); | |
169 | else | |
170 | status = 0; | |
171 | ||
0e3db173 | 172 | if (status) { |
d4705316 | 173 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
174 | module_put(pctldev->owner); |
175 | } | |
176 | ||
2744e8af | 177 | out_free_pin: |
0e3db173 | 178 | if (status) { |
652162d4 SW |
179 | if (gpio_range) { |
180 | desc->gpio_owner = NULL; | |
181 | } else { | |
182 | desc->mux_usecount--; | |
183 | if (!desc->mux_usecount) | |
184 | desc->mux_owner = NULL; | |
185 | } | |
0e3db173 | 186 | } |
2744e8af LW |
187 | out: |
188 | if (status) | |
51cd24ee | 189 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 190 | pin, owner, status); |
2744e8af LW |
191 | |
192 | return status; | |
193 | } | |
194 | ||
195 | /** | |
196 | * pin_free() - release a single muxed in pin so something else can be muxed | |
197 | * @pctldev: pin controller device handling this pin | |
198 | * @pin: the pin to free | |
3712a3c4 SW |
199 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
200 | * single GPIO pin | |
336cdba0 | 201 | * |
3cc70ed3 SW |
202 | * This function returns a pointer to the previous owner. This is used |
203 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 204 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 205 | */ |
3712a3c4 SW |
206 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
207 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
208 | { |
209 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
210 | struct pin_desc *desc; | |
3cc70ed3 | 211 | const char *owner; |
2744e8af LW |
212 | |
213 | desc = pin_desc_get(pctldev, pin); | |
214 | if (desc == NULL) { | |
51cd24ee | 215 | dev_err(pctldev->dev, |
2744e8af | 216 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 217 | return NULL; |
2744e8af LW |
218 | } |
219 | ||
652162d4 | 220 | if (!gpio_range) { |
740924a2 RG |
221 | /* |
222 | * A pin should not be freed more times than allocated. | |
223 | */ | |
224 | if (WARN_ON(!desc->mux_usecount)) | |
225 | return NULL; | |
652162d4 SW |
226 | desc->mux_usecount--; |
227 | if (desc->mux_usecount) | |
228 | return NULL; | |
229 | } | |
0e3db173 | 230 | |
3712a3c4 SW |
231 | /* |
232 | * If there is no kind of request function for the pin we just assume | |
233 | * we got it by default and proceed. | |
234 | */ | |
235 | if (gpio_range && ops->gpio_disable_free) | |
236 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
237 | else if (ops->free) | |
2744e8af LW |
238 | ops->free(pctldev, pin); |
239 | ||
652162d4 SW |
240 | if (gpio_range) { |
241 | owner = desc->gpio_owner; | |
242 | desc->gpio_owner = NULL; | |
243 | } else { | |
244 | owner = desc->mux_owner; | |
245 | desc->mux_owner = NULL; | |
246 | desc->mux_setting = NULL; | |
247 | } | |
248 | ||
2744e8af | 249 | module_put(pctldev->owner); |
3712a3c4 | 250 | |
3cc70ed3 | 251 | return owner; |
2744e8af LW |
252 | } |
253 | ||
254 | /** | |
befe5bdf LW |
255 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
256 | * @pctldev: pin controller device affected | |
257 | * @pin: the pin to mux in for GPIO | |
258 | * @range: the applicable GPIO range | |
d340351f | 259 | * @gpio: number of requested GPIO |
2744e8af | 260 | */ |
befe5bdf LW |
261 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
262 | struct pinctrl_gpio_range *range, | |
263 | unsigned pin, unsigned gpio) | |
2744e8af | 264 | { |
3cc70ed3 | 265 | const char *owner; |
2744e8af | 266 | int ret; |
2744e8af LW |
267 | |
268 | /* Conjure some name stating what chip and pin this is taken by */ | |
23a895ae | 269 | owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); |
3cc70ed3 | 270 | if (!owner) |
1fb1f054 | 271 | return -ENOMEM; |
5d2eaf80 | 272 | |
3cc70ed3 | 273 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 274 | if (ret < 0) |
3cc70ed3 | 275 | kfree(owner); |
5d2eaf80 SW |
276 | |
277 | return ret; | |
2744e8af | 278 | } |
2744e8af LW |
279 | |
280 | /** | |
befe5bdf LW |
281 | * pinmux_free_gpio() - release a pin from GPIO muxing |
282 | * @pctldev: the pin controller device for the pin | |
283 | * @pin: the affected currently GPIO-muxed in pin | |
284 | * @range: applicable GPIO range | |
2744e8af | 285 | */ |
befe5bdf LW |
286 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
287 | struct pinctrl_gpio_range *range) | |
2744e8af | 288 | { |
3cc70ed3 | 289 | const char *owner; |
2744e8af | 290 | |
3cc70ed3 SW |
291 | owner = pin_free(pctldev, pin, range); |
292 | kfree(owner); | |
2744e8af | 293 | } |
2744e8af | 294 | |
befe5bdf LW |
295 | /** |
296 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
297 | * @pctldev: the pin controller handling this pin | |
298 | * @range: applicable GPIO range | |
299 | * @pin: the affected GPIO pin in this controller | |
300 | * @input: true if we set the pin as input, false for output | |
301 | */ | |
302 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
303 | struct pinctrl_gpio_range *range, | |
304 | unsigned pin, bool input) | |
542e704f | 305 | { |
542e704f LW |
306 | const struct pinmux_ops *ops; |
307 | int ret; | |
542e704f LW |
308 | |
309 | ops = pctldev->desc->pmxops; | |
310 | ||
542e704f LW |
311 | if (ops->gpio_set_direction) |
312 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
313 | else | |
314 | ret = 0; | |
315 | ||
316 | return ret; | |
317 | } | |
318 | ||
7ecdb16f SW |
319 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
320 | const char *function) | |
2744e8af LW |
321 | { |
322 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 323 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
324 | unsigned selector = 0; |
325 | ||
326 | /* See if this pctldev has this function */ | |
d1e90e9e | 327 | while (selector < nfuncs) { |
163dc9f3 | 328 | const char *fname = ops->get_function_name(pctldev, selector); |
2744e8af | 329 | |
7ecdb16f SW |
330 | if (!strcmp(function, fname)) |
331 | return selector; | |
2744e8af | 332 | |
2744e8af LW |
333 | selector++; |
334 | } | |
335 | ||
2744e8af LW |
336 | return -EINVAL; |
337 | } | |
338 | ||
3f713b7c | 339 | int pinmux_map_to_setting(const struct pinctrl_map *map, |
7ecdb16f | 340 | struct pinctrl_setting *setting) |
2744e8af | 341 | { |
7ecdb16f SW |
342 | struct pinctrl_dev *pctldev = setting->pctldev; |
343 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
7ecdb16f SW |
344 | char const * const *groups; |
345 | unsigned num_groups; | |
2744e8af | 346 | int ret; |
7ecdb16f | 347 | const char *group; |
2744e8af | 348 | |
ad8bb720 DA |
349 | if (!pmxops) { |
350 | dev_err(pctldev->dev, "does not support mux function\n"); | |
351 | return -EINVAL; | |
352 | } | |
353 | ||
15f70e1b | 354 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
355 | if (ret < 0) { |
356 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
357 | map->data.mux.function); | |
15f70e1b | 358 | return ret; |
ad6e1107 | 359 | } |
15f70e1b | 360 | setting->data.mux.func = ret; |
2744e8af | 361 | |
1e2082b5 | 362 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 363 | &groups, &num_groups); |
ad6e1107 JC |
364 | if (ret < 0) { |
365 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
366 | map->data.mux.function); | |
7ecdb16f | 367 | return ret; |
ad6e1107 JC |
368 | } |
369 | if (!num_groups) { | |
370 | dev_err(pctldev->dev, | |
371 | "function %s can't be selected on any group\n", | |
372 | map->data.mux.function); | |
2744e8af | 373 | return -EINVAL; |
ad6e1107 | 374 | } |
1e2082b5 | 375 | if (map->data.mux.group) { |
1e2082b5 | 376 | group = map->data.mux.group; |
dff43594 AS |
377 | ret = match_string(groups, num_groups, group); |
378 | if (ret < 0) { | |
ad6e1107 JC |
379 | dev_err(pctldev->dev, |
380 | "invalid group \"%s\" for function \"%s\"\n", | |
381 | group, map->data.mux.function); | |
dff43594 | 382 | return ret; |
ad6e1107 | 383 | } |
7ecdb16f SW |
384 | } else { |
385 | group = groups[0]; | |
2744e8af | 386 | } |
2744e8af | 387 | |
15f70e1b | 388 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
389 | if (ret < 0) { |
390 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
391 | map->data.mux.group); | |
15f70e1b | 392 | return ret; |
ad6e1107 | 393 | } |
15f70e1b | 394 | setting->data.mux.group = ret; |
2744e8af | 395 | |
2744e8af LW |
396 | return 0; |
397 | } | |
398 | ||
3f713b7c | 399 | void pinmux_free_setting(const struct pinctrl_setting *setting) |
2744e8af | 400 | { |
1a78958d | 401 | /* This function is currently unused */ |
2744e8af | 402 | } |
2744e8af | 403 | |
3f713b7c | 404 | int pinmux_enable_setting(const struct pinctrl_setting *setting) |
2744e8af | 405 | { |
7ecdb16f | 406 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 407 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 408 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
e5b3b2d9 AT |
409 | int ret = 0; |
410 | const unsigned *pins = NULL; | |
411 | unsigned num_pins = 0; | |
ba110d90 SW |
412 | int i; |
413 | struct pin_desc *desc; | |
414 | ||
e5b3b2d9 AT |
415 | if (pctlops->get_group_pins) |
416 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
417 | &pins, &num_pins); | |
418 | ||
ba110d90 | 419 | if (ret) { |
1c8e7944 LW |
420 | const char *gname; |
421 | ||
ba110d90 | 422 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
423 | gname = pctlops->get_group_name(pctldev, |
424 | setting->data.mux.group); | |
ba110d90 | 425 | dev_warn(pctldev->dev, |
1c8e7944 LW |
426 | "could not get pins for group %s\n", |
427 | gname); | |
ba110d90 SW |
428 | num_pins = 0; |
429 | } | |
430 | ||
1a78958d LW |
431 | /* Try to allocate all pins in this group, one by one */ |
432 | for (i = 0; i < num_pins; i++) { | |
433 | ret = pin_request(pctldev, pins[i], setting->dev_name, NULL); | |
434 | if (ret) { | |
1c8e7944 LW |
435 | const char *gname; |
436 | const char *pname; | |
437 | ||
438 | desc = pin_desc_get(pctldev, pins[i]); | |
439 | pname = desc ? desc->name : "non-existing"; | |
440 | gname = pctlops->get_group_name(pctldev, | |
441 | setting->data.mux.group); | |
1a78958d | 442 | dev_err(pctldev->dev, |
1c8e7944 LW |
443 | "could not request pin %d (%s) from group %s " |
444 | " on device %s\n", | |
445 | pins[i], pname, gname, | |
446 | pinctrl_dev_get_name(pctldev)); | |
e38d457d | 447 | goto err_pin_request; |
1a78958d LW |
448 | } |
449 | } | |
450 | ||
451 | /* Now that we have acquired the pins, encode the mux setting */ | |
ba110d90 SW |
452 | for (i = 0; i < num_pins; i++) { |
453 | desc = pin_desc_get(pctldev, pins[i]); | |
454 | if (desc == NULL) { | |
455 | dev_warn(pctldev->dev, | |
456 | "could not get pin desc for pin %d\n", | |
457 | pins[i]); | |
458 | continue; | |
459 | } | |
460 | desc->mux_setting = &(setting->data.mux); | |
461 | } | |
2744e8af | 462 | |
03e9f0ca LW |
463 | ret = ops->set_mux(pctldev, setting->data.mux.func, |
464 | setting->data.mux.group); | |
e38d457d AL |
465 | |
466 | if (ret) | |
03e9f0ca | 467 | goto err_set_mux; |
e38d457d AL |
468 | |
469 | return 0; | |
470 | ||
03e9f0ca | 471 | err_set_mux: |
e38d457d AL |
472 | for (i = 0; i < num_pins; i++) { |
473 | desc = pin_desc_get(pctldev, pins[i]); | |
474 | if (desc) | |
475 | desc->mux_setting = NULL; | |
476 | } | |
477 | err_pin_request: | |
478 | /* On error release all taken pins */ | |
479 | while (--i >= 0) | |
480 | pin_free(pctldev, pins[i], NULL); | |
481 | ||
482 | return ret; | |
2744e8af | 483 | } |
2744e8af | 484 | |
3f713b7c | 485 | void pinmux_disable_setting(const struct pinctrl_setting *setting) |
2744e8af | 486 | { |
7ecdb16f | 487 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 488 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
e5b3b2d9 AT |
489 | int ret = 0; |
490 | const unsigned *pins = NULL; | |
491 | unsigned num_pins = 0; | |
ba110d90 SW |
492 | int i; |
493 | struct pin_desc *desc; | |
494 | ||
e5b3b2d9 AT |
495 | if (pctlops->get_group_pins) |
496 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
497 | &pins, &num_pins); | |
ba110d90 | 498 | if (ret) { |
1c8e7944 LW |
499 | const char *gname; |
500 | ||
ba110d90 | 501 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
502 | gname = pctlops->get_group_name(pctldev, |
503 | setting->data.mux.group); | |
ba110d90 | 504 | dev_warn(pctldev->dev, |
1c8e7944 LW |
505 | "could not get pins for group %s\n", |
506 | gname); | |
ba110d90 SW |
507 | num_pins = 0; |
508 | } | |
509 | ||
1a78958d | 510 | /* Flag the descs that no setting is active */ |
ba110d90 SW |
511 | for (i = 0; i < num_pins; i++) { |
512 | desc = pin_desc_get(pctldev, pins[i]); | |
513 | if (desc == NULL) { | |
514 | dev_warn(pctldev->dev, | |
515 | "could not get pin desc for pin %d\n", | |
516 | pins[i]); | |
517 | continue; | |
518 | } | |
744f0a9a | 519 | if (desc->mux_setting == &(setting->data.mux)) { |
744f0a9a | 520 | pin_free(pctldev, pins[i], NULL); |
1c8e7944 LW |
521 | } else { |
522 | const char *gname; | |
1c8e7944 | 523 | |
1c8e7944 LW |
524 | gname = pctlops->get_group_name(pctldev, |
525 | setting->data.mux.group); | |
526 | dev_warn(pctldev->dev, | |
527 | "not freeing pin %d (%s) as part of " | |
528 | "deactivating group %s - it is already " | |
529 | "used for some other setting", | |
808e657c | 530 | pins[i], desc->name, gname); |
744f0a9a | 531 | } |
ba110d90 | 532 | } |
2744e8af | 533 | } |
2744e8af | 534 | |
2744e8af LW |
535 | #ifdef CONFIG_DEBUG_FS |
536 | ||
537 | /* Called from pincontrol core */ | |
538 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
539 | { | |
540 | struct pinctrl_dev *pctldev = s->private; | |
541 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 542 | unsigned nfuncs; |
2744e8af LW |
543 | unsigned func_selector = 0; |
544 | ||
ad8bb720 DA |
545 | if (!pmxops) |
546 | return 0; | |
57b676f9 | 547 | |
42fed7ba | 548 | mutex_lock(&pctldev->mutex); |
ad8bb720 | 549 | nfuncs = pmxops->get_functions_count(pctldev); |
d1e90e9e | 550 | while (func_selector < nfuncs) { |
2744e8af LW |
551 | const char *func = pmxops->get_function_name(pctldev, |
552 | func_selector); | |
553 | const char * const *groups; | |
554 | unsigned num_groups; | |
555 | int ret; | |
556 | int i; | |
557 | ||
558 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
559 | &groups, &num_groups); | |
9d7ebbbf | 560 | if (ret) { |
2744e8af LW |
561 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", |
562 | func); | |
9d7ebbbf LD |
563 | func_selector++; |
564 | continue; | |
565 | } | |
2744e8af LW |
566 | |
567 | seq_printf(s, "function: %s, groups = [ ", func); | |
568 | for (i = 0; i < num_groups; i++) | |
569 | seq_printf(s, "%s ", groups[i]); | |
570 | seq_puts(s, "]\n"); | |
571 | ||
572 | func_selector++; | |
2744e8af LW |
573 | } |
574 | ||
42fed7ba | 575 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 576 | |
2744e8af LW |
577 | return 0; |
578 | } | |
579 | ||
580 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
581 | { | |
582 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
583 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
584 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 585 | unsigned i, pin; |
2744e8af | 586 | |
ad8bb720 DA |
587 | if (!pmxops) |
588 | return 0; | |
589 | ||
2744e8af | 590 | seq_puts(s, "Pinmux settings per pin\n"); |
81508855 LW |
591 | if (pmxops->strict) |
592 | seq_puts(s, | |
593 | "Format: pin (name): mux_owner|gpio_owner (strict) hog?\n"); | |
594 | else | |
595 | seq_puts(s, | |
596 | "Format: pin (name): mux_owner gpio_owner hog?\n"); | |
2744e8af | 597 | |
42fed7ba | 598 | mutex_lock(&pctldev->mutex); |
57b676f9 | 599 | |
706e8520 CP |
600 | /* The pin number can be retrived from the pin controller descriptor */ |
601 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 602 | struct pin_desc *desc; |
1cf94c45 | 603 | bool is_hog = false; |
2744e8af | 604 | |
706e8520 | 605 | pin = pctldev->desc->pins[i].number; |
2744e8af | 606 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 607 | /* Skip if we cannot search the pin */ |
2744e8af LW |
608 | if (desc == NULL) |
609 | continue; | |
610 | ||
652162d4 SW |
611 | if (desc->mux_owner && |
612 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
613 | is_hog = true; |
614 | ||
81508855 LW |
615 | if (pmxops->strict) { |
616 | if (desc->mux_owner) | |
617 | seq_printf(s, "pin %d (%s): device %s%s", | |
cf9d994d | 618 | pin, desc->name, desc->mux_owner, |
81508855 LW |
619 | is_hog ? " (HOG)" : ""); |
620 | else if (desc->gpio_owner) | |
621 | seq_printf(s, "pin %d (%s): GPIO %s", | |
cf9d994d | 622 | pin, desc->name, desc->gpio_owner); |
81508855 LW |
623 | else |
624 | seq_printf(s, "pin %d (%s): UNCLAIMED", | |
cf9d994d | 625 | pin, desc->name); |
81508855 LW |
626 | } else { |
627 | /* For non-strict controllers */ | |
cf9d994d | 628 | seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name, |
81508855 LW |
629 | desc->mux_owner ? desc->mux_owner |
630 | : "(MUX UNCLAIMED)", | |
631 | desc->gpio_owner ? desc->gpio_owner | |
632 | : "(GPIO UNCLAIMED)", | |
633 | is_hog ? " (HOG)" : ""); | |
634 | } | |
ba110d90 | 635 | |
81508855 | 636 | /* If mux: print function+group claiming the pin */ |
ba110d90 SW |
637 | if (desc->mux_setting) |
638 | seq_printf(s, " function %s group %s\n", | |
639 | pmxops->get_function_name(pctldev, | |
640 | desc->mux_setting->func), | |
641 | pctlops->get_group_name(pctldev, | |
642 | desc->mux_setting->group)); | |
643 | else | |
ffd10c2e | 644 | seq_putc(s, '\n'); |
2744e8af LW |
645 | } |
646 | ||
42fed7ba | 647 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 648 | |
2744e8af LW |
649 | return 0; |
650 | } | |
651 | ||
3f713b7c | 652 | void pinmux_show_map(struct seq_file *s, const struct pinctrl_map *map) |
1e2082b5 SW |
653 | { |
654 | seq_printf(s, "group %s\nfunction %s\n", | |
655 | map->data.mux.group ? map->data.mux.group : "(default)", | |
656 | map->data.mux.function); | |
657 | } | |
658 | ||
659 | void pinmux_show_setting(struct seq_file *s, | |
3f713b7c | 660 | const struct pinctrl_setting *setting) |
2744e8af | 661 | { |
7ecdb16f SW |
662 | struct pinctrl_dev *pctldev = setting->pctldev; |
663 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
664 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
665 | ||
1e2082b5 SW |
666 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
667 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
668 | setting->data.mux.group, | |
669 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
670 | setting->data.mux.func); | |
2744e8af LW |
671 | } |
672 | ||
0819dc72 YL |
673 | DEFINE_SHOW_ATTRIBUTE(pinmux_functions); |
674 | DEFINE_SHOW_ATTRIBUTE(pinmux_pins); | |
2744e8af | 675 | |
2744e8af LW |
676 | void pinmux_init_device_debugfs(struct dentry *devroot, |
677 | struct pinctrl_dev *pctldev) | |
678 | { | |
679 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
0819dc72 | 680 | devroot, pctldev, &pinmux_functions_fops); |
2744e8af | 681 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, |
0819dc72 | 682 | devroot, pctldev, &pinmux_pins_fops); |
2744e8af LW |
683 | } |
684 | ||
685 | #endif /* CONFIG_DEBUG_FS */ | |
a76edc89 TL |
686 | |
687 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
688 | ||
689 | /** | |
690 | * pinmux_generic_get_function_count() - returns number of functions | |
691 | * @pctldev: pin controller device | |
692 | */ | |
693 | int pinmux_generic_get_function_count(struct pinctrl_dev *pctldev) | |
694 | { | |
695 | return pctldev->num_functions; | |
696 | } | |
697 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_count); | |
698 | ||
699 | /** | |
700 | * pinmux_generic_get_function_name() - returns the function name | |
701 | * @pctldev: pin controller device | |
702 | * @selector: function number | |
703 | */ | |
704 | const char * | |
705 | pinmux_generic_get_function_name(struct pinctrl_dev *pctldev, | |
706 | unsigned int selector) | |
707 | { | |
708 | struct function_desc *function; | |
709 | ||
710 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
711 | selector); | |
712 | if (!function) | |
713 | return NULL; | |
714 | ||
715 | return function->name; | |
716 | } | |
717 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_name); | |
718 | ||
719 | /** | |
720 | * pinmux_generic_get_function_groups() - gets the function groups | |
721 | * @pctldev: pin controller device | |
722 | * @selector: function number | |
723 | * @groups: array of pin groups | |
724 | * @num_groups: number of pin groups | |
725 | */ | |
726 | int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, | |
727 | unsigned int selector, | |
728 | const char * const **groups, | |
729 | unsigned * const num_groups) | |
730 | { | |
731 | struct function_desc *function; | |
732 | ||
733 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
734 | selector); | |
735 | if (!function) { | |
736 | dev_err(pctldev->dev, "%s could not find function%i\n", | |
737 | __func__, selector); | |
738 | return -EINVAL; | |
739 | } | |
740 | *groups = function->group_names; | |
741 | *num_groups = function->num_group_names; | |
742 | ||
743 | return 0; | |
744 | } | |
745 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function_groups); | |
746 | ||
747 | /** | |
748 | * pinmux_generic_get_function() - returns a function based on the number | |
749 | * @pctldev: pin controller device | |
d340351f | 750 | * @selector: function number |
a76edc89 TL |
751 | */ |
752 | struct function_desc *pinmux_generic_get_function(struct pinctrl_dev *pctldev, | |
753 | unsigned int selector) | |
754 | { | |
755 | struct function_desc *function; | |
756 | ||
757 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
758 | selector); | |
759 | if (!function) | |
760 | return NULL; | |
761 | ||
762 | return function; | |
763 | } | |
764 | EXPORT_SYMBOL_GPL(pinmux_generic_get_function); | |
765 | ||
766 | /** | |
6bffa7e1 | 767 | * pinmux_generic_add_function() - adds a function group |
a76edc89 TL |
768 | * @pctldev: pin controller device |
769 | * @name: name of the function | |
770 | * @groups: array of pin groups | |
771 | * @num_groups: number of pin groups | |
772 | * @data: pin controller driver specific data | |
773 | */ | |
774 | int pinmux_generic_add_function(struct pinctrl_dev *pctldev, | |
775 | const char *name, | |
776 | const char **groups, | |
777 | const unsigned int num_groups, | |
778 | void *data) | |
779 | { | |
780 | struct function_desc *function; | |
f913cfce TL |
781 | int selector; |
782 | ||
783 | if (!name) | |
784 | return -EINVAL; | |
785 | ||
786 | selector = pinmux_func_name_to_selector(pctldev, name); | |
787 | if (selector >= 0) | |
788 | return selector; | |
789 | ||
790 | selector = pctldev->num_functions; | |
a76edc89 TL |
791 | |
792 | function = devm_kzalloc(pctldev->dev, sizeof(*function), GFP_KERNEL); | |
793 | if (!function) | |
794 | return -ENOMEM; | |
795 | ||
796 | function->name = name; | |
797 | function->group_names = groups; | |
798 | function->num_group_names = num_groups; | |
799 | function->data = data; | |
800 | ||
f913cfce | 801 | radix_tree_insert(&pctldev->pin_function_tree, selector, function); |
a76edc89 TL |
802 | |
803 | pctldev->num_functions++; | |
804 | ||
f913cfce | 805 | return selector; |
a76edc89 TL |
806 | } |
807 | EXPORT_SYMBOL_GPL(pinmux_generic_add_function); | |
808 | ||
809 | /** | |
810 | * pinmux_generic_remove_function() - removes a numbered function | |
811 | * @pctldev: pin controller device | |
812 | * @selector: function number | |
813 | * | |
814 | * Note that the caller must take care of locking. | |
815 | */ | |
816 | int pinmux_generic_remove_function(struct pinctrl_dev *pctldev, | |
817 | unsigned int selector) | |
818 | { | |
819 | struct function_desc *function; | |
820 | ||
821 | function = radix_tree_lookup(&pctldev->pin_function_tree, | |
822 | selector); | |
823 | if (!function) | |
824 | return -ENOENT; | |
825 | ||
826 | radix_tree_delete(&pctldev->pin_function_tree, selector); | |
827 | devm_kfree(pctldev->dev, function); | |
828 | ||
829 | pctldev->num_functions--; | |
830 | ||
831 | return 0; | |
832 | } | |
833 | EXPORT_SYMBOL_GPL(pinmux_generic_remove_function); | |
834 | ||
835 | /** | |
836 | * pinmux_generic_free_functions() - removes all functions | |
837 | * @pctldev: pin controller device | |
838 | * | |
664b7c47 TL |
839 | * Note that the caller must take care of locking. The pinctrl |
840 | * functions are allocated with devm_kzalloc() so no need to free | |
841 | * them here. | |
a76edc89 TL |
842 | */ |
843 | void pinmux_generic_free_functions(struct pinctrl_dev *pctldev) | |
844 | { | |
845 | struct radix_tree_iter iter; | |
906a2a39 | 846 | void __rcu **slot; |
a76edc89 TL |
847 | |
848 | radix_tree_for_each_slot(slot, &pctldev->pin_function_tree, &iter, 0) | |
664b7c47 | 849 | radix_tree_delete(&pctldev->pin_function_tree, iter.index); |
a76edc89 TL |
850 | |
851 | pctldev->num_functions = 0; | |
852 | } | |
853 | ||
854 | #endif /* CONFIG_GENERIC_PINMUX_FUNCTIONS */ |