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CommitLineData
2744e8af
LW
1/*
2 * Core driver for the pin muxing portions of the pin control subsystem
3 *
e93bcee0 4 * Copyright (C) 2011-2012 ST-Ericsson SA
2744e8af
LW
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
7ecdb16f
SW
10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
2744e8af
LW
12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinmux core: " fmt
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/slab.h>
21#include <linux/radix-tree.h>
22#include <linux/err.h>
23#include <linux/list.h>
97607d15 24#include <linux/string.h>
2744e8af
LW
25#include <linux/sysfs.h>
26#include <linux/debugfs.h>
27#include <linux/seq_file.h>
28#include <linux/pinctrl/machine.h>
29#include <linux/pinctrl/pinmux.h>
30#include "core.h"
befe5bdf 31#include "pinmux.h"
2744e8af 32
03665e0f
SW
33int pinmux_check_ops(struct pinctrl_dev *pctldev)
34{
35 const struct pinmux_ops *ops = pctldev->desc->pmxops;
a1d31f71 36 unsigned nfuncs;
03665e0f
SW
37 unsigned selector = 0;
38
39 /* Check that we implement required operations */
a1d31f71
DA
40 if (!ops ||
41 !ops->get_functions_count ||
03665e0f
SW
42 !ops->get_function_name ||
43 !ops->get_function_groups ||
03e9f0ca 44 !ops->set_mux) {
ad6e1107 45 dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n");
03665e0f 46 return -EINVAL;
ad6e1107 47 }
03665e0f 48 /* Check that all functions registered have names */
a1d31f71 49 nfuncs = ops->get_functions_count(pctldev);
d1e90e9e 50 while (selector < nfuncs) {
03665e0f
SW
51 const char *fname = ops->get_function_name(pctldev,
52 selector);
53 if (!fname) {
a1d31f71 54 dev_err(pctldev->dev, "pinmux ops has no name for function%u\n",
03665e0f
SW
55 selector);
56 return -EINVAL;
57 }
58 selector++;
59 }
60
61 return 0;
62}
63
1e2082b5
SW
64int pinmux_validate_map(struct pinctrl_map const *map, int i)
65{
66 if (!map->data.mux.function) {
67 pr_err("failed to register map %s (%d): no function given\n",
68 map->name, i);
69 return -EINVAL;
70 }
71
72 return 0;
73}
74
2744e8af
LW
75/**
76 * pin_request() - request a single pin to be muxed in, typically for GPIO
77 * @pin: the pin number in the global pin space
3cc70ed3
SW
78 * @owner: a representation of the owner of this pin; typically the device
79 * name that controls its mux function, or the requested GPIO name
2744e8af
LW
80 * @gpio_range: the range matching the GPIO pin if this is a request for a
81 * single GPIO pin
82 */
83static int pin_request(struct pinctrl_dev *pctldev,
3cc70ed3 84 int pin, const char *owner,
2744e8af
LW
85 struct pinctrl_gpio_range *gpio_range)
86{
87 struct pin_desc *desc;
88 const struct pinmux_ops *ops = pctldev->desc->pmxops;
89 int status = -EINVAL;
90
2744e8af
LW
91 desc = pin_desc_get(pctldev, pin);
92 if (desc == NULL) {
51cd24ee 93 dev_err(pctldev->dev,
d4705316
SW
94 "pin %d is not registered so it cannot be requested\n",
95 pin);
2744e8af
LW
96 goto out;
97 }
98
d0bd8df5
DA
99 dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n",
100 pin, desc->name, owner);
101
652162d4
SW
102 if (gpio_range) {
103 /* There's no need to support multiple GPIO requests */
104 if (desc->gpio_owner) {
105 dev_err(pctldev->dev,
d4705316
SW
106 "pin %s already requested by %s; cannot claim for %s\n",
107 desc->name, desc->gpio_owner, owner);
652162d4
SW
108 goto out;
109 }
8c4c2016 110 if (ops->strict && desc->mux_usecount &&
fa76a3db
SZ
111 strcmp(desc->mux_owner, owner)) {
112 dev_err(pctldev->dev,
113 "pin %s already requested by %s; cannot claim for %s\n",
114 desc->name, desc->mux_owner, owner);
115 goto out;
116 }
0e3db173 117
652162d4
SW
118 desc->gpio_owner = owner;
119 } else {
120 if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
121 dev_err(pctldev->dev,
d4705316
SW
122 "pin %s already requested by %s; cannot claim for %s\n",
123 desc->name, desc->mux_owner, owner);
652162d4
SW
124 goto out;
125 }
8c4c2016 126 if (ops->strict && desc->gpio_owner) {
fa76a3db
SZ
127 dev_err(pctldev->dev,
128 "pin %s already requested by %s; cannot claim for %s\n",
129 desc->name, desc->gpio_owner, owner);
130 goto out;
131 }
0e3db173 132
652162d4
SW
133 desc->mux_usecount++;
134 if (desc->mux_usecount > 1)
135 return 0;
136
137 desc->mux_owner = owner;
138 }
2744e8af
LW
139
140 /* Let each pin increase references to this module */
141 if (!try_module_get(pctldev->owner)) {
51cd24ee 142 dev_err(pctldev->dev,
2744e8af
LW
143 "could not increase module refcount for pin %d\n",
144 pin);
145 status = -EINVAL;
146 goto out_free_pin;
147 }
148
149 /*
150 * If there is no kind of request function for the pin we just assume
151 * we got it by default and proceed.
152 */
3712a3c4 153 if (gpio_range && ops->gpio_request_enable)
2744e8af
LW
154 /* This requests and enables a single GPIO pin */
155 status = ops->gpio_request_enable(pctldev, gpio_range, pin);
156 else if (ops->request)
157 status = ops->request(pctldev, pin);
158 else
159 status = 0;
160
0e3db173 161 if (status) {
d4705316 162 dev_err(pctldev->dev, "request() failed for pin %d\n", pin);
0e3db173
SW
163 module_put(pctldev->owner);
164 }
165
2744e8af 166out_free_pin:
0e3db173 167 if (status) {
652162d4
SW
168 if (gpio_range) {
169 desc->gpio_owner = NULL;
170 } else {
171 desc->mux_usecount--;
172 if (!desc->mux_usecount)
173 desc->mux_owner = NULL;
174 }
0e3db173 175 }
2744e8af
LW
176out:
177 if (status)
51cd24ee 178 dev_err(pctldev->dev, "pin-%d (%s) status %d\n",
d4705316 179 pin, owner, status);
2744e8af
LW
180
181 return status;
182}
183
184/**
185 * pin_free() - release a single muxed in pin so something else can be muxed
186 * @pctldev: pin controller device handling this pin
187 * @pin: the pin to free
3712a3c4
SW
188 * @gpio_range: the range matching the GPIO pin if this is a request for a
189 * single GPIO pin
336cdba0 190 *
3cc70ed3
SW
191 * This function returns a pointer to the previous owner. This is used
192 * for callers that dynamically allocate an owner name so it can be freed
336cdba0 193 * once the pin is free. This is done for GPIO request functions.
2744e8af 194 */
3712a3c4
SW
195static const char *pin_free(struct pinctrl_dev *pctldev, int pin,
196 struct pinctrl_gpio_range *gpio_range)
2744e8af
LW
197{
198 const struct pinmux_ops *ops = pctldev->desc->pmxops;
199 struct pin_desc *desc;
3cc70ed3 200 const char *owner;
2744e8af
LW
201
202 desc = pin_desc_get(pctldev, pin);
203 if (desc == NULL) {
51cd24ee 204 dev_err(pctldev->dev,
2744e8af 205 "pin is not registered so it cannot be freed\n");
3712a3c4 206 return NULL;
2744e8af
LW
207 }
208
652162d4 209 if (!gpio_range) {
740924a2
RG
210 /*
211 * A pin should not be freed more times than allocated.
212 */
213 if (WARN_ON(!desc->mux_usecount))
214 return NULL;
652162d4
SW
215 desc->mux_usecount--;
216 if (desc->mux_usecount)
217 return NULL;
218 }
0e3db173 219
3712a3c4
SW
220 /*
221 * If there is no kind of request function for the pin we just assume
222 * we got it by default and proceed.
223 */
224 if (gpio_range && ops->gpio_disable_free)
225 ops->gpio_disable_free(pctldev, gpio_range, pin);
226 else if (ops->free)
2744e8af
LW
227 ops->free(pctldev, pin);
228
652162d4
SW
229 if (gpio_range) {
230 owner = desc->gpio_owner;
231 desc->gpio_owner = NULL;
232 } else {
233 owner = desc->mux_owner;
234 desc->mux_owner = NULL;
235 desc->mux_setting = NULL;
236 }
237
2744e8af 238 module_put(pctldev->owner);
3712a3c4 239
3cc70ed3 240 return owner;
2744e8af
LW
241}
242
243/**
befe5bdf
LW
244 * pinmux_request_gpio() - request pinmuxing for a GPIO pin
245 * @pctldev: pin controller device affected
246 * @pin: the pin to mux in for GPIO
247 * @range: the applicable GPIO range
2744e8af 248 */
befe5bdf
LW
249int pinmux_request_gpio(struct pinctrl_dev *pctldev,
250 struct pinctrl_gpio_range *range,
251 unsigned pin, unsigned gpio)
2744e8af 252{
3cc70ed3 253 const char *owner;
2744e8af 254 int ret;
2744e8af
LW
255
256 /* Conjure some name stating what chip and pin this is taken by */
23a895ae 257 owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio);
3cc70ed3 258 if (!owner)
1fb1f054 259 return -ENOMEM;
5d2eaf80 260
3cc70ed3 261 ret = pin_request(pctldev, pin, owner, range);
5d2eaf80 262 if (ret < 0)
3cc70ed3 263 kfree(owner);
5d2eaf80
SW
264
265 return ret;
2744e8af 266}
2744e8af
LW
267
268/**
befe5bdf
LW
269 * pinmux_free_gpio() - release a pin from GPIO muxing
270 * @pctldev: the pin controller device for the pin
271 * @pin: the affected currently GPIO-muxed in pin
272 * @range: applicable GPIO range
2744e8af 273 */
befe5bdf
LW
274void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin,
275 struct pinctrl_gpio_range *range)
2744e8af 276{
3cc70ed3 277 const char *owner;
2744e8af 278
3cc70ed3
SW
279 owner = pin_free(pctldev, pin, range);
280 kfree(owner);
2744e8af 281}
2744e8af 282
befe5bdf
LW
283/**
284 * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin
285 * @pctldev: the pin controller handling this pin
286 * @range: applicable GPIO range
287 * @pin: the affected GPIO pin in this controller
288 * @input: true if we set the pin as input, false for output
289 */
290int pinmux_gpio_direction(struct pinctrl_dev *pctldev,
291 struct pinctrl_gpio_range *range,
292 unsigned pin, bool input)
542e704f 293{
542e704f
LW
294 const struct pinmux_ops *ops;
295 int ret;
542e704f
LW
296
297 ops = pctldev->desc->pmxops;
298
542e704f
LW
299 if (ops->gpio_set_direction)
300 ret = ops->gpio_set_direction(pctldev, range, pin, input);
301 else
302 ret = 0;
303
304 return ret;
305}
306
7ecdb16f
SW
307static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev,
308 const char *function)
2744e8af
LW
309{
310 const struct pinmux_ops *ops = pctldev->desc->pmxops;
d1e90e9e 311 unsigned nfuncs = ops->get_functions_count(pctldev);
2744e8af
LW
312 unsigned selector = 0;
313
314 /* See if this pctldev has this function */
d1e90e9e 315 while (selector < nfuncs) {
163dc9f3 316 const char *fname = ops->get_function_name(pctldev, selector);
2744e8af 317
7ecdb16f
SW
318 if (!strcmp(function, fname))
319 return selector;
2744e8af 320
2744e8af
LW
321 selector++;
322 }
323
e3249570 324 dev_err(pctldev->dev, "function '%s' not supported\n", function);
2744e8af
LW
325 return -EINVAL;
326}
327
7ecdb16f
SW
328int pinmux_map_to_setting(struct pinctrl_map const *map,
329 struct pinctrl_setting *setting)
2744e8af 330{
7ecdb16f
SW
331 struct pinctrl_dev *pctldev = setting->pctldev;
332 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
7ecdb16f
SW
333 char const * const *groups;
334 unsigned num_groups;
2744e8af 335 int ret;
7ecdb16f 336 const char *group;
2744e8af 337
ad8bb720
DA
338 if (!pmxops) {
339 dev_err(pctldev->dev, "does not support mux function\n");
340 return -EINVAL;
341 }
342
15f70e1b 343 ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function);
ad6e1107
JC
344 if (ret < 0) {
345 dev_err(pctldev->dev, "invalid function %s in map table\n",
346 map->data.mux.function);
15f70e1b 347 return ret;
ad6e1107 348 }
15f70e1b 349 setting->data.mux.func = ret;
2744e8af 350
1e2082b5 351 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func,
7ecdb16f 352 &groups, &num_groups);
ad6e1107
JC
353 if (ret < 0) {
354 dev_err(pctldev->dev, "can't query groups for function %s\n",
355 map->data.mux.function);
7ecdb16f 356 return ret;
ad6e1107
JC
357 }
358 if (!num_groups) {
359 dev_err(pctldev->dev,
360 "function %s can't be selected on any group\n",
361 map->data.mux.function);
2744e8af 362 return -EINVAL;
ad6e1107 363 }
1e2082b5 364 if (map->data.mux.group) {
1e2082b5 365 group = map->data.mux.group;
dff43594
AS
366 ret = match_string(groups, num_groups, group);
367 if (ret < 0) {
ad6e1107
JC
368 dev_err(pctldev->dev,
369 "invalid group \"%s\" for function \"%s\"\n",
370 group, map->data.mux.function);
dff43594 371 return ret;
ad6e1107 372 }
7ecdb16f
SW
373 } else {
374 group = groups[0];
2744e8af 375 }
2744e8af 376
15f70e1b 377 ret = pinctrl_get_group_selector(pctldev, group);
ad6e1107
JC
378 if (ret < 0) {
379 dev_err(pctldev->dev, "invalid group %s in map table\n",
380 map->data.mux.group);
15f70e1b 381 return ret;
ad6e1107 382 }
15f70e1b 383 setting->data.mux.group = ret;
2744e8af 384
2744e8af
LW
385 return 0;
386}
387
7ecdb16f 388void pinmux_free_setting(struct pinctrl_setting const *setting)
2744e8af 389{
1a78958d 390 /* This function is currently unused */
2744e8af 391}
2744e8af 392
7ecdb16f 393int pinmux_enable_setting(struct pinctrl_setting const *setting)
2744e8af 394{
7ecdb16f 395 struct pinctrl_dev *pctldev = setting->pctldev;
ba110d90 396 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
befe5bdf 397 const struct pinmux_ops *ops = pctldev->desc->pmxops;
e5b3b2d9
AT
398 int ret = 0;
399 const unsigned *pins = NULL;
400 unsigned num_pins = 0;
ba110d90
SW
401 int i;
402 struct pin_desc *desc;
403
e5b3b2d9
AT
404 if (pctlops->get_group_pins)
405 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
406 &pins, &num_pins);
407
ba110d90 408 if (ret) {
1c8e7944
LW
409 const char *gname;
410
ba110d90 411 /* errors only affect debug data, so just warn */
1c8e7944
LW
412 gname = pctlops->get_group_name(pctldev,
413 setting->data.mux.group);
ba110d90 414 dev_warn(pctldev->dev,
1c8e7944
LW
415 "could not get pins for group %s\n",
416 gname);
ba110d90
SW
417 num_pins = 0;
418 }
419
1a78958d
LW
420 /* Try to allocate all pins in this group, one by one */
421 for (i = 0; i < num_pins; i++) {
422 ret = pin_request(pctldev, pins[i], setting->dev_name, NULL);
423 if (ret) {
1c8e7944
LW
424 const char *gname;
425 const char *pname;
426
427 desc = pin_desc_get(pctldev, pins[i]);
428 pname = desc ? desc->name : "non-existing";
429 gname = pctlops->get_group_name(pctldev,
430 setting->data.mux.group);
1a78958d 431 dev_err(pctldev->dev,
1c8e7944
LW
432 "could not request pin %d (%s) from group %s "
433 " on device %s\n",
434 pins[i], pname, gname,
435 pinctrl_dev_get_name(pctldev));
e38d457d 436 goto err_pin_request;
1a78958d
LW
437 }
438 }
439
440 /* Now that we have acquired the pins, encode the mux setting */
ba110d90
SW
441 for (i = 0; i < num_pins; i++) {
442 desc = pin_desc_get(pctldev, pins[i]);
443 if (desc == NULL) {
444 dev_warn(pctldev->dev,
445 "could not get pin desc for pin %d\n",
446 pins[i]);
447 continue;
448 }
449 desc->mux_setting = &(setting->data.mux);
450 }
2744e8af 451
03e9f0ca
LW
452 ret = ops->set_mux(pctldev, setting->data.mux.func,
453 setting->data.mux.group);
e38d457d
AL
454
455 if (ret)
03e9f0ca 456 goto err_set_mux;
e38d457d
AL
457
458 return 0;
459
03e9f0ca 460err_set_mux:
e38d457d
AL
461 for (i = 0; i < num_pins; i++) {
462 desc = pin_desc_get(pctldev, pins[i]);
463 if (desc)
464 desc->mux_setting = NULL;
465 }
466err_pin_request:
467 /* On error release all taken pins */
468 while (--i >= 0)
469 pin_free(pctldev, pins[i], NULL);
470
471 return ret;
2744e8af 472}
2744e8af 473
7ecdb16f 474void pinmux_disable_setting(struct pinctrl_setting const *setting)
2744e8af 475{
7ecdb16f 476 struct pinctrl_dev *pctldev = setting->pctldev;
ba110d90 477 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
e5b3b2d9
AT
478 int ret = 0;
479 const unsigned *pins = NULL;
480 unsigned num_pins = 0;
ba110d90
SW
481 int i;
482 struct pin_desc *desc;
483
e5b3b2d9
AT
484 if (pctlops->get_group_pins)
485 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
486 &pins, &num_pins);
ba110d90 487 if (ret) {
1c8e7944
LW
488 const char *gname;
489
ba110d90 490 /* errors only affect debug data, so just warn */
1c8e7944
LW
491 gname = pctlops->get_group_name(pctldev,
492 setting->data.mux.group);
ba110d90 493 dev_warn(pctldev->dev,
1c8e7944
LW
494 "could not get pins for group %s\n",
495 gname);
ba110d90
SW
496 num_pins = 0;
497 }
498
1a78958d 499 /* Flag the descs that no setting is active */
ba110d90
SW
500 for (i = 0; i < num_pins; i++) {
501 desc = pin_desc_get(pctldev, pins[i]);
502 if (desc == NULL) {
503 dev_warn(pctldev->dev,
504 "could not get pin desc for pin %d\n",
505 pins[i]);
506 continue;
507 }
744f0a9a
SZ
508 if (desc->mux_setting == &(setting->data.mux)) {
509 desc->mux_setting = NULL;
510 /* And release the pin */
511 pin_free(pctldev, pins[i], NULL);
1c8e7944
LW
512 } else {
513 const char *gname;
1c8e7944 514
1c8e7944
LW
515 gname = pctlops->get_group_name(pctldev,
516 setting->data.mux.group);
517 dev_warn(pctldev->dev,
518 "not freeing pin %d (%s) as part of "
519 "deactivating group %s - it is already "
520 "used for some other setting",
808e657c 521 pins[i], desc->name, gname);
744f0a9a 522 }
ba110d90 523 }
2744e8af 524}
2744e8af 525
2744e8af
LW
526#ifdef CONFIG_DEBUG_FS
527
528/* Called from pincontrol core */
529static int pinmux_functions_show(struct seq_file *s, void *what)
530{
531 struct pinctrl_dev *pctldev = s->private;
532 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
ad8bb720 533 unsigned nfuncs;
2744e8af
LW
534 unsigned func_selector = 0;
535
ad8bb720
DA
536 if (!pmxops)
537 return 0;
57b676f9 538
42fed7ba 539 mutex_lock(&pctldev->mutex);
ad8bb720 540 nfuncs = pmxops->get_functions_count(pctldev);
d1e90e9e 541 while (func_selector < nfuncs) {
2744e8af
LW
542 const char *func = pmxops->get_function_name(pctldev,
543 func_selector);
544 const char * const *groups;
545 unsigned num_groups;
546 int ret;
547 int i;
548
549 ret = pmxops->get_function_groups(pctldev, func_selector,
550 &groups, &num_groups);
9d7ebbbf 551 if (ret) {
2744e8af
LW
552 seq_printf(s, "function %s: COULD NOT GET GROUPS\n",
553 func);
9d7ebbbf
LD
554 func_selector++;
555 continue;
556 }
2744e8af
LW
557
558 seq_printf(s, "function: %s, groups = [ ", func);
559 for (i = 0; i < num_groups; i++)
560 seq_printf(s, "%s ", groups[i]);
561 seq_puts(s, "]\n");
562
563 func_selector++;
2744e8af
LW
564 }
565
42fed7ba 566 mutex_unlock(&pctldev->mutex);
57b676f9 567
2744e8af
LW
568 return 0;
569}
570
571static int pinmux_pins_show(struct seq_file *s, void *what)
572{
573 struct pinctrl_dev *pctldev = s->private;
ba110d90
SW
574 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
575 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
706e8520 576 unsigned i, pin;
2744e8af 577
ad8bb720
DA
578 if (!pmxops)
579 return 0;
580
2744e8af 581 seq_puts(s, "Pinmux settings per pin\n");
81508855
LW
582 if (pmxops->strict)
583 seq_puts(s,
584 "Format: pin (name): mux_owner|gpio_owner (strict) hog?\n");
585 else
586 seq_puts(s,
587 "Format: pin (name): mux_owner gpio_owner hog?\n");
2744e8af 588
42fed7ba 589 mutex_lock(&pctldev->mutex);
57b676f9 590
706e8520
CP
591 /* The pin number can be retrived from the pin controller descriptor */
592 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af 593 struct pin_desc *desc;
1cf94c45 594 bool is_hog = false;
2744e8af 595
706e8520 596 pin = pctldev->desc->pins[i].number;
2744e8af 597 desc = pin_desc_get(pctldev, pin);
706e8520 598 /* Skip if we cannot search the pin */
2744e8af
LW
599 if (desc == NULL)
600 continue;
601
652162d4
SW
602 if (desc->mux_owner &&
603 !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev)))
1cf94c45
LW
604 is_hog = true;
605
81508855
LW
606 if (pmxops->strict) {
607 if (desc->mux_owner)
608 seq_printf(s, "pin %d (%s): device %s%s",
cf9d994d 609 pin, desc->name, desc->mux_owner,
81508855
LW
610 is_hog ? " (HOG)" : "");
611 else if (desc->gpio_owner)
612 seq_printf(s, "pin %d (%s): GPIO %s",
cf9d994d 613 pin, desc->name, desc->gpio_owner);
81508855
LW
614 else
615 seq_printf(s, "pin %d (%s): UNCLAIMED",
cf9d994d 616 pin, desc->name);
81508855
LW
617 } else {
618 /* For non-strict controllers */
cf9d994d 619 seq_printf(s, "pin %d (%s): %s %s%s", pin, desc->name,
81508855
LW
620 desc->mux_owner ? desc->mux_owner
621 : "(MUX UNCLAIMED)",
622 desc->gpio_owner ? desc->gpio_owner
623 : "(GPIO UNCLAIMED)",
624 is_hog ? " (HOG)" : "");
625 }
ba110d90 626
81508855 627 /* If mux: print function+group claiming the pin */
ba110d90
SW
628 if (desc->mux_setting)
629 seq_printf(s, " function %s group %s\n",
630 pmxops->get_function_name(pctldev,
631 desc->mux_setting->func),
632 pctlops->get_group_name(pctldev,
633 desc->mux_setting->group));
634 else
635 seq_printf(s, "\n");
2744e8af
LW
636 }
637
42fed7ba 638 mutex_unlock(&pctldev->mutex);
57b676f9 639
2744e8af
LW
640 return 0;
641}
642
1e2082b5
SW
643void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map)
644{
645 seq_printf(s, "group %s\nfunction %s\n",
646 map->data.mux.group ? map->data.mux.group : "(default)",
647 map->data.mux.function);
648}
649
650void pinmux_show_setting(struct seq_file *s,
651 struct pinctrl_setting const *setting)
2744e8af 652{
7ecdb16f
SW
653 struct pinctrl_dev *pctldev = setting->pctldev;
654 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
655 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
656
1e2082b5
SW
657 seq_printf(s, "group: %s (%u) function: %s (%u)\n",
658 pctlops->get_group_name(pctldev, setting->data.mux.group),
659 setting->data.mux.group,
660 pmxops->get_function_name(pctldev, setting->data.mux.func),
661 setting->data.mux.func);
2744e8af
LW
662}
663
664static int pinmux_functions_open(struct inode *inode, struct file *file)
665{
666 return single_open(file, pinmux_functions_show, inode->i_private);
667}
668
669static int pinmux_pins_open(struct inode *inode, struct file *file)
670{
671 return single_open(file, pinmux_pins_show, inode->i_private);
672}
673
2744e8af
LW
674static const struct file_operations pinmux_functions_ops = {
675 .open = pinmux_functions_open,
676 .read = seq_read,
677 .llseek = seq_lseek,
678 .release = single_release,
679};
680
681static const struct file_operations pinmux_pins_ops = {
682 .open = pinmux_pins_open,
683 .read = seq_read,
684 .llseek = seq_lseek,
685 .release = single_release,
686};
687
2744e8af
LW
688void pinmux_init_device_debugfs(struct dentry *devroot,
689 struct pinctrl_dev *pctldev)
690{
691 debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO,
692 devroot, pctldev, &pinmux_functions_ops);
693 debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO,
694 devroot, pctldev, &pinmux_pins_ops);
2744e8af
LW
695}
696
697#endif /* CONFIG_DEBUG_FS */