]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/pinctrl/pinmux.c
pinctrl: add pinctrl-mxs support
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / pinmux.c
CommitLineData
2744e8af
LW
1/*
2 * Core driver for the pin muxing portions of the pin control subsystem
3 *
e93bcee0 4 * Copyright (C) 2011-2012 ST-Ericsson SA
2744e8af
LW
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
7ecdb16f
SW
10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
2744e8af
LW
12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinmux core: " fmt
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/slab.h>
21#include <linux/radix-tree.h>
22#include <linux/err.h>
23#include <linux/list.h>
97607d15 24#include <linux/string.h>
2744e8af
LW
25#include <linux/sysfs.h>
26#include <linux/debugfs.h>
27#include <linux/seq_file.h>
28#include <linux/pinctrl/machine.h>
29#include <linux/pinctrl/pinmux.h>
30#include "core.h"
befe5bdf 31#include "pinmux.h"
2744e8af 32
03665e0f
SW
33int pinmux_check_ops(struct pinctrl_dev *pctldev)
34{
35 const struct pinmux_ops *ops = pctldev->desc->pmxops;
a1d31f71 36 unsigned nfuncs;
03665e0f
SW
37 unsigned selector = 0;
38
39 /* Check that we implement required operations */
a1d31f71
DA
40 if (!ops ||
41 !ops->get_functions_count ||
03665e0f
SW
42 !ops->get_function_name ||
43 !ops->get_function_groups ||
44 !ops->enable ||
ad6e1107
JC
45 !ops->disable) {
46 dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n");
03665e0f 47 return -EINVAL;
ad6e1107 48 }
03665e0f 49 /* Check that all functions registered have names */
a1d31f71 50 nfuncs = ops->get_functions_count(pctldev);
d1e90e9e 51 while (selector < nfuncs) {
03665e0f
SW
52 const char *fname = ops->get_function_name(pctldev,
53 selector);
54 if (!fname) {
a1d31f71 55 dev_err(pctldev->dev, "pinmux ops has no name for function%u\n",
03665e0f
SW
56 selector);
57 return -EINVAL;
58 }
59 selector++;
60 }
61
62 return 0;
63}
64
1e2082b5
SW
65int pinmux_validate_map(struct pinctrl_map const *map, int i)
66{
67 if (!map->data.mux.function) {
68 pr_err("failed to register map %s (%d): no function given\n",
69 map->name, i);
70 return -EINVAL;
71 }
72
73 return 0;
74}
75
2744e8af
LW
76/**
77 * pin_request() - request a single pin to be muxed in, typically for GPIO
78 * @pin: the pin number in the global pin space
3cc70ed3
SW
79 * @owner: a representation of the owner of this pin; typically the device
80 * name that controls its mux function, or the requested GPIO name
2744e8af
LW
81 * @gpio_range: the range matching the GPIO pin if this is a request for a
82 * single GPIO pin
83 */
84static int pin_request(struct pinctrl_dev *pctldev,
3cc70ed3 85 int pin, const char *owner,
2744e8af
LW
86 struct pinctrl_gpio_range *gpio_range)
87{
88 struct pin_desc *desc;
89 const struct pinmux_ops *ops = pctldev->desc->pmxops;
90 int status = -EINVAL;
91
2744e8af
LW
92 desc = pin_desc_get(pctldev, pin);
93 if (desc == NULL) {
51cd24ee 94 dev_err(pctldev->dev,
2744e8af
LW
95 "pin is not registered so it cannot be requested\n");
96 goto out;
97 }
98
d0bd8df5
DA
99 dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n",
100 pin, desc->name, owner);
101
652162d4
SW
102 if (gpio_range) {
103 /* There's no need to support multiple GPIO requests */
104 if (desc->gpio_owner) {
105 dev_err(pctldev->dev,
106 "pin already requested\n");
107 goto out;
108 }
0e3db173 109
652162d4
SW
110 desc->gpio_owner = owner;
111 } else {
112 if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) {
113 dev_err(pctldev->dev,
114 "pin already requested\n");
115 goto out;
116 }
0e3db173 117
652162d4
SW
118 desc->mux_usecount++;
119 if (desc->mux_usecount > 1)
120 return 0;
121
122 desc->mux_owner = owner;
123 }
2744e8af
LW
124
125 /* Let each pin increase references to this module */
126 if (!try_module_get(pctldev->owner)) {
51cd24ee 127 dev_err(pctldev->dev,
2744e8af
LW
128 "could not increase module refcount for pin %d\n",
129 pin);
130 status = -EINVAL;
131 goto out_free_pin;
132 }
133
134 /*
135 * If there is no kind of request function for the pin we just assume
136 * we got it by default and proceed.
137 */
3712a3c4 138 if (gpio_range && ops->gpio_request_enable)
2744e8af
LW
139 /* This requests and enables a single GPIO pin */
140 status = ops->gpio_request_enable(pctldev, gpio_range, pin);
141 else if (ops->request)
142 status = ops->request(pctldev, pin);
143 else
144 status = 0;
145
0e3db173 146 if (status) {
ad6e1107 147 dev_err(pctldev->dev, "request on device %s failed for pin %d\n",
2744e8af 148 pctldev->desc->name, pin);
0e3db173
SW
149 module_put(pctldev->owner);
150 }
151
2744e8af 152out_free_pin:
0e3db173 153 if (status) {
652162d4
SW
154 if (gpio_range) {
155 desc->gpio_owner = NULL;
156 } else {
157 desc->mux_usecount--;
158 if (!desc->mux_usecount)
159 desc->mux_owner = NULL;
160 }
0e3db173 161 }
2744e8af
LW
162out:
163 if (status)
51cd24ee 164 dev_err(pctldev->dev, "pin-%d (%s) status %d\n",
3cc70ed3 165 pin, owner, status);
2744e8af
LW
166
167 return status;
168}
169
170/**
171 * pin_free() - release a single muxed in pin so something else can be muxed
172 * @pctldev: pin controller device handling this pin
173 * @pin: the pin to free
3712a3c4
SW
174 * @gpio_range: the range matching the GPIO pin if this is a request for a
175 * single GPIO pin
336cdba0 176 *
3cc70ed3
SW
177 * This function returns a pointer to the previous owner. This is used
178 * for callers that dynamically allocate an owner name so it can be freed
336cdba0 179 * once the pin is free. This is done for GPIO request functions.
2744e8af 180 */
3712a3c4
SW
181static const char *pin_free(struct pinctrl_dev *pctldev, int pin,
182 struct pinctrl_gpio_range *gpio_range)
2744e8af
LW
183{
184 const struct pinmux_ops *ops = pctldev->desc->pmxops;
185 struct pin_desc *desc;
3cc70ed3 186 const char *owner;
2744e8af
LW
187
188 desc = pin_desc_get(pctldev, pin);
189 if (desc == NULL) {
51cd24ee 190 dev_err(pctldev->dev,
2744e8af 191 "pin is not registered so it cannot be freed\n");
3712a3c4 192 return NULL;
2744e8af
LW
193 }
194
652162d4
SW
195 if (!gpio_range) {
196 desc->mux_usecount--;
197 if (desc->mux_usecount)
198 return NULL;
199 }
0e3db173 200
3712a3c4
SW
201 /*
202 * If there is no kind of request function for the pin we just assume
203 * we got it by default and proceed.
204 */
205 if (gpio_range && ops->gpio_disable_free)
206 ops->gpio_disable_free(pctldev, gpio_range, pin);
207 else if (ops->free)
2744e8af
LW
208 ops->free(pctldev, pin);
209
652162d4
SW
210 if (gpio_range) {
211 owner = desc->gpio_owner;
212 desc->gpio_owner = NULL;
213 } else {
214 owner = desc->mux_owner;
215 desc->mux_owner = NULL;
216 desc->mux_setting = NULL;
217 }
218
2744e8af 219 module_put(pctldev->owner);
3712a3c4 220
3cc70ed3 221 return owner;
2744e8af
LW
222}
223
224/**
befe5bdf
LW
225 * pinmux_request_gpio() - request pinmuxing for a GPIO pin
226 * @pctldev: pin controller device affected
227 * @pin: the pin to mux in for GPIO
228 * @range: the applicable GPIO range
2744e8af 229 */
befe5bdf
LW
230int pinmux_request_gpio(struct pinctrl_dev *pctldev,
231 struct pinctrl_gpio_range *range,
232 unsigned pin, unsigned gpio)
2744e8af
LW
233{
234 char gpiostr[16];
3cc70ed3 235 const char *owner;
2744e8af 236 int ret;
2744e8af
LW
237
238 /* Conjure some name stating what chip and pin this is taken by */
239 snprintf(gpiostr, 15, "%s:%d", range->name, gpio);
240
3cc70ed3
SW
241 owner = kstrdup(gpiostr, GFP_KERNEL);
242 if (!owner)
5d2eaf80
SW
243 return -EINVAL;
244
3cc70ed3 245 ret = pin_request(pctldev, pin, owner, range);
5d2eaf80 246 if (ret < 0)
3cc70ed3 247 kfree(owner);
5d2eaf80
SW
248
249 return ret;
2744e8af 250}
2744e8af
LW
251
252/**
befe5bdf
LW
253 * pinmux_free_gpio() - release a pin from GPIO muxing
254 * @pctldev: the pin controller device for the pin
255 * @pin: the affected currently GPIO-muxed in pin
256 * @range: applicable GPIO range
2744e8af 257 */
befe5bdf
LW
258void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin,
259 struct pinctrl_gpio_range *range)
2744e8af 260{
3cc70ed3 261 const char *owner;
2744e8af 262
3cc70ed3
SW
263 owner = pin_free(pctldev, pin, range);
264 kfree(owner);
2744e8af 265}
2744e8af 266
befe5bdf
LW
267/**
268 * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin
269 * @pctldev: the pin controller handling this pin
270 * @range: applicable GPIO range
271 * @pin: the affected GPIO pin in this controller
272 * @input: true if we set the pin as input, false for output
273 */
274int pinmux_gpio_direction(struct pinctrl_dev *pctldev,
275 struct pinctrl_gpio_range *range,
276 unsigned pin, bool input)
542e704f 277{
542e704f
LW
278 const struct pinmux_ops *ops;
279 int ret;
542e704f
LW
280
281 ops = pctldev->desc->pmxops;
282
542e704f
LW
283 if (ops->gpio_set_direction)
284 ret = ops->gpio_set_direction(pctldev, range, pin, input);
285 else
286 ret = 0;
287
288 return ret;
289}
290
7ecdb16f
SW
291static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev,
292 const char *function)
2744e8af
LW
293{
294 const struct pinmux_ops *ops = pctldev->desc->pmxops;
d1e90e9e 295 unsigned nfuncs = ops->get_functions_count(pctldev);
2744e8af
LW
296 unsigned selector = 0;
297
298 /* See if this pctldev has this function */
d1e90e9e 299 while (selector < nfuncs) {
2744e8af
LW
300 const char *fname = ops->get_function_name(pctldev,
301 selector);
2744e8af 302
7ecdb16f
SW
303 if (!strcmp(function, fname))
304 return selector;
2744e8af 305
2744e8af
LW
306 selector++;
307 }
308
309 pr_err("%s does not support function %s\n",
7ecdb16f 310 pinctrl_dev_get_name(pctldev), function);
2744e8af
LW
311 return -EINVAL;
312}
313
7ecdb16f
SW
314int pinmux_map_to_setting(struct pinctrl_map const *map,
315 struct pinctrl_setting *setting)
2744e8af 316{
7ecdb16f
SW
317 struct pinctrl_dev *pctldev = setting->pctldev;
318 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
319 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
320 char const * const *groups;
321 unsigned num_groups;
2744e8af 322 int ret;
7ecdb16f
SW
323 const char *group;
324 int i;
325 const unsigned *pins;
326 unsigned num_pins;
2744e8af 327
ad8bb720
DA
328 if (!pmxops) {
329 dev_err(pctldev->dev, "does not support mux function\n");
330 return -EINVAL;
331 }
332
15f70e1b 333 ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function);
ad6e1107
JC
334 if (ret < 0) {
335 dev_err(pctldev->dev, "invalid function %s in map table\n",
336 map->data.mux.function);
15f70e1b 337 return ret;
ad6e1107 338 }
15f70e1b 339 setting->data.mux.func = ret;
2744e8af 340
1e2082b5 341 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func,
7ecdb16f 342 &groups, &num_groups);
ad6e1107
JC
343 if (ret < 0) {
344 dev_err(pctldev->dev, "can't query groups for function %s\n",
345 map->data.mux.function);
7ecdb16f 346 return ret;
ad6e1107
JC
347 }
348 if (!num_groups) {
349 dev_err(pctldev->dev,
350 "function %s can't be selected on any group\n",
351 map->data.mux.function);
2744e8af 352 return -EINVAL;
ad6e1107 353 }
1e2082b5 354 if (map->data.mux.group) {
7ecdb16f 355 bool found = false;
1e2082b5 356 group = map->data.mux.group;
7ecdb16f
SW
357 for (i = 0; i < num_groups; i++) {
358 if (!strcmp(group, groups[i])) {
359 found = true;
360 break;
361 }
362 }
ad6e1107
JC
363 if (!found) {
364 dev_err(pctldev->dev,
365 "invalid group \"%s\" for function \"%s\"\n",
366 group, map->data.mux.function);
7ecdb16f 367 return -EINVAL;
ad6e1107 368 }
7ecdb16f
SW
369 } else {
370 group = groups[0];
2744e8af 371 }
2744e8af 372
15f70e1b 373 ret = pinctrl_get_group_selector(pctldev, group);
ad6e1107
JC
374 if (ret < 0) {
375 dev_err(pctldev->dev, "invalid group %s in map table\n",
376 map->data.mux.group);
15f70e1b 377 return ret;
ad6e1107 378 }
15f70e1b 379 setting->data.mux.group = ret;
2744e8af 380
1e2082b5
SW
381 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins,
382 &num_pins);
2744e8af 383 if (ret) {
7ecdb16f
SW
384 dev_err(pctldev->dev,
385 "could not get pins for device %s group selector %d\n",
1e2082b5 386 pinctrl_dev_get_name(pctldev), setting->data.mux.group);
7ecdb16f
SW
387 return -ENODEV;
388 }
389
390 /* Try to allocate all pins in this group, one by one */
391 for (i = 0; i < num_pins; i++) {
392 ret = pin_request(pctldev, pins[i], map->dev_name, NULL);
393 if (ret) {
394 dev_err(pctldev->dev,
ad6e1107 395 "could not request pin %d on device %s\n",
7ecdb16f
SW
396 pins[i], pinctrl_dev_get_name(pctldev));
397 /* On error release all taken pins */
398 i--; /* this pin just failed */
399 for (; i >= 0; i--)
400 pin_free(pctldev, pins[i], NULL);
401 return -ENODEV;
402 }
2744e8af 403 }
2744e8af
LW
404
405 return 0;
406}
407
7ecdb16f 408void pinmux_free_setting(struct pinctrl_setting const *setting)
2744e8af 409{
7ecdb16f
SW
410 struct pinctrl_dev *pctldev = setting->pctldev;
411 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
412 const unsigned *pins;
413 unsigned num_pins;
befe5bdf 414 int ret;
7ecdb16f 415 int i;
2744e8af 416
1e2082b5 417 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
7ecdb16f 418 &pins, &num_pins);
befe5bdf 419 if (ret) {
7ecdb16f
SW
420 dev_err(pctldev->dev,
421 "could not get pins for device %s group selector %d\n",
1e2082b5 422 pinctrl_dev_get_name(pctldev), setting->data.mux.group);
7ecdb16f 423 return;
2744e8af
LW
424 }
425
7ecdb16f
SW
426 for (i = 0; i < num_pins; i++)
427 pin_free(pctldev, pins[i], NULL);
2744e8af 428}
2744e8af 429
7ecdb16f 430int pinmux_enable_setting(struct pinctrl_setting const *setting)
2744e8af 431{
7ecdb16f 432 struct pinctrl_dev *pctldev = setting->pctldev;
ba110d90 433 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
befe5bdf 434 const struct pinmux_ops *ops = pctldev->desc->pmxops;
ba110d90
SW
435 int ret;
436 const unsigned *pins;
437 unsigned num_pins;
438 int i;
439 struct pin_desc *desc;
440
441 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
442 &pins, &num_pins);
443 if (ret) {
444 /* errors only affect debug data, so just warn */
445 dev_warn(pctldev->dev,
446 "could not get pins for group selector %d\n",
447 setting->data.mux.group);
448 num_pins = 0;
449 }
450
451 for (i = 0; i < num_pins; i++) {
452 desc = pin_desc_get(pctldev, pins[i]);
453 if (desc == NULL) {
454 dev_warn(pctldev->dev,
455 "could not get pin desc for pin %d\n",
456 pins[i]);
457 continue;
458 }
459 desc->mux_setting = &(setting->data.mux);
460 }
2744e8af 461
1e2082b5
SW
462 return ops->enable(pctldev, setting->data.mux.func,
463 setting->data.mux.group);
2744e8af 464}
2744e8af 465
7ecdb16f 466void pinmux_disable_setting(struct pinctrl_setting const *setting)
2744e8af 467{
7ecdb16f 468 struct pinctrl_dev *pctldev = setting->pctldev;
ba110d90 469 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
befe5bdf 470 const struct pinmux_ops *ops = pctldev->desc->pmxops;
ba110d90
SW
471 int ret;
472 const unsigned *pins;
473 unsigned num_pins;
474 int i;
475 struct pin_desc *desc;
476
477 ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
478 &pins, &num_pins);
479 if (ret) {
480 /* errors only affect debug data, so just warn */
481 dev_warn(pctldev->dev,
482 "could not get pins for group selector %d\n",
483 setting->data.mux.group);
484 num_pins = 0;
485 }
486
487 for (i = 0; i < num_pins; i++) {
488 desc = pin_desc_get(pctldev, pins[i]);
489 if (desc == NULL) {
490 dev_warn(pctldev->dev,
491 "could not get pin desc for pin %d\n",
492 pins[i]);
493 continue;
494 }
495 desc->mux_setting = NULL;
496 }
2744e8af 497
1e2082b5 498 ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group);
2744e8af 499}
2744e8af 500
2744e8af
LW
501#ifdef CONFIG_DEBUG_FS
502
503/* Called from pincontrol core */
504static int pinmux_functions_show(struct seq_file *s, void *what)
505{
506 struct pinctrl_dev *pctldev = s->private;
507 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
ad8bb720 508 unsigned nfuncs;
2744e8af
LW
509 unsigned func_selector = 0;
510
ad8bb720
DA
511 if (!pmxops)
512 return 0;
57b676f9 513
ad8bb720
DA
514 mutex_lock(&pinctrl_mutex);
515 nfuncs = pmxops->get_functions_count(pctldev);
d1e90e9e 516 while (func_selector < nfuncs) {
2744e8af
LW
517 const char *func = pmxops->get_function_name(pctldev,
518 func_selector);
519 const char * const *groups;
520 unsigned num_groups;
521 int ret;
522 int i;
523
524 ret = pmxops->get_function_groups(pctldev, func_selector,
525 &groups, &num_groups);
526 if (ret)
527 seq_printf(s, "function %s: COULD NOT GET GROUPS\n",
528 func);
529
530 seq_printf(s, "function: %s, groups = [ ", func);
531 for (i = 0; i < num_groups; i++)
532 seq_printf(s, "%s ", groups[i]);
533 seq_puts(s, "]\n");
534
535 func_selector++;
2744e8af
LW
536 }
537
57b676f9
SW
538 mutex_unlock(&pinctrl_mutex);
539
2744e8af
LW
540 return 0;
541}
542
543static int pinmux_pins_show(struct seq_file *s, void *what)
544{
545 struct pinctrl_dev *pctldev = s->private;
ba110d90
SW
546 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
547 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
706e8520 548 unsigned i, pin;
2744e8af 549
ad8bb720
DA
550 if (!pmxops)
551 return 0;
552
2744e8af 553 seq_puts(s, "Pinmux settings per pin\n");
652162d4 554 seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n");
2744e8af 555
57b676f9
SW
556 mutex_lock(&pinctrl_mutex);
557
706e8520
CP
558 /* The pin number can be retrived from the pin controller descriptor */
559 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af 560 struct pin_desc *desc;
1cf94c45 561 bool is_hog = false;
2744e8af 562
706e8520 563 pin = pctldev->desc->pins[i].number;
2744e8af 564 desc = pin_desc_get(pctldev, pin);
706e8520 565 /* Skip if we cannot search the pin */
2744e8af
LW
566 if (desc == NULL)
567 continue;
568
652162d4
SW
569 if (desc->mux_owner &&
570 !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev)))
1cf94c45
LW
571 is_hog = true;
572
652162d4 573 seq_printf(s, "pin %d (%s): %s %s%s", pin,
2744e8af 574 desc->name ? desc->name : "unnamed",
652162d4
SW
575 desc->mux_owner ? desc->mux_owner
576 : "(MUX UNCLAIMED)",
577 desc->gpio_owner ? desc->gpio_owner
578 : "(GPIO UNCLAIMED)",
1cf94c45 579 is_hog ? " (HOG)" : "");
ba110d90
SW
580
581 if (desc->mux_setting)
582 seq_printf(s, " function %s group %s\n",
583 pmxops->get_function_name(pctldev,
584 desc->mux_setting->func),
585 pctlops->get_group_name(pctldev,
586 desc->mux_setting->group));
587 else
588 seq_printf(s, "\n");
2744e8af
LW
589 }
590
57b676f9
SW
591 mutex_unlock(&pinctrl_mutex);
592
2744e8af
LW
593 return 0;
594}
595
1e2082b5
SW
596void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map)
597{
598 seq_printf(s, "group %s\nfunction %s\n",
599 map->data.mux.group ? map->data.mux.group : "(default)",
600 map->data.mux.function);
601}
602
603void pinmux_show_setting(struct seq_file *s,
604 struct pinctrl_setting const *setting)
2744e8af 605{
7ecdb16f
SW
606 struct pinctrl_dev *pctldev = setting->pctldev;
607 const struct pinmux_ops *pmxops = pctldev->desc->pmxops;
608 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
609
1e2082b5
SW
610 seq_printf(s, "group: %s (%u) function: %s (%u)\n",
611 pctlops->get_group_name(pctldev, setting->data.mux.group),
612 setting->data.mux.group,
613 pmxops->get_function_name(pctldev, setting->data.mux.func),
614 setting->data.mux.func);
2744e8af
LW
615}
616
617static int pinmux_functions_open(struct inode *inode, struct file *file)
618{
619 return single_open(file, pinmux_functions_show, inode->i_private);
620}
621
622static int pinmux_pins_open(struct inode *inode, struct file *file)
623{
624 return single_open(file, pinmux_pins_show, inode->i_private);
625}
626
2744e8af
LW
627static const struct file_operations pinmux_functions_ops = {
628 .open = pinmux_functions_open,
629 .read = seq_read,
630 .llseek = seq_lseek,
631 .release = single_release,
632};
633
634static const struct file_operations pinmux_pins_ops = {
635 .open = pinmux_pins_open,
636 .read = seq_read,
637 .llseek = seq_lseek,
638 .release = single_release,
639};
640
2744e8af
LW
641void pinmux_init_device_debugfs(struct dentry *devroot,
642 struct pinctrl_dev *pctldev)
643{
644 debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO,
645 devroot, pctldev, &pinmux_functions_ops);
646 debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO,
647 devroot, pctldev, &pinmux_pins_ops);
2744e8af
LW
648}
649
650#endif /* CONFIG_DEBUG_FS */