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Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
03e9f0ca | 44 | !ops->set_mux) { |
ad6e1107 | 45 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 46 | return -EINVAL; |
ad6e1107 | 47 | } |
03665e0f | 48 | /* Check that all functions registered have names */ |
a1d31f71 | 49 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 50 | while (selector < nfuncs) { |
03665e0f SW |
51 | const char *fname = ops->get_function_name(pctldev, |
52 | selector); | |
53 | if (!fname) { | |
a1d31f71 | 54 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
55 | selector); |
56 | return -EINVAL; | |
57 | } | |
58 | selector++; | |
59 | } | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
1e2082b5 SW |
64 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
65 | { | |
66 | if (!map->data.mux.function) { | |
67 | pr_err("failed to register map %s (%d): no function given\n", | |
68 | map->name, i); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
2744e8af LW |
75 | /** |
76 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
77 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
78 | * @owner: a representation of the owner of this pin; typically the device |
79 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
80 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
81 | * single GPIO pin | |
82 | */ | |
83 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 84 | int pin, const char *owner, |
2744e8af LW |
85 | struct pinctrl_gpio_range *gpio_range) |
86 | { | |
87 | struct pin_desc *desc; | |
88 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
89 | int status = -EINVAL; | |
90 | ||
2744e8af LW |
91 | desc = pin_desc_get(pctldev, pin); |
92 | if (desc == NULL) { | |
51cd24ee | 93 | dev_err(pctldev->dev, |
d4705316 SW |
94 | "pin %d is not registered so it cannot be requested\n", |
95 | pin); | |
2744e8af LW |
96 | goto out; |
97 | } | |
98 | ||
d0bd8df5 DA |
99 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
100 | pin, desc->name, owner); | |
101 | ||
652162d4 SW |
102 | if (gpio_range) { |
103 | /* There's no need to support multiple GPIO requests */ | |
104 | if (desc->gpio_owner) { | |
105 | dev_err(pctldev->dev, | |
d4705316 SW |
106 | "pin %s already requested by %s; cannot claim for %s\n", |
107 | desc->name, desc->gpio_owner, owner); | |
652162d4 SW |
108 | goto out; |
109 | } | |
8c4c2016 | 110 | if (ops->strict && desc->mux_usecount && |
fa76a3db SZ |
111 | strcmp(desc->mux_owner, owner)) { |
112 | dev_err(pctldev->dev, | |
113 | "pin %s already requested by %s; cannot claim for %s\n", | |
114 | desc->name, desc->mux_owner, owner); | |
115 | goto out; | |
116 | } | |
0e3db173 | 117 | |
652162d4 SW |
118 | desc->gpio_owner = owner; |
119 | } else { | |
120 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
121 | dev_err(pctldev->dev, | |
d4705316 SW |
122 | "pin %s already requested by %s; cannot claim for %s\n", |
123 | desc->name, desc->mux_owner, owner); | |
652162d4 SW |
124 | goto out; |
125 | } | |
8c4c2016 | 126 | if (ops->strict && desc->gpio_owner) { |
fa76a3db SZ |
127 | dev_err(pctldev->dev, |
128 | "pin %s already requested by %s; cannot claim for %s\n", | |
129 | desc->name, desc->gpio_owner, owner); | |
130 | goto out; | |
131 | } | |
0e3db173 | 132 | |
652162d4 SW |
133 | desc->mux_usecount++; |
134 | if (desc->mux_usecount > 1) | |
135 | return 0; | |
136 | ||
137 | desc->mux_owner = owner; | |
138 | } | |
2744e8af LW |
139 | |
140 | /* Let each pin increase references to this module */ | |
141 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 142 | dev_err(pctldev->dev, |
2744e8af LW |
143 | "could not increase module refcount for pin %d\n", |
144 | pin); | |
145 | status = -EINVAL; | |
146 | goto out_free_pin; | |
147 | } | |
148 | ||
149 | /* | |
150 | * If there is no kind of request function for the pin we just assume | |
151 | * we got it by default and proceed. | |
152 | */ | |
3712a3c4 | 153 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
154 | /* This requests and enables a single GPIO pin */ |
155 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
156 | else if (ops->request) | |
157 | status = ops->request(pctldev, pin); | |
158 | else | |
159 | status = 0; | |
160 | ||
0e3db173 | 161 | if (status) { |
d4705316 | 162 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
163 | module_put(pctldev->owner); |
164 | } | |
165 | ||
2744e8af | 166 | out_free_pin: |
0e3db173 | 167 | if (status) { |
652162d4 SW |
168 | if (gpio_range) { |
169 | desc->gpio_owner = NULL; | |
170 | } else { | |
171 | desc->mux_usecount--; | |
172 | if (!desc->mux_usecount) | |
173 | desc->mux_owner = NULL; | |
174 | } | |
0e3db173 | 175 | } |
2744e8af LW |
176 | out: |
177 | if (status) | |
51cd24ee | 178 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 179 | pin, owner, status); |
2744e8af LW |
180 | |
181 | return status; | |
182 | } | |
183 | ||
184 | /** | |
185 | * pin_free() - release a single muxed in pin so something else can be muxed | |
186 | * @pctldev: pin controller device handling this pin | |
187 | * @pin: the pin to free | |
3712a3c4 SW |
188 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
189 | * single GPIO pin | |
336cdba0 | 190 | * |
3cc70ed3 SW |
191 | * This function returns a pointer to the previous owner. This is used |
192 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 193 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 194 | */ |
3712a3c4 SW |
195 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
196 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
197 | { |
198 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
199 | struct pin_desc *desc; | |
3cc70ed3 | 200 | const char *owner; |
2744e8af LW |
201 | |
202 | desc = pin_desc_get(pctldev, pin); | |
203 | if (desc == NULL) { | |
51cd24ee | 204 | dev_err(pctldev->dev, |
2744e8af | 205 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 206 | return NULL; |
2744e8af LW |
207 | } |
208 | ||
652162d4 | 209 | if (!gpio_range) { |
740924a2 RG |
210 | /* |
211 | * A pin should not be freed more times than allocated. | |
212 | */ | |
213 | if (WARN_ON(!desc->mux_usecount)) | |
214 | return NULL; | |
652162d4 SW |
215 | desc->mux_usecount--; |
216 | if (desc->mux_usecount) | |
217 | return NULL; | |
218 | } | |
0e3db173 | 219 | |
3712a3c4 SW |
220 | /* |
221 | * If there is no kind of request function for the pin we just assume | |
222 | * we got it by default and proceed. | |
223 | */ | |
224 | if (gpio_range && ops->gpio_disable_free) | |
225 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
226 | else if (ops->free) | |
2744e8af LW |
227 | ops->free(pctldev, pin); |
228 | ||
652162d4 SW |
229 | if (gpio_range) { |
230 | owner = desc->gpio_owner; | |
231 | desc->gpio_owner = NULL; | |
232 | } else { | |
233 | owner = desc->mux_owner; | |
234 | desc->mux_owner = NULL; | |
235 | desc->mux_setting = NULL; | |
236 | } | |
237 | ||
2744e8af | 238 | module_put(pctldev->owner); |
3712a3c4 | 239 | |
3cc70ed3 | 240 | return owner; |
2744e8af LW |
241 | } |
242 | ||
243 | /** | |
befe5bdf LW |
244 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
245 | * @pctldev: pin controller device affected | |
246 | * @pin: the pin to mux in for GPIO | |
247 | * @range: the applicable GPIO range | |
2744e8af | 248 | */ |
befe5bdf LW |
249 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
250 | struct pinctrl_gpio_range *range, | |
251 | unsigned pin, unsigned gpio) | |
2744e8af | 252 | { |
3cc70ed3 | 253 | const char *owner; |
2744e8af | 254 | int ret; |
2744e8af LW |
255 | |
256 | /* Conjure some name stating what chip and pin this is taken by */ | |
23a895ae | 257 | owner = kasprintf(GFP_KERNEL, "%s:%d", range->name, gpio); |
3cc70ed3 | 258 | if (!owner) |
5d2eaf80 SW |
259 | return -EINVAL; |
260 | ||
3cc70ed3 | 261 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 262 | if (ret < 0) |
3cc70ed3 | 263 | kfree(owner); |
5d2eaf80 SW |
264 | |
265 | return ret; | |
2744e8af | 266 | } |
2744e8af LW |
267 | |
268 | /** | |
befe5bdf LW |
269 | * pinmux_free_gpio() - release a pin from GPIO muxing |
270 | * @pctldev: the pin controller device for the pin | |
271 | * @pin: the affected currently GPIO-muxed in pin | |
272 | * @range: applicable GPIO range | |
2744e8af | 273 | */ |
befe5bdf LW |
274 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
275 | struct pinctrl_gpio_range *range) | |
2744e8af | 276 | { |
3cc70ed3 | 277 | const char *owner; |
2744e8af | 278 | |
3cc70ed3 SW |
279 | owner = pin_free(pctldev, pin, range); |
280 | kfree(owner); | |
2744e8af | 281 | } |
2744e8af | 282 | |
befe5bdf LW |
283 | /** |
284 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
285 | * @pctldev: the pin controller handling this pin | |
286 | * @range: applicable GPIO range | |
287 | * @pin: the affected GPIO pin in this controller | |
288 | * @input: true if we set the pin as input, false for output | |
289 | */ | |
290 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
291 | struct pinctrl_gpio_range *range, | |
292 | unsigned pin, bool input) | |
542e704f | 293 | { |
542e704f LW |
294 | const struct pinmux_ops *ops; |
295 | int ret; | |
542e704f LW |
296 | |
297 | ops = pctldev->desc->pmxops; | |
298 | ||
542e704f LW |
299 | if (ops->gpio_set_direction) |
300 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
301 | else | |
302 | ret = 0; | |
303 | ||
304 | return ret; | |
305 | } | |
306 | ||
7ecdb16f SW |
307 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
308 | const char *function) | |
2744e8af LW |
309 | { |
310 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 311 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
312 | unsigned selector = 0; |
313 | ||
314 | /* See if this pctldev has this function */ | |
d1e90e9e | 315 | while (selector < nfuncs) { |
2744e8af LW |
316 | const char *fname = ops->get_function_name(pctldev, |
317 | selector); | |
2744e8af | 318 | |
7ecdb16f SW |
319 | if (!strcmp(function, fname)) |
320 | return selector; | |
2744e8af | 321 | |
2744e8af LW |
322 | selector++; |
323 | } | |
324 | ||
325 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 326 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
327 | return -EINVAL; |
328 | } | |
329 | ||
7ecdb16f SW |
330 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
331 | struct pinctrl_setting *setting) | |
2744e8af | 332 | { |
7ecdb16f SW |
333 | struct pinctrl_dev *pctldev = setting->pctldev; |
334 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
7ecdb16f SW |
335 | char const * const *groups; |
336 | unsigned num_groups; | |
2744e8af | 337 | int ret; |
7ecdb16f SW |
338 | const char *group; |
339 | int i; | |
2744e8af | 340 | |
ad8bb720 DA |
341 | if (!pmxops) { |
342 | dev_err(pctldev->dev, "does not support mux function\n"); | |
343 | return -EINVAL; | |
344 | } | |
345 | ||
15f70e1b | 346 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
347 | if (ret < 0) { |
348 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
349 | map->data.mux.function); | |
15f70e1b | 350 | return ret; |
ad6e1107 | 351 | } |
15f70e1b | 352 | setting->data.mux.func = ret; |
2744e8af | 353 | |
1e2082b5 | 354 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 355 | &groups, &num_groups); |
ad6e1107 JC |
356 | if (ret < 0) { |
357 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
358 | map->data.mux.function); | |
7ecdb16f | 359 | return ret; |
ad6e1107 JC |
360 | } |
361 | if (!num_groups) { | |
362 | dev_err(pctldev->dev, | |
363 | "function %s can't be selected on any group\n", | |
364 | map->data.mux.function); | |
2744e8af | 365 | return -EINVAL; |
ad6e1107 | 366 | } |
1e2082b5 | 367 | if (map->data.mux.group) { |
7ecdb16f | 368 | bool found = false; |
1e2082b5 | 369 | group = map->data.mux.group; |
7ecdb16f SW |
370 | for (i = 0; i < num_groups; i++) { |
371 | if (!strcmp(group, groups[i])) { | |
372 | found = true; | |
373 | break; | |
374 | } | |
375 | } | |
ad6e1107 JC |
376 | if (!found) { |
377 | dev_err(pctldev->dev, | |
378 | "invalid group \"%s\" for function \"%s\"\n", | |
379 | group, map->data.mux.function); | |
7ecdb16f | 380 | return -EINVAL; |
ad6e1107 | 381 | } |
7ecdb16f SW |
382 | } else { |
383 | group = groups[0]; | |
2744e8af | 384 | } |
2744e8af | 385 | |
15f70e1b | 386 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
387 | if (ret < 0) { |
388 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
389 | map->data.mux.group); | |
15f70e1b | 390 | return ret; |
ad6e1107 | 391 | } |
15f70e1b | 392 | setting->data.mux.group = ret; |
2744e8af | 393 | |
2744e8af LW |
394 | return 0; |
395 | } | |
396 | ||
7ecdb16f | 397 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 398 | { |
1a78958d | 399 | /* This function is currently unused */ |
2744e8af | 400 | } |
2744e8af | 401 | |
7ecdb16f | 402 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 403 | { |
7ecdb16f | 404 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 405 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 406 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
e5b3b2d9 AT |
407 | int ret = 0; |
408 | const unsigned *pins = NULL; | |
409 | unsigned num_pins = 0; | |
ba110d90 SW |
410 | int i; |
411 | struct pin_desc *desc; | |
412 | ||
e5b3b2d9 AT |
413 | if (pctlops->get_group_pins) |
414 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
415 | &pins, &num_pins); | |
416 | ||
ba110d90 | 417 | if (ret) { |
1c8e7944 LW |
418 | const char *gname; |
419 | ||
ba110d90 | 420 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
421 | gname = pctlops->get_group_name(pctldev, |
422 | setting->data.mux.group); | |
ba110d90 | 423 | dev_warn(pctldev->dev, |
1c8e7944 LW |
424 | "could not get pins for group %s\n", |
425 | gname); | |
ba110d90 SW |
426 | num_pins = 0; |
427 | } | |
428 | ||
1a78958d LW |
429 | /* Try to allocate all pins in this group, one by one */ |
430 | for (i = 0; i < num_pins; i++) { | |
431 | ret = pin_request(pctldev, pins[i], setting->dev_name, NULL); | |
432 | if (ret) { | |
1c8e7944 LW |
433 | const char *gname; |
434 | const char *pname; | |
435 | ||
436 | desc = pin_desc_get(pctldev, pins[i]); | |
437 | pname = desc ? desc->name : "non-existing"; | |
438 | gname = pctlops->get_group_name(pctldev, | |
439 | setting->data.mux.group); | |
1a78958d | 440 | dev_err(pctldev->dev, |
1c8e7944 LW |
441 | "could not request pin %d (%s) from group %s " |
442 | " on device %s\n", | |
443 | pins[i], pname, gname, | |
444 | pinctrl_dev_get_name(pctldev)); | |
e38d457d | 445 | goto err_pin_request; |
1a78958d LW |
446 | } |
447 | } | |
448 | ||
449 | /* Now that we have acquired the pins, encode the mux setting */ | |
ba110d90 SW |
450 | for (i = 0; i < num_pins; i++) { |
451 | desc = pin_desc_get(pctldev, pins[i]); | |
452 | if (desc == NULL) { | |
453 | dev_warn(pctldev->dev, | |
454 | "could not get pin desc for pin %d\n", | |
455 | pins[i]); | |
456 | continue; | |
457 | } | |
458 | desc->mux_setting = &(setting->data.mux); | |
459 | } | |
2744e8af | 460 | |
03e9f0ca LW |
461 | ret = ops->set_mux(pctldev, setting->data.mux.func, |
462 | setting->data.mux.group); | |
e38d457d AL |
463 | |
464 | if (ret) | |
03e9f0ca | 465 | goto err_set_mux; |
e38d457d AL |
466 | |
467 | return 0; | |
468 | ||
03e9f0ca | 469 | err_set_mux: |
e38d457d AL |
470 | for (i = 0; i < num_pins; i++) { |
471 | desc = pin_desc_get(pctldev, pins[i]); | |
472 | if (desc) | |
473 | desc->mux_setting = NULL; | |
474 | } | |
475 | err_pin_request: | |
476 | /* On error release all taken pins */ | |
477 | while (--i >= 0) | |
478 | pin_free(pctldev, pins[i], NULL); | |
479 | ||
480 | return ret; | |
2744e8af | 481 | } |
2744e8af | 482 | |
7ecdb16f | 483 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 484 | { |
7ecdb16f | 485 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 486 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
e5b3b2d9 AT |
487 | int ret = 0; |
488 | const unsigned *pins = NULL; | |
489 | unsigned num_pins = 0; | |
ba110d90 SW |
490 | int i; |
491 | struct pin_desc *desc; | |
492 | ||
e5b3b2d9 AT |
493 | if (pctlops->get_group_pins) |
494 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
495 | &pins, &num_pins); | |
ba110d90 | 496 | if (ret) { |
1c8e7944 LW |
497 | const char *gname; |
498 | ||
ba110d90 | 499 | /* errors only affect debug data, so just warn */ |
1c8e7944 LW |
500 | gname = pctlops->get_group_name(pctldev, |
501 | setting->data.mux.group); | |
ba110d90 | 502 | dev_warn(pctldev->dev, |
1c8e7944 LW |
503 | "could not get pins for group %s\n", |
504 | gname); | |
ba110d90 SW |
505 | num_pins = 0; |
506 | } | |
507 | ||
1a78958d | 508 | /* Flag the descs that no setting is active */ |
ba110d90 SW |
509 | for (i = 0; i < num_pins; i++) { |
510 | desc = pin_desc_get(pctldev, pins[i]); | |
511 | if (desc == NULL) { | |
512 | dev_warn(pctldev->dev, | |
513 | "could not get pin desc for pin %d\n", | |
514 | pins[i]); | |
515 | continue; | |
516 | } | |
744f0a9a SZ |
517 | if (desc->mux_setting == &(setting->data.mux)) { |
518 | desc->mux_setting = NULL; | |
519 | /* And release the pin */ | |
520 | pin_free(pctldev, pins[i], NULL); | |
1c8e7944 LW |
521 | } else { |
522 | const char *gname; | |
1c8e7944 | 523 | |
1c8e7944 LW |
524 | gname = pctlops->get_group_name(pctldev, |
525 | setting->data.mux.group); | |
526 | dev_warn(pctldev->dev, | |
527 | "not freeing pin %d (%s) as part of " | |
528 | "deactivating group %s - it is already " | |
529 | "used for some other setting", | |
808e657c | 530 | pins[i], desc->name, gname); |
744f0a9a | 531 | } |
ba110d90 | 532 | } |
2744e8af | 533 | } |
2744e8af | 534 | |
2744e8af LW |
535 | #ifdef CONFIG_DEBUG_FS |
536 | ||
537 | /* Called from pincontrol core */ | |
538 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
539 | { | |
540 | struct pinctrl_dev *pctldev = s->private; | |
541 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 542 | unsigned nfuncs; |
2744e8af LW |
543 | unsigned func_selector = 0; |
544 | ||
ad8bb720 DA |
545 | if (!pmxops) |
546 | return 0; | |
57b676f9 | 547 | |
42fed7ba | 548 | mutex_lock(&pctldev->mutex); |
ad8bb720 | 549 | nfuncs = pmxops->get_functions_count(pctldev); |
d1e90e9e | 550 | while (func_selector < nfuncs) { |
2744e8af LW |
551 | const char *func = pmxops->get_function_name(pctldev, |
552 | func_selector); | |
553 | const char * const *groups; | |
554 | unsigned num_groups; | |
555 | int ret; | |
556 | int i; | |
557 | ||
558 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
559 | &groups, &num_groups); | |
560 | if (ret) | |
561 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
562 | func); | |
563 | ||
564 | seq_printf(s, "function: %s, groups = [ ", func); | |
565 | for (i = 0; i < num_groups; i++) | |
566 | seq_printf(s, "%s ", groups[i]); | |
567 | seq_puts(s, "]\n"); | |
568 | ||
569 | func_selector++; | |
2744e8af LW |
570 | } |
571 | ||
42fed7ba | 572 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 573 | |
2744e8af LW |
574 | return 0; |
575 | } | |
576 | ||
577 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
578 | { | |
579 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
580 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
581 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 582 | unsigned i, pin; |
2744e8af | 583 | |
ad8bb720 DA |
584 | if (!pmxops) |
585 | return 0; | |
586 | ||
2744e8af | 587 | seq_puts(s, "Pinmux settings per pin\n"); |
81508855 LW |
588 | if (pmxops->strict) |
589 | seq_puts(s, | |
590 | "Format: pin (name): mux_owner|gpio_owner (strict) hog?\n"); | |
591 | else | |
592 | seq_puts(s, | |
593 | "Format: pin (name): mux_owner gpio_owner hog?\n"); | |
2744e8af | 594 | |
42fed7ba | 595 | mutex_lock(&pctldev->mutex); |
57b676f9 | 596 | |
706e8520 CP |
597 | /* The pin number can be retrived from the pin controller descriptor */ |
598 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 599 | struct pin_desc *desc; |
1cf94c45 | 600 | bool is_hog = false; |
2744e8af | 601 | |
706e8520 | 602 | pin = pctldev->desc->pins[i].number; |
2744e8af | 603 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 604 | /* Skip if we cannot search the pin */ |
2744e8af LW |
605 | if (desc == NULL) |
606 | continue; | |
607 | ||
652162d4 SW |
608 | if (desc->mux_owner && |
609 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
610 | is_hog = true; |
611 | ||
81508855 LW |
612 | if (pmxops->strict) { |
613 | if (desc->mux_owner) | |
614 | seq_printf(s, "pin %d (%s): device %s%s", | |
615 | pin, | |
616 | desc->name ? desc->name : "unnamed", | |
617 | desc->mux_owner, | |
618 | is_hog ? " (HOG)" : ""); | |
619 | else if (desc->gpio_owner) | |
620 | seq_printf(s, "pin %d (%s): GPIO %s", | |
621 | pin, | |
622 | desc->name ? desc->name : "unnamed", | |
623 | desc->gpio_owner); | |
624 | else | |
625 | seq_printf(s, "pin %d (%s): UNCLAIMED", | |
626 | pin, | |
627 | desc->name ? desc->name : "unnamed"); | |
628 | } else { | |
629 | /* For non-strict controllers */ | |
630 | seq_printf(s, "pin %d (%s): %s %s%s", pin, | |
631 | desc->name ? desc->name : "unnamed", | |
632 | desc->mux_owner ? desc->mux_owner | |
633 | : "(MUX UNCLAIMED)", | |
634 | desc->gpio_owner ? desc->gpio_owner | |
635 | : "(GPIO UNCLAIMED)", | |
636 | is_hog ? " (HOG)" : ""); | |
637 | } | |
ba110d90 | 638 | |
81508855 | 639 | /* If mux: print function+group claiming the pin */ |
ba110d90 SW |
640 | if (desc->mux_setting) |
641 | seq_printf(s, " function %s group %s\n", | |
642 | pmxops->get_function_name(pctldev, | |
643 | desc->mux_setting->func), | |
644 | pctlops->get_group_name(pctldev, | |
645 | desc->mux_setting->group)); | |
646 | else | |
647 | seq_printf(s, "\n"); | |
2744e8af LW |
648 | } |
649 | ||
42fed7ba | 650 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 651 | |
2744e8af LW |
652 | return 0; |
653 | } | |
654 | ||
1e2082b5 SW |
655 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
656 | { | |
657 | seq_printf(s, "group %s\nfunction %s\n", | |
658 | map->data.mux.group ? map->data.mux.group : "(default)", | |
659 | map->data.mux.function); | |
660 | } | |
661 | ||
662 | void pinmux_show_setting(struct seq_file *s, | |
663 | struct pinctrl_setting const *setting) | |
2744e8af | 664 | { |
7ecdb16f SW |
665 | struct pinctrl_dev *pctldev = setting->pctldev; |
666 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
667 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
668 | ||
1e2082b5 SW |
669 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
670 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
671 | setting->data.mux.group, | |
672 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
673 | setting->data.mux.func); | |
2744e8af LW |
674 | } |
675 | ||
676 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
677 | { | |
678 | return single_open(file, pinmux_functions_show, inode->i_private); | |
679 | } | |
680 | ||
681 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
682 | { | |
683 | return single_open(file, pinmux_pins_show, inode->i_private); | |
684 | } | |
685 | ||
2744e8af LW |
686 | static const struct file_operations pinmux_functions_ops = { |
687 | .open = pinmux_functions_open, | |
688 | .read = seq_read, | |
689 | .llseek = seq_lseek, | |
690 | .release = single_release, | |
691 | }; | |
692 | ||
693 | static const struct file_operations pinmux_pins_ops = { | |
694 | .open = pinmux_pins_open, | |
695 | .read = seq_read, | |
696 | .llseek = seq_lseek, | |
697 | .release = single_release, | |
698 | }; | |
699 | ||
2744e8af LW |
700 | void pinmux_init_device_debugfs(struct dentry *devroot, |
701 | struct pinctrl_dev *pctldev) | |
702 | { | |
703 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
704 | devroot, pctldev, &pinmux_functions_ops); | |
705 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
706 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
707 | } |
708 | ||
709 | #endif /* CONFIG_DEBUG_FS */ |